Lines Matching +full:dac +full:- +full:mode +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0-or-later
83 snd_vt1724_write_i2c(ice, wm->addr,
86 wm->regs[reg] = val;
90 * update the given register with and/or mask and save the data to the cache
94 unsigned short mask, unsigned short val)
96 val |= wm->regs[reg] & ~mask;
97 if (val != wm->regs[reg]) {
112 unsigned short mask; /* value mask */
113 unsigned short offset; /* zero-value offset */
123 .mask = 0x7f,
126 .update = 0x180, /* update and zero-cross enable */
131 .mask = 0xff,
134 .update = 0x100, /* zero-cross enable */
139 .mask = 0xff,
150 /* headphone output: mute, -73..+6db (1db step) */
151 static const DECLARE_TLV_DB_SCALE(db_scale_hp, -7400, 100, 1);
152 /* DAC output: mute, -127..0db (0.5db step) */
153 static const DECLARE_TLV_DB_SCALE(db_scale_dac, -12750, 50, 1);
154 /* ADC gain: mute, -21..+24db (0.5db step) */
155 static const DECLARE_TLV_DB_SCALE(db_scale_adc, -2100, 50, 1);
160 unsigned int idx = kcontrol->private_value;
163 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
164 uinfo->count = 2;
165 uinfo->value.integer.min = 0;
166 uinfo->value.integer.max = vol->maxval;
175 &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
176 unsigned int idx = kcontrol->private_value;
178 guard(mutex)(&chip->mutex);
179 ucontrol->value.integer.value[0] = wm->volumes[idx][0];
180 ucontrol->value.integer.value[1] = wm->volumes[idx][1];
189 &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
190 unsigned int idx = kcontrol->private_value;
195 guard(mutex)(&chip->mutex);
197 val = ucontrol->value.integer.value[ch];
198 if (val > vol->maxval)
199 val = vol->maxval;
200 if (val == wm->volumes[idx][ch])
203 data = vol->mute;
205 data = (val - 1) + vol->offset;
206 data |= vol->update;
207 changed |= wm8776_write_bits(chip->ice, wm, vol->regs[ch],
208 vol->mask | vol->update, data);
209 if (vol->mux_bits[ch])
210 wm8776_write_bits(chip->ice, wm, WM8776_REG_ADC_MUX,
211 vol->mux_bits[ch],
212 val ? 0 : vol->mux_bits[ch]);
213 wm->volumes[idx][ch] = val;
222 #define COMPOSE_SW_VAL(idx, reg, mask) ((idx) | ((reg) << 8) | ((mask) << 16))
234 &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
235 unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
237 ucontrol->value.integer.value[0] = (wm->switch_bits >> idx) & 1;
246 &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
247 unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
248 unsigned int mask, val;
251 guard(mutex)(&chip->mutex);
252 mask = 1 << idx;
253 wm->switch_bits &= ~mask;
254 val = ucontrol->value.integer.value[0];
256 wm->switch_bits |= mask;
257 mask = GET_SW_VAL_MASK(kcontrol->private_value);
258 changed = wm8776_write_bits(chip->ice, wm,
259 GET_SW_VAL_REG(kcontrol->private_value),
260 mask, val ? mask : 0);
280 static int maya_set_gpio_bits(struct snd_ice1712 *ice, unsigned int mask,
285 if ((data & mask) == bits)
287 snd_ice1712_gpio_write(ice, (data & ~mask) | bits);
297 unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
300 val = (snd_ice1712_gpio_read(chip->ice) >> shift) & 1;
301 if (GET_GPIO_VAL_INV(kcontrol->private_value))
303 ucontrol->value.integer.value[0] = val;
311 unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
312 unsigned int val, mask;
315 guard(mutex)(&chip->mutex);
316 mask = 1 << shift;
317 val = ucontrol->value.integer.value[0];
318 if (GET_GPIO_VAL_INV(kcontrol->private_value))
320 val = val ? mask : 0;
321 changed = maya_set_gpio_bits(chip->ice, mask, val);
329 /* known working input slots (0-4) */
330 #define MAYA_LINE_IN 1 /* in-2 */
331 #define MAYA_MIC_IN 3 /* in-4 */
335 wm8776_write_bits(chip->ice, &chip->wm[idx], WM8776_REG_ADC_MUX,
353 if (snd_ice1712_gpio_read(chip->ice) & (1 << GPIO_MIC_RELAY))
357 ucontrol->value.enumerated.item[0] = sel;
365 int sel = ucontrol->value.enumerated.item[0];
368 guard(mutex)(&chip->mutex);
369 changed = maya_set_gpio_bits(chip->ice, 1 << GPIO_MIC_RELAY,
401 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
402 ucontrol->value.enumerated.item[0] =
403 snd_ice1724_get_route_val(chip->ice, maya_pb_route_shift(idx));
411 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
412 return snd_ice1724_put_route_val(chip->ice,
413 ucontrol->value.enumerated.item[0],
508 .count = 4, /* FIXME: do controls 5-9 have any meaning? */
517 err = snd_ctl_add(ice->card, snd_ctl_new1(&maya_controls[i],
518 ice->spec));
534 0x05, 0x100, /* R5: DAC output L+R muted + update */
535 0x06, 0x000, /* R6: DAC output phase normal */
536 0x07, 0x091, /* R7: DAC enable zero cross detection,
538 0x08, 0x000, /* R8: DAC soft mute off */
539 0x09, 0x000, /* R9: no deemph, DAC zero detect disabled */
540 0x0a, 0x022, /* R10: DAC I2C mode, std polarities, 24bit */
541 0x0b, 0x022, /* R11: ADC I2C mode, std polarities, 24bit,
543 0x0c, 0x042, /* R12: ADC+DAC slave, ADC+DAC 44,1kHz */
554 0x16, 0x001, /* R22: output mux, select DAC */
562 wm->addr = addr;
563 /* enable DAC output; mute bypass, aux & all inputs */
564 wm->switch_bits = (1 << WM_SW_DAC);
578 * NOTE: even though the WM8776's are running in slave mode and rate
584 struct snd_maya44 *chip = ice->spec;
611 /* no hint - S/PDIF input is master, simply return */
619 * this currently sets the same rate for ADC and DAC, but limits
620 * ADC rate to 256X (96kHz). For 256X mode (96kHz), this sets ADC
622 * Setting the rate is not really necessary in slave mode.
633 guard(mutex)(&chip->mutex);
635 wm8776_write_bits(ice, &chip->wm[i],
652 .mask = 0
673 return -ENOMEM;
674 mutex_init(&chip->mutex);
675 chip->ice = ice;
676 ice->spec = chip;
679 ice->num_total_dacs = 4;
680 ice->num_total_adcs = 4;
681 ice->akm_codecs = 0;
684 wm8776_init(ice, &chip->wm[i], wm8776_addr[i]);
689 ice->hw_rates = &dac_rates;
692 ice->gpio.set_pro_rate = set_rate;
695 ice->force_rdma1 = 1;
698 ice->own_routing = 1;
717 /* enable spdif out, spdif out supp, spdif-in, ext spdif out */