Lines Matching +full:activate +full:- +full:to +full:- +full:activate
1 // SPDX-License-Identifier: GPL-2.0-or-later
21 /* Hoontech-specific setting */
41 static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
43 struct hoontech_spec *spec = ice->spec;
45 guard(mutex)(&ice->gpio_mutex);
46 ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
47 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
50 static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
52 struct hoontech_spec *spec = ice->spec;
54 guard(mutex)(&ice->gpio_mutex);
55 ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
56 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
59 static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
61 struct hoontech_spec *spec = ice->spec;
63 guard(mutex)(&ice->gpio_mutex);
64 ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
65 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
68 static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
70 struct hoontech_spec *spec = ice->spec;
72 guard(mutex)(&ice->gpio_mutex);
75 ICE1712_STDSP24_0_BOX(spec->boxbits, box);
76 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
80 ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
81 ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
82 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
83 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
85 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
86 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
87 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
88 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
89 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
90 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
93 ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
94 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
97 case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
98 case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
99 case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
101 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
104 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
105 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
106 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
107 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
108 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
109 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
112 ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
113 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
118 struct hoontech_spec *spec = ice->spec;
120 guard(mutex)(&ice->gpio_mutex);
123 ICE1712_STDSP24_0_BOX(spec->boxbits, box);
124 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
126 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
127 ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
128 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
129 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
133 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
134 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
138 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
139 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
142 static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
144 struct hoontech_spec *spec = ice->spec;
146 guard(mutex)(&ice->gpio_mutex);
147 ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
148 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
156 ice->num_total_dacs = 8;
157 ice->num_total_adcs = 8;
161 return -ENOMEM;
162 ice->spec = spec;
164 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
165 ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
166 ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
167 ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
169 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
170 ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
171 ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
172 ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
173 ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
175 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
176 ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
177 ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
178 ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
179 ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
181 ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
182 ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
183 ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
184 ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
185 ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
187 /* let's go - activate only functions in first box */
189 spec->config = ICE1712_STDSP24_MUTE;
191 spec->config = 0;
196 * The code is not optimal, but should now enable a working config to
199 * ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
203 * on the same box connects MIDI-In to both 401 uarts; both outputs
208 spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
215 spec->boxconfig[1] =
216 spec->boxconfig[2] =
217 spec->boxconfig[3] = spec->boxconfig[0];
219 spec->boxconfig[1] =
220 spec->boxconfig[2] =
221 spec->boxconfig[3] = 0;
225 (spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
227 (spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
229 (spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
231 if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
235 (spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
236 if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
260 struct snd_ice1712 *ice = ak->private_data[0];
267 ice->gpio.direction | tmp);
298 ice->num_total_dacs = 2;
301 ice->num_total_adcs = 2;
304 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
306 return -ENOMEM;
307 ice->akm_codecs = 1;
319 ice->gpio.write_mask = ice->eeprom.gpiomask;
320 ice->gpio.direction = ice->eeprom.gpiodir;
321 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
322 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
335 .mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
336 .mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",