Lines Matching +full:codec +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
6 * Copyright(c) 2008-2010 Intel Corporation
78 struct hda_codec *codec; member
82 struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
83 int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
90 bool chmap_set; /* channel-map override by ALSA API? */
91 unsigned char chmap[8]; /* ALSA API channel-map */
99 int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
102 void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
107 int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
110 int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
114 void (*pin_cvt_fixup)(struct hda_codec *codec,
126 SILENT_STREAM_OFF = 0,
127 SILENT_STREAM_KAE, /* use standard HDA Keep-Alive */
132 struct hda_codec *codec; member
162 * bit 0 means the first playback PCM (PCM3);
172 /* hdmi interrupt trigger control flag for Nvidia codec */
176 bool intel_hsw_fixup; /* apply Intel platform-specific fixups */
178 * Non-generic VIA/NVIDIA specific
197 static inline bool codec_has_acomp(struct hda_codec *codec) in codec_has_acomp() argument
199 struct hdmi_spec *spec = codec->spec; in codec_has_acomp()
200 return spec->use_acomp_notifier; in codec_has_acomp()
203 #define codec_has_acomp(codec) false argument
207 u8 type; /* 0x84 */
208 u8 ver; /* 0x01 */
209 u8 len; /* 0x0a */
213 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
221 u8 type; /* 0x84 */
222 u8 len; /* 0x1b */
223 u8 ver; /* 0x11 << 2 */
243 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
245 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
247 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
249 #define get_pcm_rec(spec, idx) (get_hdmi_pcm(spec, idx)->pcm)
251 static int pin_id_to_pin_index(struct hda_codec *codec, in pin_id_to_pin_index() argument
254 struct hdmi_spec *spec = codec->spec; in pin_id_to_pin_index()
259 * (dev_id == -1) means it is NON-MST pin in pin_id_to_pin_index()
262 if (dev_id == -1) in pin_id_to_pin_index()
263 dev_id = 0; in pin_id_to_pin_index()
265 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in pin_id_to_pin_index()
267 if ((per_pin->pin_nid == pin_nid) && in pin_id_to_pin_index()
268 (per_pin->dev_id == dev_id)) in pin_id_to_pin_index()
272 codec_warn(codec, "HDMI: pin NID 0x%x not registered\n", pin_nid); in pin_id_to_pin_index()
273 return -EINVAL; in pin_id_to_pin_index()
276 static int hinfo_to_pcm_index(struct hda_codec *codec, in hinfo_to_pcm_index() argument
279 struct hdmi_spec *spec = codec->spec; in hinfo_to_pcm_index()
282 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) in hinfo_to_pcm_index()
283 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo) in hinfo_to_pcm_index()
286 codec_warn(codec, "HDMI: hinfo %p not tied to a PCM\n", hinfo); in hinfo_to_pcm_index()
287 return -EINVAL; in hinfo_to_pcm_index()
290 static int hinfo_to_pin_index(struct hda_codec *codec, in hinfo_to_pin_index() argument
293 struct hdmi_spec *spec = codec->spec; in hinfo_to_pin_index()
297 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in hinfo_to_pin_index()
299 if (per_pin->pcm && in hinfo_to_pin_index()
300 per_pin->pcm->pcm->stream == hinfo) in hinfo_to_pin_index()
304 codec_dbg(codec, "HDMI: hinfo %p (pcm %d) not registered\n", hinfo, in hinfo_to_pin_index()
305 hinfo_to_pcm_index(codec, hinfo)); in hinfo_to_pin_index()
306 return -EINVAL; in hinfo_to_pin_index()
315 for (i = 0; i < spec->num_pins; i++) { in pcm_idx_to_pin()
317 if (per_pin->pcm_idx == pcm_idx) in pcm_idx_to_pin()
323 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid) in cvt_nid_to_cvt_index() argument
325 struct hdmi_spec *spec = codec->spec; in cvt_nid_to_cvt_index()
328 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) in cvt_nid_to_cvt_index()
329 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid) in cvt_nid_to_cvt_index()
332 codec_warn(codec, "HDMI: cvt NID 0x%x not registered\n", cvt_nid); in cvt_nid_to_cvt_index()
333 return -EINVAL; in cvt_nid_to_cvt_index()
339 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in hdmi_eld_ctl_info() local
340 struct hdmi_spec *spec = codec->spec; in hdmi_eld_ctl_info()
345 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; in hdmi_eld_ctl_info()
347 pcm_idx = kcontrol->private_value; in hdmi_eld_ctl_info()
348 mutex_lock(&spec->pcm_lock); in hdmi_eld_ctl_info()
352 uinfo->count = 0; in hdmi_eld_ctl_info()
355 eld = &per_pin->sink_eld; in hdmi_eld_ctl_info()
356 uinfo->count = eld->eld_valid ? eld->eld_size : 0; in hdmi_eld_ctl_info()
359 mutex_unlock(&spec->pcm_lock); in hdmi_eld_ctl_info()
360 return 0; in hdmi_eld_ctl_info()
366 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); in hdmi_eld_ctl_get() local
367 struct hdmi_spec *spec = codec->spec; in hdmi_eld_ctl_get()
371 int err = 0; in hdmi_eld_ctl_get()
373 pcm_idx = kcontrol->private_value; in hdmi_eld_ctl_get()
374 mutex_lock(&spec->pcm_lock); in hdmi_eld_ctl_get()
378 memset(ucontrol->value.bytes.data, 0, in hdmi_eld_ctl_get()
379 ARRAY_SIZE(ucontrol->value.bytes.data)); in hdmi_eld_ctl_get()
383 eld = &per_pin->sink_eld; in hdmi_eld_ctl_get()
384 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) || in hdmi_eld_ctl_get()
385 eld->eld_size > ELD_MAX_SIZE) { in hdmi_eld_ctl_get()
387 err = -EINVAL; in hdmi_eld_ctl_get()
391 memset(ucontrol->value.bytes.data, 0, in hdmi_eld_ctl_get()
392 ARRAY_SIZE(ucontrol->value.bytes.data)); in hdmi_eld_ctl_get()
393 if (eld->eld_valid) in hdmi_eld_ctl_get()
394 memcpy(ucontrol->value.bytes.data, eld->eld_buffer, in hdmi_eld_ctl_get()
395 eld->eld_size); in hdmi_eld_ctl_get()
398 mutex_unlock(&spec->pcm_lock); in hdmi_eld_ctl_get()
411 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx, in hdmi_create_eld_ctl() argument
415 struct hdmi_spec *spec = codec->spec; in hdmi_create_eld_ctl()
418 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); in hdmi_create_eld_ctl()
420 return -ENOMEM; in hdmi_create_eld_ctl()
421 kctl->private_value = pcm_idx; in hdmi_create_eld_ctl()
422 kctl->id.device = device; in hdmi_create_eld_ctl()
427 err = snd_hda_ctl_add(codec, 0, kctl); in hdmi_create_eld_ctl()
428 if (err < 0) in hdmi_create_eld_ctl()
431 get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl; in hdmi_create_eld_ctl()
432 return 0; in hdmi_create_eld_ctl()
436 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, in hdmi_get_dip_index() argument
441 val = snd_hda_codec_read(codec, pin_nid, 0, in hdmi_get_dip_index()
442 AC_VERB_GET_HDMI_DIP_INDEX, 0); in hdmi_get_dip_index()
445 *byte_index = val & 0x1f; in hdmi_get_dip_index()
449 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, in hdmi_set_dip_index() argument
454 val = (packet_index << 5) | (byte_index & 0x1f); in hdmi_set_dip_index()
456 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); in hdmi_set_dip_index()
459 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, in hdmi_write_dip_byte() argument
462 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); in hdmi_write_dip_byte()
465 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) in hdmi_init_pin() argument
467 struct hdmi_spec *spec = codec->spec; in hdmi_init_pin()
471 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) in hdmi_init_pin()
472 snd_hda_codec_write(codec, pin_nid, 0, in hdmi_init_pin()
475 if (spec->dyn_pin_out) in hdmi_init_pin()
477 pin_out = 0; in hdmi_init_pin()
484 snd_hda_codec_write(codec, pin_nid, 0, in hdmi_init_pin()
496 struct hdmi_spec_per_pin *per_pin = entry->private_data; in print_eld_info()
498 mutex_lock(&per_pin->lock); in print_eld_info()
499 snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer, per_pin->pin_nid, in print_eld_info()
500 per_pin->dev_id, per_pin->cvt_nid); in print_eld_info()
501 mutex_unlock(&per_pin->lock); in print_eld_info()
507 struct hdmi_spec_per_pin *per_pin = entry->private_data; in write_eld_info()
509 mutex_lock(&per_pin->lock); in write_eld_info()
510 snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer); in write_eld_info()
511 mutex_unlock(&per_pin->lock); in write_eld_info()
517 struct hda_codec *codec = per_pin->codec; in eld_proc_new() local
521 snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index); in eld_proc_new()
522 err = snd_card_proc_new(codec->card, name, &entry); in eld_proc_new()
523 if (err < 0) in eld_proc_new()
527 entry->c.text.write = write_eld_info; in eld_proc_new()
528 entry->mode |= 0200; in eld_proc_new()
529 per_pin->proc_entry = entry; in eld_proc_new()
531 return 0; in eld_proc_new()
536 if (!per_pin->codec->bus->shutdown) { in eld_proc_free()
537 snd_info_free_entry(per_pin->proc_entry); in eld_proc_free()
538 per_pin->proc_entry = NULL; in eld_proc_free()
545 return 0; in eld_proc_new()
559 static void hdmi_start_infoframe_trans(struct hda_codec *codec, in hdmi_start_infoframe_trans() argument
562 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); in hdmi_start_infoframe_trans()
563 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, in hdmi_start_infoframe_trans()
570 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, in hdmi_stop_infoframe_trans() argument
573 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); in hdmi_stop_infoframe_trans()
574 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, in hdmi_stop_infoframe_trans()
578 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) in hdmi_debug_dip_size() argument
584 size = snd_hdmi_get_eld_size(codec, pin_nid); in hdmi_debug_dip_size()
585 codec_dbg(codec, "HDMI: ELD buf size is %d\n", size); in hdmi_debug_dip_size()
587 for (i = 0; i < 8; i++) { in hdmi_debug_dip_size()
588 size = snd_hda_codec_read(codec, pin_nid, 0, in hdmi_debug_dip_size()
590 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size); in hdmi_debug_dip_size()
595 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) in hdmi_clear_dip_buffers() argument
601 for (i = 0; i < 8; i++) { in hdmi_clear_dip_buffers()
602 size = snd_hda_codec_read(codec, pin_nid, 0, in hdmi_clear_dip_buffers()
604 if (size == 0) in hdmi_clear_dip_buffers()
607 hdmi_set_dip_index(codec, pin_nid, i, 0x0); in hdmi_clear_dip_buffers()
609 hdmi_write_dip_byte(codec, pin_nid, 0x0); in hdmi_clear_dip_buffers()
610 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); in hdmi_clear_dip_buffers()
612 codec_dbg(codec, "dip index %d: %d != %d\n", in hdmi_clear_dip_buffers()
614 if (bi == 0) /* byte index wrapped around */ in hdmi_clear_dip_buffers()
617 codec_dbg(codec, in hdmi_clear_dip_buffers()
627 u8 sum = 0; in hdmi_checksum_audio_infoframe()
630 hdmi_ai->checksum = 0; in hdmi_checksum_audio_infoframe()
632 for (i = 0; i < sizeof(*hdmi_ai); i++) in hdmi_checksum_audio_infoframe()
635 hdmi_ai->checksum = -sum; in hdmi_checksum_audio_infoframe()
638 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, in hdmi_fill_audio_infoframe() argument
644 hdmi_debug_dip_size(codec, pin_nid); in hdmi_fill_audio_infoframe()
645 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ in hdmi_fill_audio_infoframe()
647 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); in hdmi_fill_audio_infoframe()
648 for (i = 0; i < size; i++) in hdmi_fill_audio_infoframe()
649 hdmi_write_dip_byte(codec, pin_nid, dip[i]); in hdmi_fill_audio_infoframe()
652 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, in hdmi_infoframe_uptodate() argument
658 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); in hdmi_infoframe_uptodate()
659 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) in hdmi_infoframe_uptodate()
663 for (i = 0; i < size; i++) { in hdmi_infoframe_uptodate()
664 val = snd_hda_codec_read(codec, pin_nid, 0, in hdmi_infoframe_uptodate()
665 AC_VERB_GET_HDMI_DIP_DATA, 0); in hdmi_infoframe_uptodate()
673 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid, in hdmi_pin_get_eld() argument
676 snd_hda_set_dev_select(codec, nid, dev_id); in hdmi_pin_get_eld()
678 return snd_hdmi_get_eld(codec, nid, buf, eld_size); in hdmi_pin_get_eld()
681 static void hdmi_pin_setup_infoframe(struct hda_codec *codec, in hdmi_pin_setup_infoframe() argument
686 struct hdmi_spec *spec = codec->spec; in hdmi_pin_setup_infoframe()
689 memset(&ai, 0, sizeof(ai)); in hdmi_pin_setup_infoframe()
690 if ((conn_type == 0) || /* HDMI */ in hdmi_pin_setup_infoframe()
692 (conn_type == 1 && spec->nv_dp_workaround)) { in hdmi_pin_setup_infoframe()
695 if (conn_type == 0) { /* HDMI */ in hdmi_pin_setup_infoframe()
696 hdmi_ai->type = 0x84; in hdmi_pin_setup_infoframe()
697 hdmi_ai->ver = 0x01; in hdmi_pin_setup_infoframe()
698 hdmi_ai->len = 0x0a; in hdmi_pin_setup_infoframe()
700 hdmi_ai->type = 0x84; in hdmi_pin_setup_infoframe()
701 hdmi_ai->ver = 0x1b; in hdmi_pin_setup_infoframe()
702 hdmi_ai->len = 0x11 << 2; in hdmi_pin_setup_infoframe()
704 hdmi_ai->CC02_CT47 = active_channels - 1; in hdmi_pin_setup_infoframe()
705 hdmi_ai->CA = ca; in hdmi_pin_setup_infoframe()
710 dp_ai->type = 0x84; in hdmi_pin_setup_infoframe()
711 dp_ai->len = 0x1b; in hdmi_pin_setup_infoframe()
712 dp_ai->ver = 0x11 << 2; in hdmi_pin_setup_infoframe()
713 dp_ai->CC02_CT47 = active_channels - 1; in hdmi_pin_setup_infoframe()
714 dp_ai->CA = ca; in hdmi_pin_setup_infoframe()
716 codec_dbg(codec, "HDMI: unknown connection type at pin NID 0x%x\n", pin_nid); in hdmi_pin_setup_infoframe()
720 snd_hda_set_dev_select(codec, pin_nid, dev_id); in hdmi_pin_setup_infoframe()
727 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, in hdmi_pin_setup_infoframe()
729 codec_dbg(codec, "%s: pin NID=0x%x channels=%d ca=0x%02x\n", in hdmi_pin_setup_infoframe()
731 hdmi_stop_infoframe_trans(codec, pin_nid); in hdmi_pin_setup_infoframe()
732 hdmi_fill_audio_infoframe(codec, pin_nid, in hdmi_pin_setup_infoframe()
734 hdmi_start_infoframe_trans(codec, pin_nid); in hdmi_pin_setup_infoframe()
738 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, in hdmi_setup_audio_infoframe() argument
742 struct hdmi_spec *spec = codec->spec; in hdmi_setup_audio_infoframe()
743 struct hdac_chmap *chmap = &spec->chmap; in hdmi_setup_audio_infoframe()
744 hda_nid_t pin_nid = per_pin->pin_nid; in hdmi_setup_audio_infoframe()
745 int dev_id = per_pin->dev_id; in hdmi_setup_audio_infoframe()
746 int channels = per_pin->channels; in hdmi_setup_audio_infoframe()
754 snd_hda_set_dev_select(codec, pin_nid, dev_id); in hdmi_setup_audio_infoframe()
757 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) in hdmi_setup_audio_infoframe()
758 snd_hda_codec_write(codec, pin_nid, 0, in hdmi_setup_audio_infoframe()
762 eld = &per_pin->sink_eld; in hdmi_setup_audio_infoframe()
764 ca = snd_hdac_channel_allocation(&codec->core, in hdmi_setup_audio_infoframe()
765 eld->info.spk_alloc, channels, in hdmi_setup_audio_infoframe()
766 per_pin->chmap_set, non_pcm, per_pin->chmap); in hdmi_setup_audio_infoframe()
770 chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid, in hdmi_setup_audio_infoframe()
777 snd_hdac_setup_channel_mapping(&spec->chmap, in hdmi_setup_audio_infoframe()
779 per_pin->chmap, per_pin->chmap_set); in hdmi_setup_audio_infoframe()
781 spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id, in hdmi_setup_audio_infoframe()
782 ca, active_channels, eld->info.conn_type); in hdmi_setup_audio_infoframe()
784 per_pin->non_pcm = non_pcm; in hdmi_setup_audio_infoframe()
793 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid, in check_presence_and_report() argument
796 struct hdmi_spec *spec = codec->spec; in check_presence_and_report()
797 int pin_idx = pin_id_to_pin_index(codec, nid, dev_id); in check_presence_and_report()
799 if (pin_idx < 0) in check_presence_and_report()
801 mutex_lock(&spec->pcm_lock); in check_presence_and_report()
803 mutex_unlock(&spec->pcm_lock); in check_presence_and_report()
806 static void jack_callback(struct hda_codec *codec, in jack_callback() argument
810 if (codec_has_acomp(codec)) in jack_callback()
813 check_presence_and_report(codec, jack->nid, jack->dev_id); in jack_callback()
816 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res, in hdmi_intrinsic_event() argument
819 jack->jack_dirty = 1; in hdmi_intrinsic_event()
821 codec_dbg(codec, in hdmi_intrinsic_event()
822 "HDMI hot plug event: Codec=%d NID=0x%x Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n", in hdmi_intrinsic_event()
823 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA), in hdmi_intrinsic_event()
826 check_presence_and_report(codec, jack->nid, jack->dev_id); in hdmi_intrinsic_event()
829 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) in hdmi_non_intrinsic_event() argument
836 codec_info(codec, in hdmi_non_intrinsic_event()
837 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", in hdmi_non_intrinsic_event()
838 codec->addr, in hdmi_non_intrinsic_event()
854 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) in hdmi_unsol_event() argument
860 if (codec_has_acomp(codec)) in hdmi_unsol_event()
863 if (codec->dp_mst) { in hdmi_unsol_event()
867 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry); in hdmi_unsol_event()
869 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0); in hdmi_unsol_event()
873 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag); in hdmi_unsol_event()
877 if (subtag == 0) in hdmi_unsol_event()
878 hdmi_intrinsic_event(codec, res, jack); in hdmi_unsol_event()
880 hdmi_non_intrinsic_event(codec, res); in hdmi_unsol_event()
883 static void haswell_verify_D0(struct hda_codec *codec, in haswell_verify_D0() argument
889 * thus pins could only choose converter 0 for use. Make sure the in haswell_verify_D0()
891 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0)) in haswell_verify_D0()
892 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0); in haswell_verify_D0()
894 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) { in haswell_verify_D0()
895 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, in haswell_verify_D0()
898 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0); in haswell_verify_D0()
900 codec_dbg(codec, "Haswell HDMI audio: Power for NID 0x%x is now D%d\n", nid, pwr); in haswell_verify_D0()
908 /* HBR should be Non-PCM, 8 channels */
912 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid, in hdmi_pin_hbr_setup() argument
917 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { in hdmi_pin_hbr_setup()
918 snd_hda_set_dev_select(codec, pin_nid, dev_id); in hdmi_pin_hbr_setup()
919 pinctl = snd_hda_codec_read(codec, pin_nid, 0, in hdmi_pin_hbr_setup()
920 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in hdmi_pin_hbr_setup()
922 if (pinctl < 0) in hdmi_pin_hbr_setup()
923 return hbr ? -EINVAL : 0; in hdmi_pin_hbr_setup()
931 codec_dbg(codec, in hdmi_pin_hbr_setup()
932 "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n", in hdmi_pin_hbr_setup()
934 pinctl == new_pinctl ? "" : "new-", in hdmi_pin_hbr_setup()
938 snd_hda_codec_write(codec, pin_nid, 0, in hdmi_pin_hbr_setup()
942 return -EINVAL; in hdmi_pin_hbr_setup()
944 return 0; in hdmi_pin_hbr_setup()
947 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, in hdmi_setup_stream() argument
951 struct hdmi_spec *spec = codec->spec; in hdmi_setup_stream()
955 err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id, in hdmi_setup_stream()
959 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n"); in hdmi_setup_stream()
963 if (spec->intel_hsw_fixup) { in hdmi_setup_stream()
970 param = snd_hda_codec_read(codec, cvt_nid, 0, in hdmi_setup_stream()
971 AC_VERB_GET_DIGI_CONVERT_1, 0); in hdmi_setup_stream()
977 param |= 0x1; in hdmi_setup_stream()
979 snd_hda_codec_write(codec, cvt_nid, 0, in hdmi_setup_stream()
983 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); in hdmi_setup_stream()
984 return 0; in hdmi_setup_stream()
992 static int hdmi_choose_cvt(struct hda_codec *codec, in hdmi_choose_cvt() argument
996 struct hdmi_spec *spec = codec->spec; in hdmi_choose_cvt()
999 int cvt_idx, mux_idx = 0; in hdmi_choose_cvt()
1001 /* pin_idx < 0 means no pin will be bound to the converter */ in hdmi_choose_cvt()
1002 if (pin_idx < 0) in hdmi_choose_cvt()
1007 if (per_pin && per_pin->silent_stream) { in hdmi_choose_cvt()
1008 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid); in hdmi_choose_cvt()
1010 if (per_cvt->assigned && !silent) in hdmi_choose_cvt()
1011 return -EBUSY; in hdmi_choose_cvt()
1014 return 0; in hdmi_choose_cvt()
1018 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { in hdmi_choose_cvt()
1022 if (per_cvt->assigned || per_cvt->silent_stream) in hdmi_choose_cvt()
1027 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) in hdmi_choose_cvt()
1028 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) in hdmi_choose_cvt()
1031 if (mux_idx == per_pin->num_mux_nids) in hdmi_choose_cvt()
1037 if (cvt_idx == spec->num_cvts) in hdmi_choose_cvt()
1038 return -EBUSY; in hdmi_choose_cvt()
1041 per_pin->mux_idx = mux_idx; in hdmi_choose_cvt()
1046 return 0; in hdmi_choose_cvt()
1050 static void intel_verify_pin_cvt_connect(struct hda_codec *codec, in intel_verify_pin_cvt_connect() argument
1053 hda_nid_t pin_nid = per_pin->pin_nid; in intel_verify_pin_cvt_connect()
1056 mux_idx = per_pin->mux_idx; in intel_verify_pin_cvt_connect()
1057 curr = snd_hda_codec_read(codec, pin_nid, 0, in intel_verify_pin_cvt_connect()
1058 AC_VERB_GET_CONNECT_SEL, 0); in intel_verify_pin_cvt_connect()
1060 snd_hda_codec_write_cache(codec, pin_nid, 0, in intel_verify_pin_cvt_connect()
1073 for (i = 0; i < spec->num_cvts; i++) in intel_cvt_id_to_mux_idx()
1074 if (spec->cvt_nids[i] == cvt_nid) in intel_cvt_id_to_mux_idx()
1076 return -EINVAL; in intel_cvt_id_to_mux_idx()
1088 static void intel_not_share_assigned_cvt(struct hda_codec *codec, in intel_not_share_assigned_cvt() argument
1092 struct hdmi_spec *spec = codec->spec; in intel_not_share_assigned_cvt()
1100 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in intel_not_share_assigned_cvt()
1109 if (!per_pin->pcm) in intel_not_share_assigned_cvt()
1112 if ((per_pin->pin_nid == pin_nid) && in intel_not_share_assigned_cvt()
1113 (per_pin->dev_id == dev_id)) in intel_not_share_assigned_cvt()
1117 * if per_pin->dev_id >= dev_num, in intel_not_share_assigned_cvt()
1122 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1; in intel_not_share_assigned_cvt()
1123 if (per_pin->dev_id >= dev_num) in intel_not_share_assigned_cvt()
1126 nid = per_pin->pin_nid; in intel_not_share_assigned_cvt()
1134 dev_id_saved = snd_hda_get_dev_select(codec, nid); in intel_not_share_assigned_cvt()
1135 snd_hda_set_dev_select(codec, nid, per_pin->dev_id); in intel_not_share_assigned_cvt()
1136 curr = snd_hda_codec_read(codec, nid, 0, in intel_not_share_assigned_cvt()
1137 AC_VERB_GET_CONNECT_SEL, 0); in intel_not_share_assigned_cvt()
1139 snd_hda_set_dev_select(codec, nid, dev_id_saved); in intel_not_share_assigned_cvt()
1145 * connection list are in the same order as in the codec. in intel_not_share_assigned_cvt()
1147 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { in intel_not_share_assigned_cvt()
1149 if (!per_cvt->assigned) { in intel_not_share_assigned_cvt()
1150 codec_dbg(codec, in intel_not_share_assigned_cvt()
1151 "choose cvt %d for pin NID 0x%x\n", in intel_not_share_assigned_cvt()
1153 snd_hda_codec_write_cache(codec, nid, 0, in intel_not_share_assigned_cvt()
1159 snd_hda_set_dev_select(codec, nid, dev_id_saved); in intel_not_share_assigned_cvt()
1164 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec, in intel_not_share_assigned_cvt_nid() argument
1168 struct hdmi_spec *spec = codec->spec; in intel_not_share_assigned_cvt_nid()
1172 * The pin nid may be 0, this means all pins will not in intel_not_share_assigned_cvt_nid()
1176 if (mux_idx >= 0) in intel_not_share_assigned_cvt_nid()
1177 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx); in intel_not_share_assigned_cvt_nid()
1181 static void pin_cvt_fixup(struct hda_codec *codec, in pin_cvt_fixup() argument
1185 struct hdmi_spec *spec = codec->spec; in pin_cvt_fixup()
1187 if (spec->ops.pin_cvt_fixup) in pin_cvt_fixup()
1188 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid); in pin_cvt_fixup()
1193 struct hda_codec *codec, in hdmi_pcm_open_no_pin() argument
1196 struct hdmi_spec *spec = codec->spec; in hdmi_pcm_open_no_pin()
1197 struct snd_pcm_runtime *runtime = substream->runtime; in hdmi_pcm_open_no_pin()
1202 pcm_idx = hinfo_to_pcm_index(codec, hinfo); in hdmi_pcm_open_no_pin()
1203 if (pcm_idx < 0) in hdmi_pcm_open_no_pin()
1204 return -EINVAL; in hdmi_pcm_open_no_pin()
1206 err = hdmi_choose_cvt(codec, -1, &cvt_idx, false); in hdmi_pcm_open_no_pin()
1211 per_cvt->assigned = true; in hdmi_pcm_open_no_pin()
1212 hinfo->nid = per_cvt->cvt_nid; in hdmi_pcm_open_no_pin()
1214 pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid); in hdmi_pcm_open_no_pin()
1216 set_bit(pcm_idx, &spec->pcm_in_use); in hdmi_pcm_open_no_pin()
1220 hinfo->channels_min = per_cvt->channels_min; in hdmi_pcm_open_no_pin()
1221 hinfo->channels_max = per_cvt->channels_max; in hdmi_pcm_open_no_pin()
1222 hinfo->rates = per_cvt->rates; in hdmi_pcm_open_no_pin()
1223 hinfo->formats = per_cvt->formats; in hdmi_pcm_open_no_pin()
1224 hinfo->maxbps = per_cvt->maxbps; in hdmi_pcm_open_no_pin()
1227 runtime->hw.channels_min = hinfo->channels_min; in hdmi_pcm_open_no_pin()
1228 runtime->hw.channels_max = hinfo->channels_max; in hdmi_pcm_open_no_pin()
1229 runtime->hw.formats = hinfo->formats; in hdmi_pcm_open_no_pin()
1230 runtime->hw.rates = hinfo->rates; in hdmi_pcm_open_no_pin()
1232 snd_pcm_hw_constraint_step(substream->runtime, 0, in hdmi_pcm_open_no_pin()
1234 return 0; in hdmi_pcm_open_no_pin()
1241 struct hda_codec *codec, in hdmi_pcm_open() argument
1244 struct hdmi_spec *spec = codec->spec; in hdmi_pcm_open()
1245 struct snd_pcm_runtime *runtime = substream->runtime; in hdmi_pcm_open()
1253 pcm_idx = hinfo_to_pcm_index(codec, hinfo); in hdmi_pcm_open()
1254 if (pcm_idx < 0) in hdmi_pcm_open()
1255 return -EINVAL; in hdmi_pcm_open()
1257 mutex_lock(&spec->pcm_lock); in hdmi_pcm_open()
1258 pin_idx = hinfo_to_pin_index(codec, hinfo); in hdmi_pcm_open()
1262 if (pin_idx < 0) { in hdmi_pcm_open()
1263 err = hdmi_pcm_open_no_pin(hinfo, codec, substream); in hdmi_pcm_open()
1267 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, false); in hdmi_pcm_open()
1268 if (err < 0) in hdmi_pcm_open()
1273 per_cvt->assigned = true; in hdmi_pcm_open()
1275 set_bit(pcm_idx, &spec->pcm_in_use); in hdmi_pcm_open()
1277 per_pin->cvt_nid = per_cvt->cvt_nid; in hdmi_pcm_open()
1278 hinfo->nid = per_cvt->cvt_nid; in hdmi_pcm_open()
1281 if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE) in hdmi_pcm_open()
1282 azx_stream(get_azx_dev(substream))->stripe = 1; in hdmi_pcm_open()
1284 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id); in hdmi_pcm_open()
1285 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, in hdmi_pcm_open()
1287 per_pin->mux_idx); in hdmi_pcm_open()
1290 pin_cvt_fixup(codec, per_pin, 0); in hdmi_pcm_open()
1292 snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid); in hdmi_pcm_open()
1295 hinfo->channels_min = per_cvt->channels_min; in hdmi_pcm_open()
1296 hinfo->channels_max = per_cvt->channels_max; in hdmi_pcm_open()
1297 hinfo->rates = per_cvt->rates; in hdmi_pcm_open()
1298 hinfo->formats = per_cvt->formats; in hdmi_pcm_open()
1299 hinfo->maxbps = per_cvt->maxbps; in hdmi_pcm_open()
1301 eld = &per_pin->sink_eld; in hdmi_pcm_open()
1303 if (!static_hdmi_pcm && eld->eld_valid) { in hdmi_pcm_open()
1304 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo); in hdmi_pcm_open()
1305 if (hinfo->channels_min > hinfo->channels_max || in hdmi_pcm_open()
1306 !hinfo->rates || !hinfo->formats) { in hdmi_pcm_open()
1307 per_cvt->assigned = false; in hdmi_pcm_open()
1308 hinfo->nid = 0; in hdmi_pcm_open()
1309 snd_hda_spdif_ctls_unassign(codec, pcm_idx); in hdmi_pcm_open()
1310 err = -ENODEV; in hdmi_pcm_open()
1316 runtime->hw.channels_min = hinfo->channels_min; in hdmi_pcm_open()
1317 runtime->hw.channels_max = hinfo->channels_max; in hdmi_pcm_open()
1318 runtime->hw.formats = hinfo->formats; in hdmi_pcm_open()
1319 runtime->hw.rates = hinfo->rates; in hdmi_pcm_open()
1321 snd_pcm_hw_constraint_step(substream->runtime, 0, in hdmi_pcm_open()
1324 mutex_unlock(&spec->pcm_lock); in hdmi_pcm_open()
1331 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) in hdmi_read_pin_conn() argument
1333 struct hdmi_spec *spec = codec->spec; in hdmi_read_pin_conn()
1335 hda_nid_t pin_nid = per_pin->pin_nid; in hdmi_read_pin_conn()
1336 int dev_id = per_pin->dev_id; in hdmi_read_pin_conn()
1339 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { in hdmi_read_pin_conn()
1340 codec_warn(codec, in hdmi_read_pin_conn()
1341 "HDMI: pin NID 0x%x wcaps %#x does not support connection list\n", in hdmi_read_pin_conn()
1342 pin_nid, get_wcaps(codec, pin_nid)); in hdmi_read_pin_conn()
1343 return -EINVAL; in hdmi_read_pin_conn()
1346 snd_hda_set_dev_select(codec, pin_nid, dev_id); in hdmi_read_pin_conn()
1348 if (spec->intel_hsw_fixup) { in hdmi_read_pin_conn()
1349 conns = spec->num_cvts; in hdmi_read_pin_conn()
1350 memcpy(per_pin->mux_nids, spec->cvt_nids, in hdmi_read_pin_conn()
1353 conns = snd_hda_get_raw_connections(codec, pin_nid, in hdmi_read_pin_conn()
1354 per_pin->mux_nids, in hdmi_read_pin_conn()
1359 per_pin->num_mux_nids = conns; in hdmi_read_pin_conn()
1361 return 0; in hdmi_read_pin_conn()
1369 for (i = 0; i < spec->pcm_used; i++) { in hdmi_find_pcm_slot()
1370 if (!test_bit(i, &spec->pcm_bitmap)) in hdmi_find_pcm_slot()
1373 return -EBUSY; in hdmi_find_pcm_slot()
1382 if (per_pin->pcm) in hdmi_attach_hda_pcm()
1385 idx = per_pin->prev_pcm_idx; in hdmi_attach_hda_pcm()
1386 if (idx >= 0) { in hdmi_attach_hda_pcm()
1387 if (!test_bit(idx, &spec->pcm_bitmap)) in hdmi_attach_hda_pcm()
1389 per_pin->prev_pcm_idx = -1; /* no longer valid, clear it */ in hdmi_attach_hda_pcm()
1392 if (idx == -EBUSY) in hdmi_attach_hda_pcm()
1395 per_pin->pcm_idx = idx; in hdmi_attach_hda_pcm()
1396 per_pin->pcm = get_hdmi_pcm(spec, idx); in hdmi_attach_hda_pcm()
1397 set_bit(idx, &spec->pcm_bitmap); in hdmi_attach_hda_pcm()
1406 if (!per_pin->pcm) in hdmi_detach_hda_pcm()
1408 idx = per_pin->pcm_idx; in hdmi_detach_hda_pcm()
1409 per_pin->pcm_idx = -1; in hdmi_detach_hda_pcm()
1410 per_pin->prev_pcm_idx = idx; /* remember the previous index */ in hdmi_detach_hda_pcm()
1411 per_pin->pcm = NULL; in hdmi_detach_hda_pcm()
1412 if (idx >= 0 && idx < spec->pcm_used) in hdmi_detach_hda_pcm()
1413 clear_bit(idx, &spec->pcm_bitmap); in hdmi_detach_hda_pcm()
1421 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) in hdmi_get_pin_cvt_mux()
1422 if (per_pin->mux_nids[mux_idx] == cvt_nid) in hdmi_get_pin_cvt_mux()
1427 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1432 struct hda_codec *codec = per_pin->codec; in hdmi_pcm_setup_pin() local
1439 if (per_pin->pcm_idx < 0 || per_pin->pcm_idx >= spec->pcm_used) in hdmi_pcm_setup_pin()
1441 pcm = get_pcm_rec(spec, per_pin->pcm_idx); in hdmi_pcm_setup_pin()
1442 if (!pcm->pcm) in hdmi_pcm_setup_pin()
1444 if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use)) in hdmi_pcm_setup_pin()
1448 hinfo = pcm->stream; in hdmi_pcm_setup_pin()
1449 substream = pcm->pcm->streams[0].substream; in hdmi_pcm_setup_pin()
1451 per_pin->cvt_nid = hinfo->nid; in hdmi_pcm_setup_pin()
1453 mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid); in hdmi_pcm_setup_pin()
1454 if (mux_idx < per_pin->num_mux_nids) { in hdmi_pcm_setup_pin()
1455 snd_hda_set_dev_select(codec, per_pin->pin_nid, in hdmi_pcm_setup_pin()
1456 per_pin->dev_id); in hdmi_pcm_setup_pin()
1457 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, in hdmi_pcm_setup_pin()
1461 snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid); in hdmi_pcm_setup_pin()
1463 non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid); in hdmi_pcm_setup_pin()
1464 if (substream->runtime) in hdmi_pcm_setup_pin()
1465 per_pin->channels = substream->runtime->channels; in hdmi_pcm_setup_pin()
1466 per_pin->setup = true; in hdmi_pcm_setup_pin()
1467 per_pin->mux_idx = mux_idx; in hdmi_pcm_setup_pin()
1469 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm); in hdmi_pcm_setup_pin()
1475 if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used) in hdmi_pcm_reset_pin()
1476 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx); in hdmi_pcm_reset_pin()
1478 per_pin->chmap_set = false; in hdmi_pcm_reset_pin()
1479 memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); in hdmi_pcm_reset_pin()
1481 per_pin->setup = false; in hdmi_pcm_reset_pin()
1482 per_pin->channels = 0; in hdmi_pcm_reset_pin()
1485 static struct snd_jack *pin_idx_to_pcm_jack(struct hda_codec *codec, in pin_idx_to_pcm_jack() argument
1488 struct hdmi_spec *spec = codec->spec; in pin_idx_to_pcm_jack()
1490 if (per_pin->pcm_idx >= 0) in pin_idx_to_pcm_jack()
1491 return spec->pcm_rec[per_pin->pcm_idx].jack; in pin_idx_to_pcm_jack()
1500 static void update_eld(struct hda_codec *codec, in update_eld() argument
1505 struct hdmi_eld *pin_eld = &per_pin->sink_eld; in update_eld()
1506 struct hdmi_spec *spec = codec->spec; in update_eld()
1508 bool old_eld_valid = pin_eld->eld_valid; in update_eld()
1512 if (eld->eld_valid) { in update_eld()
1513 if (eld->eld_size <= 0 || in update_eld()
1514 snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer, in update_eld()
1515 eld->eld_size) < 0) { in update_eld()
1516 eld->eld_valid = false; in update_eld()
1518 schedule_delayed_work(&per_pin->work, in update_eld()
1525 if (!eld->eld_valid || eld->eld_size <= 0 || eld->info.sad_count <= 0) { in update_eld()
1526 eld->eld_valid = false; in update_eld()
1527 eld->eld_size = 0; in update_eld()
1531 pcm_idx = per_pin->pcm_idx; in update_eld()
1534 * pcm_idx >=0 before update_eld() means it is in monitor in update_eld()
1537 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin); in update_eld()
1539 if (!spec->static_pcm_mapping) { in update_eld()
1540 if (eld->eld_valid) { in update_eld()
1549 /* if pcm_idx == -1, it means this is in monitor connection event in update_eld()
1552 if (pcm_idx == -1) in update_eld()
1553 pcm_idx = per_pin->pcm_idx; in update_eld()
1555 pcm_jack = pin_idx_to_pcm_jack(codec, per_pin); in update_eld()
1557 if (eld->eld_valid) in update_eld()
1558 snd_hdmi_show_eld(codec, &eld->info); in update_eld()
1560 eld_changed = (pin_eld->eld_valid != eld->eld_valid); in update_eld()
1561 eld_changed |= (pin_eld->monitor_present != eld->monitor_present); in update_eld()
1562 if (!eld_changed && eld->eld_valid && pin_eld->eld_valid) in update_eld()
1563 if (pin_eld->eld_size != eld->eld_size || in update_eld()
1564 memcmp(pin_eld->eld_buffer, eld->eld_buffer, in update_eld()
1565 eld->eld_size) != 0) in update_eld()
1569 pin_eld->monitor_present = eld->monitor_present; in update_eld()
1570 pin_eld->eld_valid = eld->eld_valid; in update_eld()
1571 pin_eld->eld_size = eld->eld_size; in update_eld()
1572 if (eld->eld_valid) in update_eld()
1573 memcpy(pin_eld->eld_buffer, eld->eld_buffer, in update_eld()
1574 eld->eld_size); in update_eld()
1575 pin_eld->info = eld->info; in update_eld()
1579 * Re-setup pin and infoframe. This is needed e.g. when in update_eld()
1580 * - sink is first plugged-in in update_eld()
1581 * - transcoder can change during stream playback on Haswell in update_eld()
1584 if (eld->eld_valid && !old_eld_valid && per_pin->setup) { in update_eld()
1585 pin_cvt_fixup(codec, per_pin, 0); in update_eld()
1586 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); in update_eld()
1589 if (eld_changed && pcm_idx >= 0) in update_eld()
1590 snd_ctl_notify(codec->card, in update_eld()
1593 &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id); in update_eld()
1597 (eld->monitor_present && eld->eld_valid) ? in update_eld()
1598 SND_JACK_AVOUT : 0); in update_eld()
1601 /* update ELD and jack state via HD-audio verbs */
1605 struct hda_codec *codec = per_pin->codec; in hdmi_present_sense_via_verbs() local
1606 struct hdmi_spec *spec = codec->spec; in hdmi_present_sense_via_verbs()
1607 struct hdmi_eld *eld = &spec->temp_eld; in hdmi_present_sense_via_verbs()
1608 struct device *dev = hda_codec_dev(codec); in hdmi_present_sense_via_verbs()
1609 hda_nid_t pin_nid = per_pin->pin_nid; in hdmi_present_sense_via_verbs()
1610 int dev_id = per_pin->dev_id; in hdmi_present_sense_via_verbs()
1615 * the real PD value changed. An older version of the HD-audio in hdmi_present_sense_via_verbs()
1623 if (dev->power.runtime_status == RPM_SUSPENDING) in hdmi_present_sense_via_verbs()
1627 ret = snd_hda_power_up_pm(codec); in hdmi_present_sense_via_verbs()
1628 if (ret < 0 && pm_runtime_suspended(dev)) in hdmi_present_sense_via_verbs()
1631 present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id); in hdmi_present_sense_via_verbs()
1633 mutex_lock(&per_pin->lock); in hdmi_present_sense_via_verbs()
1634 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); in hdmi_present_sense_via_verbs()
1635 if (eld->monitor_present) in hdmi_present_sense_via_verbs()
1636 eld->eld_valid = !!(present & AC_PINSENSE_ELDV); in hdmi_present_sense_via_verbs()
1638 eld->eld_valid = false; in hdmi_present_sense_via_verbs()
1640 codec_dbg(codec, in hdmi_present_sense_via_verbs()
1641 "HDMI status: Codec=%d NID=0x%x Presence_Detect=%d ELD_Valid=%d\n", in hdmi_present_sense_via_verbs()
1642 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid); in hdmi_present_sense_via_verbs()
1644 if (eld->eld_valid) { in hdmi_present_sense_via_verbs()
1645 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id, in hdmi_present_sense_via_verbs()
1646 eld->eld_buffer, &eld->eld_size) < 0) in hdmi_present_sense_via_verbs()
1647 eld->eld_valid = false; in hdmi_present_sense_via_verbs()
1650 update_eld(codec, per_pin, eld, repoll); in hdmi_present_sense_via_verbs()
1651 mutex_unlock(&per_pin->lock); in hdmi_present_sense_via_verbs()
1653 snd_hda_power_down_pm(codec); in hdmi_present_sense_via_verbs()
1659 #define I915_SILENT_FMT_MASK 0xf
1661 static void silent_stream_enable_i915(struct hda_codec *codec, in silent_stream_enable_i915() argument
1666 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid, in silent_stream_enable_i915()
1667 per_pin->dev_id, I915_SILENT_RATE); in silent_stream_enable_i915()
1672 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, in silent_stream_enable_i915()
1675 snd_hda_codec_setup_stream(codec, per_pin->cvt_nid, I915_SILENT_FMT_MASK, 0, format); in silent_stream_enable_i915()
1677 per_pin->channels = I915_SILENT_CHANNELS; in silent_stream_enable_i915()
1678 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); in silent_stream_enable_i915()
1681 static void silent_stream_set_kae(struct hda_codec *codec, in silent_stream_set_kae() argument
1687 codec_dbg(codec, "HDMI: KAE %d cvt-NID=0x%x\n", enable, per_pin->cvt_nid); in silent_stream_set_kae()
1689 param = snd_hda_codec_read(codec, per_pin->cvt_nid, 0, AC_VERB_GET_DIGI_CONVERT_1, 0); in silent_stream_set_kae()
1690 param = (param >> 16) & 0xff; in silent_stream_set_kae()
1697 snd_hda_codec_write(codec, per_pin->cvt_nid, 0, AC_VERB_SET_DIGI_CONVERT_3, param); in silent_stream_set_kae()
1700 static void silent_stream_enable(struct hda_codec *codec, in silent_stream_enable() argument
1703 struct hdmi_spec *spec = codec->spec; in silent_stream_enable()
1706 int keep_power = 0; in silent_stream_enable()
1709 * Power-up will call hdmi_present_sense, so the PM calls in silent_stream_enable()
1713 err = snd_hda_power_up_pm(codec); in silent_stream_enable()
1714 if (err < 0 && err != -EACCES) { in silent_stream_enable()
1715 codec_err(codec, in silent_stream_enable()
1716 "Failed to power up codec for silent stream enable ret=[%d]\n", err); in silent_stream_enable()
1717 snd_hda_power_down_pm(codec); in silent_stream_enable()
1721 mutex_lock(&per_pin->lock); in silent_stream_enable()
1723 if (per_pin->setup) { in silent_stream_enable()
1724 codec_dbg(codec, "hdmi: PCM already open, no silent stream\n"); in silent_stream_enable()
1725 err = -EBUSY; in silent_stream_enable()
1729 pin_idx = pin_id_to_pin_index(codec, per_pin->pin_nid, per_pin->dev_id); in silent_stream_enable()
1730 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, true); in silent_stream_enable()
1732 codec_err(codec, "hdmi: no free converter to enable silent mode\n"); in silent_stream_enable()
1737 per_cvt->silent_stream = true; in silent_stream_enable()
1738 per_pin->cvt_nid = per_cvt->cvt_nid; in silent_stream_enable()
1739 per_pin->silent_stream = true; in silent_stream_enable()
1741 codec_dbg(codec, "hdmi: enabling silent stream pin-NID=0x%x cvt-NID=0x%x\n", in silent_stream_enable()
1742 per_pin->pin_nid, per_cvt->cvt_nid); in silent_stream_enable()
1744 snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id); in silent_stream_enable()
1745 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, in silent_stream_enable()
1747 per_pin->mux_idx); in silent_stream_enable()
1750 pin_cvt_fixup(codec, per_pin, 0); in silent_stream_enable()
1752 switch (spec->silent_stream_type) { in silent_stream_enable()
1754 silent_stream_enable_i915(codec, per_pin); in silent_stream_enable()
1755 silent_stream_set_kae(codec, per_pin, true); in silent_stream_enable()
1758 silent_stream_enable_i915(codec, per_pin); in silent_stream_enable()
1766 mutex_unlock(&per_pin->lock); in silent_stream_enable()
1769 snd_hda_power_down_pm(codec); in silent_stream_enable()
1772 static void silent_stream_disable(struct hda_codec *codec, in silent_stream_disable() argument
1775 struct hdmi_spec *spec = codec->spec; in silent_stream_disable()
1779 err = snd_hda_power_up_pm(codec); in silent_stream_disable()
1780 if (err < 0 && err != -EACCES) { in silent_stream_disable()
1781 codec_err(codec, in silent_stream_disable()
1782 "Failed to power up codec for silent stream disable ret=[%d]\n", in silent_stream_disable()
1784 snd_hda_power_down_pm(codec); in silent_stream_disable()
1788 mutex_lock(&per_pin->lock); in silent_stream_disable()
1789 if (!per_pin->silent_stream) in silent_stream_disable()
1792 codec_dbg(codec, "HDMI: disable silent stream on pin-NID=0x%x cvt-NID=0x%x\n", in silent_stream_disable()
1793 per_pin->pin_nid, per_pin->cvt_nid); in silent_stream_disable()
1795 cvt_idx = cvt_nid_to_cvt_index(codec, per_pin->cvt_nid); in silent_stream_disable()
1796 if (cvt_idx >= 0 && cvt_idx < spec->num_cvts) { in silent_stream_disable()
1798 per_cvt->silent_stream = false; in silent_stream_disable()
1801 if (spec->silent_stream_type == SILENT_STREAM_I915) { in silent_stream_disable()
1803 snd_hda_power_down_pm(codec); in silent_stream_disable()
1804 } else if (spec->silent_stream_type == SILENT_STREAM_KAE) { in silent_stream_disable()
1805 silent_stream_set_kae(codec, per_pin, false); in silent_stream_disable()
1808 per_pin->cvt_nid = 0; in silent_stream_disable()
1809 per_pin->silent_stream = false; in silent_stream_disable()
1812 mutex_unlock(&per_pin->lock); in silent_stream_disable()
1814 snd_hda_power_down_pm(codec); in silent_stream_disable()
1818 static void sync_eld_via_acomp(struct hda_codec *codec, in sync_eld_via_acomp() argument
1821 struct hdmi_spec *spec = codec->spec; in sync_eld_via_acomp()
1822 struct hdmi_eld *eld = &spec->temp_eld; in sync_eld_via_acomp()
1825 mutex_lock(&per_pin->lock); in sync_eld_via_acomp()
1826 eld->monitor_present = false; in sync_eld_via_acomp()
1827 monitor_prev = per_pin->sink_eld.monitor_present; in sync_eld_via_acomp()
1828 eld->eld_size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid, in sync_eld_via_acomp()
1829 per_pin->dev_id, &eld->monitor_present, in sync_eld_via_acomp()
1830 eld->eld_buffer, ELD_MAX_SIZE); in sync_eld_via_acomp()
1831 eld->eld_valid = (eld->eld_size > 0); in sync_eld_via_acomp()
1832 update_eld(codec, per_pin, eld, 0); in sync_eld_via_acomp()
1833 monitor_next = per_pin->sink_eld.monitor_present; in sync_eld_via_acomp()
1834 mutex_unlock(&per_pin->lock); in sync_eld_via_acomp()
1836 if (spec->silent_stream_type) { in sync_eld_via_acomp()
1838 silent_stream_enable(codec, per_pin); in sync_eld_via_acomp()
1840 silent_stream_disable(codec, per_pin); in sync_eld_via_acomp()
1846 struct hda_codec *codec = per_pin->codec; in hdmi_present_sense() local
1848 if (!codec_has_acomp(codec)) in hdmi_present_sense()
1851 sync_eld_via_acomp(codec, per_pin); in hdmi_present_sense()
1858 struct hda_codec *codec = per_pin->codec; in hdmi_repoll_eld() local
1859 struct hdmi_spec *spec = codec->spec; in hdmi_repoll_eld()
1862 jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid, in hdmi_repoll_eld()
1863 per_pin->dev_id); in hdmi_repoll_eld()
1865 jack->jack_dirty = 1; in hdmi_repoll_eld()
1867 if (per_pin->repoll_count++ > 6) in hdmi_repoll_eld()
1868 per_pin->repoll_count = 0; in hdmi_repoll_eld()
1870 mutex_lock(&spec->pcm_lock); in hdmi_repoll_eld()
1871 hdmi_present_sense(per_pin, per_pin->repoll_count); in hdmi_repoll_eld()
1872 mutex_unlock(&spec->pcm_lock); in hdmi_repoll_eld()
1875 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) in hdmi_add_pin() argument
1877 struct hdmi_spec *spec = codec->spec; in hdmi_add_pin()
1884 caps = snd_hda_query_pin_caps(codec, pin_nid); in hdmi_add_pin()
1886 return 0; in hdmi_add_pin()
1892 config = snd_hda_codec_get_pincfg(codec, pin_nid); in hdmi_add_pin()
1894 !spec->force_connect) in hdmi_add_pin()
1895 return 0; in hdmi_add_pin()
1901 if (spec->intel_hsw_fixup) { in hdmi_add_pin()
1908 dev_num = spec->dev_num; in hdmi_add_pin()
1909 } else if (codec->dp_mst) { in hdmi_add_pin()
1910 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1; in hdmi_add_pin()
1912 * spec->dev_num is the maxinum number of device entries in hdmi_add_pin()
1915 spec->dev_num = (spec->dev_num > dev_num) ? in hdmi_add_pin()
1916 spec->dev_num : dev_num; in hdmi_add_pin()
1924 spec->dev_num = 1; in hdmi_add_pin()
1927 for (i = 0; i < dev_num; i++) { in hdmi_add_pin()
1928 pin_idx = spec->num_pins; in hdmi_add_pin()
1929 per_pin = snd_array_new(&spec->pins); in hdmi_add_pin()
1932 return -ENOMEM; in hdmi_add_pin()
1934 per_pin->pcm = NULL; in hdmi_add_pin()
1935 per_pin->pcm_idx = -1; in hdmi_add_pin()
1936 per_pin->prev_pcm_idx = -1; in hdmi_add_pin()
1937 per_pin->pin_nid = pin_nid; in hdmi_add_pin()
1938 per_pin->pin_nid_idx = spec->num_nids; in hdmi_add_pin()
1939 per_pin->dev_id = i; in hdmi_add_pin()
1940 per_pin->non_pcm = false; in hdmi_add_pin()
1941 snd_hda_set_dev_select(codec, pin_nid, i); in hdmi_add_pin()
1942 err = hdmi_read_pin_conn(codec, pin_idx); in hdmi_add_pin()
1943 if (err < 0) in hdmi_add_pin()
1945 if (!is_jack_detectable(codec, pin_nid)) in hdmi_add_pin()
1946 codec_warn(codec, "HDMI: pin NID 0x%x - jack not detectable\n", pin_nid); in hdmi_add_pin()
1947 spec->num_pins++; in hdmi_add_pin()
1949 spec->num_nids++; in hdmi_add_pin()
1951 return 0; in hdmi_add_pin()
1954 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) in hdmi_add_cvt() argument
1956 struct hdmi_spec *spec = codec->spec; in hdmi_add_cvt()
1961 chans = get_wcaps(codec, cvt_nid); in hdmi_add_cvt()
1964 per_cvt = snd_array_new(&spec->cvts); in hdmi_add_cvt()
1966 return -ENOMEM; in hdmi_add_cvt()
1968 per_cvt->cvt_nid = cvt_nid; in hdmi_add_cvt()
1969 per_cvt->channels_min = 2; in hdmi_add_cvt()
1971 per_cvt->channels_max = chans; in hdmi_add_cvt()
1972 if (chans > spec->chmap.channels_max) in hdmi_add_cvt()
1973 spec->chmap.channels_max = chans; in hdmi_add_cvt()
1976 err = snd_hda_query_supported_pcm(codec, cvt_nid, in hdmi_add_cvt()
1977 &per_cvt->rates, in hdmi_add_cvt()
1978 &per_cvt->formats, in hdmi_add_cvt()
1980 &per_cvt->maxbps); in hdmi_add_cvt()
1981 if (err < 0) in hdmi_add_cvt()
1984 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids)) in hdmi_add_cvt()
1985 spec->cvt_nids[spec->num_cvts] = cvt_nid; in hdmi_add_cvt()
1986 spec->num_cvts++; in hdmi_add_cvt()
1988 return 0; in hdmi_add_cvt()
1992 SND_PCI_QUIRK(0x103c, 0x83e2, "HP EliteDesk 800 G4", 1),
1993 SND_PCI_QUIRK(0x103c, 0x83ef, "HP MP9 G4 Retail System AMS", 1),
1994 SND_PCI_QUIRK(0x103c, 0x870f, "HP", 1),
1995 SND_PCI_QUIRK(0x103c, 0x871a, "HP", 1),
1996 SND_PCI_QUIRK(0x103c, 0x8711, "HP", 1),
1997 SND_PCI_QUIRK(0x103c, 0x8715, "HP", 1),
1998 SND_PCI_QUIRK(0x1043, 0x86ae, "ASUS", 1), /* Z170 PRO */
1999 SND_PCI_QUIRK(0x1043, 0x86c7, "ASUS", 1), /* Z170M PLUS */
2000 SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
2001 SND_PCI_QUIRK(0x8086, 0x2060, "Intel NUC5CPYB", 1),
2002 SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", 1),
2006 static int hdmi_parse_codec(struct hda_codec *codec) in hdmi_parse_codec() argument
2008 struct hdmi_spec *spec = codec->spec; in hdmi_parse_codec()
2014 nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &start_nid); in hdmi_parse_codec()
2015 if (!start_nid || nodes < 0) { in hdmi_parse_codec()
2016 codec_warn(codec, "HDMI: failed to get afg sub nodes\n"); in hdmi_parse_codec()
2017 return -EINVAL; in hdmi_parse_codec()
2021 spec->force_connect = true; in hdmi_parse_codec()
2023 q = snd_pci_quirk_lookup(codec->bus->pci, force_connect_list); in hdmi_parse_codec()
2025 if (q && q->value) in hdmi_parse_codec()
2026 spec->force_connect = true; in hdmi_parse_codec()
2032 for (i = 0; i < nodes; i++) { in hdmi_parse_codec()
2035 caps = get_wcaps(codec, nid); in hdmi_parse_codec()
2041 hdmi_add_cvt(codec, nid); in hdmi_parse_codec()
2045 for (i = 0; i < nodes; i++) { in hdmi_parse_codec()
2048 caps = get_wcaps(codec, nid); in hdmi_parse_codec()
2054 hdmi_add_pin(codec, nid); in hdmi_parse_codec()
2057 return 0; in hdmi_parse_codec()
2062 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) in check_non_pcm_per_cvt() argument
2067 mutex_lock(&codec->spdif_mutex); in check_non_pcm_per_cvt()
2068 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid); in check_non_pcm_per_cvt()
2073 mutex_unlock(&codec->spdif_mutex); in check_non_pcm_per_cvt()
2076 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO); in check_non_pcm_per_cvt()
2077 mutex_unlock(&codec->spdif_mutex); in check_non_pcm_per_cvt()
2086 struct hda_codec *codec, in generic_hdmi_playback_pcm_prepare() argument
2091 hda_nid_t cvt_nid = hinfo->nid; in generic_hdmi_playback_pcm_prepare()
2092 struct hdmi_spec *spec = codec->spec; in generic_hdmi_playback_pcm_prepare()
2095 struct snd_pcm_runtime *runtime = substream->runtime; in generic_hdmi_playback_pcm_prepare()
2098 int err = 0; in generic_hdmi_playback_pcm_prepare()
2100 mutex_lock(&spec->pcm_lock); in generic_hdmi_playback_pcm_prepare()
2101 pin_idx = hinfo_to_pin_index(codec, hinfo); in generic_hdmi_playback_pcm_prepare()
2102 if (pin_idx < 0) { in generic_hdmi_playback_pcm_prepare()
2103 /* when pcm is not bound to a pin skip pin setup and return 0 in generic_hdmi_playback_pcm_prepare()
2106 pin_cvt_fixup(codec, NULL, cvt_nid); in generic_hdmi_playback_pcm_prepare()
2107 snd_hda_codec_setup_stream(codec, cvt_nid, in generic_hdmi_playback_pcm_prepare()
2108 stream_tag, 0, format); in generic_hdmi_playback_pcm_prepare()
2122 pin_cvt_fixup(codec, per_pin, 0); in generic_hdmi_playback_pcm_prepare()
2126 if (codec_has_acomp(codec)) in generic_hdmi_playback_pcm_prepare()
2127 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid, in generic_hdmi_playback_pcm_prepare()
2128 per_pin->dev_id, runtime->rate); in generic_hdmi_playback_pcm_prepare()
2130 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid); in generic_hdmi_playback_pcm_prepare()
2131 mutex_lock(&per_pin->lock); in generic_hdmi_playback_pcm_prepare()
2132 per_pin->channels = substream->runtime->channels; in generic_hdmi_playback_pcm_prepare()
2133 per_pin->setup = true; in generic_hdmi_playback_pcm_prepare()
2135 if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) { in generic_hdmi_playback_pcm_prepare()
2136 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core, in generic_hdmi_playback_pcm_prepare()
2138 snd_hda_codec_write(codec, cvt_nid, 0, in generic_hdmi_playback_pcm_prepare()
2143 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm); in generic_hdmi_playback_pcm_prepare()
2144 mutex_unlock(&per_pin->lock); in generic_hdmi_playback_pcm_prepare()
2145 if (spec->dyn_pin_out) { in generic_hdmi_playback_pcm_prepare()
2146 snd_hda_set_dev_select(codec, per_pin->pin_nid, in generic_hdmi_playback_pcm_prepare()
2147 per_pin->dev_id); in generic_hdmi_playback_pcm_prepare()
2148 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, in generic_hdmi_playback_pcm_prepare()
2149 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in generic_hdmi_playback_pcm_prepare()
2150 snd_hda_codec_write(codec, per_pin->pin_nid, 0, in generic_hdmi_playback_pcm_prepare()
2156 err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid, in generic_hdmi_playback_pcm_prepare()
2157 per_pin->dev_id, stream_tag, format); in generic_hdmi_playback_pcm_prepare()
2159 mutex_unlock(&spec->pcm_lock); in generic_hdmi_playback_pcm_prepare()
2164 struct hda_codec *codec, in generic_hdmi_playback_pcm_cleanup() argument
2167 snd_hda_codec_cleanup_stream(codec, hinfo->nid); in generic_hdmi_playback_pcm_cleanup()
2168 return 0; in generic_hdmi_playback_pcm_cleanup()
2172 struct hda_codec *codec, in hdmi_pcm_close() argument
2175 struct hdmi_spec *spec = codec->spec; in hdmi_pcm_close()
2180 int err = 0; in hdmi_pcm_close()
2182 mutex_lock(&spec->pcm_lock); in hdmi_pcm_close()
2183 if (hinfo->nid) { in hdmi_pcm_close()
2184 pcm_idx = hinfo_to_pcm_index(codec, hinfo); in hdmi_pcm_close()
2185 if (snd_BUG_ON(pcm_idx < 0)) { in hdmi_pcm_close()
2186 err = -EINVAL; in hdmi_pcm_close()
2189 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid); in hdmi_pcm_close()
2190 if (snd_BUG_ON(cvt_idx < 0)) { in hdmi_pcm_close()
2191 err = -EINVAL; in hdmi_pcm_close()
2195 per_cvt->assigned = false; in hdmi_pcm_close()
2196 hinfo->nid = 0; in hdmi_pcm_close()
2198 azx_stream(get_azx_dev(substream))->stripe = 0; in hdmi_pcm_close()
2200 snd_hda_spdif_ctls_unassign(codec, pcm_idx); in hdmi_pcm_close()
2201 clear_bit(pcm_idx, &spec->pcm_in_use); in hdmi_pcm_close()
2202 pin_idx = hinfo_to_pin_index(codec, hinfo); in hdmi_pcm_close()
2204 * In such a case, return 0 to match the behavior in in hdmi_pcm_close()
2207 if (pin_idx < 0) in hdmi_pcm_close()
2212 if (spec->dyn_pin_out) { in hdmi_pcm_close()
2213 snd_hda_set_dev_select(codec, per_pin->pin_nid, in hdmi_pcm_close()
2214 per_pin->dev_id); in hdmi_pcm_close()
2215 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, in hdmi_pcm_close()
2216 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); in hdmi_pcm_close()
2217 snd_hda_codec_write(codec, per_pin->pin_nid, 0, in hdmi_pcm_close()
2222 mutex_lock(&per_pin->lock); in hdmi_pcm_close()
2223 per_pin->chmap_set = false; in hdmi_pcm_close()
2224 memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); in hdmi_pcm_close()
2226 per_pin->setup = false; in hdmi_pcm_close()
2227 per_pin->channels = 0; in hdmi_pcm_close()
2228 mutex_unlock(&per_pin->lock); in hdmi_pcm_close()
2232 mutex_unlock(&spec->pcm_lock); in hdmi_pcm_close()
2246 struct hda_codec *codec = hdac_to_hda_codec(hdac); in hdmi_get_spk_alloc() local
2247 struct hdmi_spec *spec = codec->spec; in hdmi_get_spk_alloc()
2251 return 0; in hdmi_get_spk_alloc()
2253 return per_pin->sink_eld.info.spk_alloc; in hdmi_get_spk_alloc()
2259 struct hda_codec *codec = hdac_to_hda_codec(hdac); in hdmi_get_chmap() local
2260 struct hdmi_spec *spec = codec->spec; in hdmi_get_chmap()
2263 /* chmap is already set to 0 in caller */ in hdmi_get_chmap()
2267 memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap)); in hdmi_get_chmap()
2273 struct hda_codec *codec = hdac_to_hda_codec(hdac); in hdmi_set_chmap() local
2274 struct hdmi_spec *spec = codec->spec; in hdmi_set_chmap()
2279 mutex_lock(&per_pin->lock); in hdmi_set_chmap()
2280 per_pin->chmap_set = true; in hdmi_set_chmap()
2281 memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap)); in hdmi_set_chmap()
2283 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); in hdmi_set_chmap()
2284 mutex_unlock(&per_pin->lock); in hdmi_set_chmap()
2289 struct hda_codec *codec = hdac_to_hda_codec(hdac); in is_hdmi_pcm_attached() local
2290 struct hdmi_spec *spec = codec->spec; in is_hdmi_pcm_attached()
2296 static int generic_hdmi_build_pcms(struct hda_codec *codec) in generic_hdmi_build_pcms() argument
2298 struct hdmi_spec *spec = codec->spec; in generic_hdmi_build_pcms()
2301 /* limit the PCM devices to the codec converters or available PINs */ in generic_hdmi_build_pcms()
2302 pcm_num = min(spec->num_cvts, spec->num_pins); in generic_hdmi_build_pcms()
2303 codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num); in generic_hdmi_build_pcms()
2305 for (idx = 0; idx < pcm_num; idx++) { in generic_hdmi_build_pcms()
2310 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx); in generic_hdmi_build_pcms()
2312 return -ENOMEM; in generic_hdmi_build_pcms()
2314 spec->pcm_rec[idx].pcm = info; in generic_hdmi_build_pcms()
2315 spec->pcm_used++; in generic_hdmi_build_pcms()
2316 info->pcm_type = HDA_PCM_TYPE_HDMI; in generic_hdmi_build_pcms()
2317 info->own_chmap = true; in generic_hdmi_build_pcms()
2319 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; in generic_hdmi_build_pcms()
2320 pstr->substreams = 1; in generic_hdmi_build_pcms()
2321 pstr->ops = generic_ops; in generic_hdmi_build_pcms()
2323 per_cvt = get_cvt(spec, 0); in generic_hdmi_build_pcms()
2324 pstr->channels_min = per_cvt->channels_min; in generic_hdmi_build_pcms()
2325 pstr->channels_max = per_cvt->channels_max; in generic_hdmi_build_pcms()
2328 if (spec->pcm_used >= ARRAY_SIZE(spec->pcm_rec)) in generic_hdmi_build_pcms()
2333 return 0; in generic_hdmi_build_pcms()
2338 struct hdmi_pcm *pcm = jack->private_data; in free_hdmi_jack_priv()
2340 pcm->jack = NULL; in free_hdmi_jack_priv()
2343 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx) in generic_hdmi_build_jack() argument
2346 struct hdmi_spec *spec = codec->spec; in generic_hdmi_build_jack()
2348 int pcmdev = get_pcm_rec(spec, pcm_idx)->device; in generic_hdmi_build_jack()
2351 if (pcmdev > 0) in generic_hdmi_build_jack()
2354 err = snd_jack_new(codec->card, hdmi_str, SND_JACK_AVOUT, &jack, in generic_hdmi_build_jack()
2356 if (err < 0) in generic_hdmi_build_jack()
2359 spec->pcm_rec[pcm_idx].jack = jack; in generic_hdmi_build_jack()
2360 jack->private_data = &spec->pcm_rec[pcm_idx]; in generic_hdmi_build_jack()
2361 jack->private_free = free_hdmi_jack_priv; in generic_hdmi_build_jack()
2362 return 0; in generic_hdmi_build_jack()
2365 static int generic_hdmi_build_controls(struct hda_codec *codec) in generic_hdmi_build_controls() argument
2367 struct hdmi_spec *spec = codec->spec; in generic_hdmi_build_controls()
2371 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) { in generic_hdmi_build_controls()
2372 if (!get_pcm_rec(spec, pcm_idx)->pcm) { in generic_hdmi_build_controls()
2374 set_bit(pcm_idx, &spec->pcm_bitmap); in generic_hdmi_build_controls()
2378 err = generic_hdmi_build_jack(codec, pcm_idx); in generic_hdmi_build_controls()
2379 if (err < 0) in generic_hdmi_build_controls()
2385 err = snd_hda_create_dig_out_ctls(codec, in generic_hdmi_build_controls()
2386 0, spec->cvt_nids[0], in generic_hdmi_build_controls()
2388 if (err < 0) in generic_hdmi_build_controls()
2390 snd_hda_spdif_ctls_unassign(codec, pcm_idx); in generic_hdmi_build_controls()
2392 dev = get_pcm_rec(spec, pcm_idx)->device; in generic_hdmi_build_controls()
2395 err = hdmi_create_eld_ctl(codec, pcm_idx, dev); in generic_hdmi_build_controls()
2396 if (err < 0) in generic_hdmi_build_controls()
2401 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_build_controls()
2403 struct hdmi_eld *pin_eld = &per_pin->sink_eld; in generic_hdmi_build_controls()
2405 if (spec->static_pcm_mapping) { in generic_hdmi_build_controls()
2410 pin_eld->eld_valid = false; in generic_hdmi_build_controls()
2411 hdmi_present_sense(per_pin, 0); in generic_hdmi_build_controls()
2415 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) { in generic_hdmi_build_controls()
2419 if (!pcm || !pcm->pcm) in generic_hdmi_build_controls()
2421 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap); in generic_hdmi_build_controls()
2422 if (err < 0) in generic_hdmi_build_controls()
2426 return 0; in generic_hdmi_build_controls()
2429 static int generic_hdmi_init_per_pins(struct hda_codec *codec) in generic_hdmi_init_per_pins() argument
2431 struct hdmi_spec *spec = codec->spec; in generic_hdmi_init_per_pins()
2434 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_init_per_pins()
2437 per_pin->codec = codec; in generic_hdmi_init_per_pins()
2438 mutex_init(&per_pin->lock); in generic_hdmi_init_per_pins()
2439 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); in generic_hdmi_init_per_pins()
2442 return 0; in generic_hdmi_init_per_pins()
2445 static int generic_hdmi_init(struct hda_codec *codec) in generic_hdmi_init() argument
2447 struct hdmi_spec *spec = codec->spec; in generic_hdmi_init()
2450 mutex_lock(&spec->bind_lock); in generic_hdmi_init()
2451 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_init()
2453 hda_nid_t pin_nid = per_pin->pin_nid; in generic_hdmi_init()
2454 int dev_id = per_pin->dev_id; in generic_hdmi_init()
2456 snd_hda_set_dev_select(codec, pin_nid, dev_id); in generic_hdmi_init()
2457 hdmi_init_pin(codec, pin_nid); in generic_hdmi_init()
2458 if (codec_has_acomp(codec)) in generic_hdmi_init()
2460 snd_hda_jack_detect_enable_callback_mst(codec, pin_nid, dev_id, in generic_hdmi_init()
2463 mutex_unlock(&spec->bind_lock); in generic_hdmi_init()
2464 return 0; in generic_hdmi_init()
2469 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums); in hdmi_array_init()
2470 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums); in hdmi_array_init()
2475 snd_array_free(&spec->pins); in hdmi_array_free()
2476 snd_array_free(&spec->cvts); in hdmi_array_free()
2479 static void generic_spec_free(struct hda_codec *codec) in generic_spec_free() argument
2481 struct hdmi_spec *spec = codec->spec; in generic_spec_free()
2486 codec->spec = NULL; in generic_spec_free()
2488 codec->dp_mst = false; in generic_spec_free()
2491 static void generic_hdmi_free(struct hda_codec *codec) in generic_hdmi_free() argument
2493 struct hdmi_spec *spec = codec->spec; in generic_hdmi_free()
2496 if (spec->acomp_registered) { in generic_hdmi_free()
2497 snd_hdac_acomp_exit(&codec->bus->core); in generic_hdmi_free()
2498 } else if (codec_has_acomp(codec)) { in generic_hdmi_free()
2499 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL); in generic_hdmi_free()
2501 codec->relaxed_resume = 0; in generic_hdmi_free()
2503 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_free()
2505 cancel_delayed_work_sync(&per_pin->work); in generic_hdmi_free()
2509 for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) { in generic_hdmi_free()
2510 if (spec->pcm_rec[pcm_idx].jack == NULL) in generic_hdmi_free()
2512 snd_device_free(codec->card, spec->pcm_rec[pcm_idx].jack); in generic_hdmi_free()
2515 generic_spec_free(codec); in generic_hdmi_free()
2518 static int generic_hdmi_suspend(struct hda_codec *codec) in generic_hdmi_suspend() argument
2520 struct hdmi_spec *spec = codec->spec; in generic_hdmi_suspend()
2523 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_suspend()
2525 cancel_delayed_work_sync(&per_pin->work); in generic_hdmi_suspend()
2527 return 0; in generic_hdmi_suspend()
2530 static int generic_hdmi_resume(struct hda_codec *codec) in generic_hdmi_resume() argument
2532 struct hdmi_spec *spec = codec->spec; in generic_hdmi_resume()
2535 codec->patch_ops.init(codec); in generic_hdmi_resume()
2536 snd_hda_regmap_sync(codec); in generic_hdmi_resume()
2538 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in generic_hdmi_resume()
2542 return 0; in generic_hdmi_resume()
2562 /* allocate codec->spec and assign/initialize generic parser ops */
2563 static int alloc_generic_hdmi(struct hda_codec *codec) in alloc_generic_hdmi() argument
2569 return -ENOMEM; in alloc_generic_hdmi()
2571 spec->codec = codec; in alloc_generic_hdmi()
2572 spec->ops = generic_standard_hdmi_ops; in alloc_generic_hdmi()
2573 spec->dev_num = 1; /* initialize to 1 */ in alloc_generic_hdmi()
2574 mutex_init(&spec->pcm_lock); in alloc_generic_hdmi()
2575 mutex_init(&spec->bind_lock); in alloc_generic_hdmi()
2576 snd_hdac_register_chmap_ops(&codec->core, &spec->chmap); in alloc_generic_hdmi()
2578 spec->chmap.ops.get_chmap = hdmi_get_chmap; in alloc_generic_hdmi()
2579 spec->chmap.ops.set_chmap = hdmi_set_chmap; in alloc_generic_hdmi()
2580 spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached; in alloc_generic_hdmi()
2581 spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc; in alloc_generic_hdmi()
2583 codec->spec = spec; in alloc_generic_hdmi()
2586 codec->patch_ops = generic_hdmi_patch_ops; in alloc_generic_hdmi()
2588 return 0; in alloc_generic_hdmi()
2592 static int patch_generic_hdmi(struct hda_codec *codec) in patch_generic_hdmi() argument
2596 err = alloc_generic_hdmi(codec); in patch_generic_hdmi()
2597 if (err < 0) in patch_generic_hdmi()
2600 err = hdmi_parse_codec(codec); in patch_generic_hdmi()
2601 if (err < 0) { in patch_generic_hdmi()
2602 generic_spec_free(codec); in patch_generic_hdmi()
2606 generic_hdmi_init_per_pins(codec); in patch_generic_hdmi()
2607 return 0; in patch_generic_hdmi()
2615 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid, in reprogram_jack_detect() argument
2620 tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id); in reprogram_jack_detect()
2622 /* clear unsol even if component notifier is used, or re-enable in reprogram_jack_detect()
2625 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag); in reprogram_jack_detect()
2626 snd_hda_codec_write_cache(codec, nid, 0, in reprogram_jack_detect()
2638 spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops); in generic_acomp_notifier_set()
2639 mutex_lock(&spec->bind_lock); in generic_acomp_notifier_set()
2640 spec->use_acomp_notifier = use_acomp; in generic_acomp_notifier_set()
2641 spec->codec->relaxed_resume = use_acomp; in generic_acomp_notifier_set()
2642 spec->codec->bus->keep_power = 0; in generic_acomp_notifier_set()
2644 for (i = 0; i < spec->num_pins; i++) in generic_acomp_notifier_set()
2645 reprogram_jack_detect(spec->codec, in generic_acomp_notifier_set()
2646 get_pin(spec, i)->pin_nid, in generic_acomp_notifier_set()
2647 get_pin(spec, i)->dev_id, in generic_acomp_notifier_set()
2649 mutex_unlock(&spec->bind_lock); in generic_acomp_notifier_set()
2657 return 0; in generic_acomp_master_bind()
2666 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2672 if (!dev_is_pci(dev) || !dev_is_pci(bus->dev)) in match_bound_vga()
2673 return 0; in match_bound_vga()
2674 master = to_pci_dev(bus->dev); in match_bound_vga()
2676 return master->bus == pci->bus; in match_bound_vga()
2682 struct hda_codec *codec = audio_ptr; in generic_acomp_pin_eld_notify() local
2683 struct hdmi_spec *spec = codec->spec; in generic_acomp_pin_eld_notify()
2684 hda_nid_t pin_nid = spec->port2pin(codec, port); in generic_acomp_pin_eld_notify()
2688 if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN) in generic_acomp_pin_eld_notify()
2693 if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND) in generic_acomp_pin_eld_notify()
2696 check_presence_and_report(codec, pin_nid, dev_id); in generic_acomp_pin_eld_notify()
2700 static void setup_drm_audio_ops(struct hda_codec *codec, in setup_drm_audio_ops() argument
2703 struct hdmi_spec *spec = codec->spec; in setup_drm_audio_ops()
2705 spec->drm_audio_ops.audio_ptr = codec; in setup_drm_audio_ops()
2711 spec->drm_audio_ops.pin2port = ops->pin2port; in setup_drm_audio_ops()
2712 spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify; in setup_drm_audio_ops()
2713 spec->drm_audio_ops.master_bind = ops->master_bind; in setup_drm_audio_ops()
2714 spec->drm_audio_ops.master_unbind = ops->master_unbind; in setup_drm_audio_ops()
2718 static void generic_acomp_init(struct hda_codec *codec, in generic_acomp_init() argument
2722 struct hdmi_spec *spec = codec->spec; in generic_acomp_init()
2725 codec_info(codec, "audio component disabled by module option\n"); in generic_acomp_init()
2729 spec->port2pin = port2pin; in generic_acomp_init()
2730 setup_drm_audio_ops(codec, ops); in generic_acomp_init()
2731 if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops, in generic_acomp_init()
2732 match_bound_vga, 0)) { in generic_acomp_init()
2733 spec->acomp_registered = true; in generic_acomp_init()
2738 * Intel codec parsers and helpers
2741 #define INTEL_GET_VENDOR_VERB 0xf81
2742 #define INTEL_SET_VENDOR_VERB 0x781
2743 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
2744 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
2746 static void intel_haswell_enable_all_pins(struct hda_codec *codec, in intel_haswell_enable_all_pins() argument
2750 struct hdmi_spec *spec = codec->spec; in intel_haswell_enable_all_pins()
2752 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
2753 INTEL_GET_VENDOR_VERB, 0); in intel_haswell_enable_all_pins()
2754 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) in intel_haswell_enable_all_pins()
2758 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
2760 if (vendor_param == -1) in intel_haswell_enable_all_pins()
2764 snd_hda_codec_update_widgets(codec); in intel_haswell_enable_all_pins()
2767 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec) in intel_haswell_fixup_enable_dp12() argument
2770 struct hdmi_spec *spec = codec->spec; in intel_haswell_fixup_enable_dp12()
2772 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_fixup_enable_dp12()
2773 INTEL_GET_VENDOR_VERB, 0); in intel_haswell_fixup_enable_dp12()
2774 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12) in intel_haswell_fixup_enable_dp12()
2779 snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB); in intel_haswell_fixup_enable_dp12()
2780 snd_hda_codec_write_cache(codec, spec->vendor_nid, 0, in intel_haswell_fixup_enable_dp12()
2784 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2787 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg, in haswell_set_power_state() argument
2791 intel_haswell_enable_all_pins(codec, false); in haswell_set_power_state()
2792 intel_haswell_fixup_enable_dp12(codec); in haswell_set_power_state()
2795 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state); in haswell_set_power_state()
2796 snd_hda_codec_set_power_to_all(codec, fg, power_state); in haswell_set_power_state()
2801 * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2802 * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2803 * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2806 * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2807 * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2808 * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2810 static int intel_base_nid(struct hda_codec *codec) in intel_base_nid() argument
2812 switch (codec->core.vendor_id) { in intel_base_nid()
2813 case 0x80860054: /* ILK */ in intel_base_nid()
2814 case 0x80862804: /* ILK */ in intel_base_nid()
2815 case 0x80862882: /* VLV */ in intel_base_nid()
2824 struct hda_codec *codec = audio_ptr; in intel_pin2port() local
2825 struct hdmi_spec *spec = codec->spec; in intel_pin2port()
2828 if (!spec->port_num) { in intel_pin2port()
2829 base_nid = intel_base_nid(codec); in intel_pin2port()
2831 return -1; in intel_pin2port()
2832 return pin_nid - base_nid + 1; in intel_pin2port()
2839 for (i = 0; i < spec->port_num; i++) { in intel_pin2port()
2840 if (pin_nid == spec->port_map[i]) in intel_pin2port()
2844 codec_info(codec, "Can't find the HDMI/DP port for pin NID 0x%x\n", pin_nid); in intel_pin2port()
2845 return -1; in intel_pin2port()
2848 static int intel_port2pin(struct hda_codec *codec, int port) in intel_port2pin() argument
2850 struct hdmi_spec *spec = codec->spec; in intel_port2pin()
2852 if (!spec->port_num) { in intel_port2pin()
2853 /* we assume only from port-B to port-D */ in intel_port2pin()
2855 return 0; in intel_port2pin()
2856 return port + intel_base_nid(codec) - 1; in intel_port2pin()
2859 if (port < 0 || port >= spec->port_num) in intel_port2pin()
2860 return 0; in intel_port2pin()
2861 return spec->port_map[port]; in intel_port2pin()
2866 struct hda_codec *codec = audio_ptr; in intel_pin_eld_notify() local
2870 pin_nid = intel_port2pin(codec, port); in intel_pin_eld_notify()
2876 if (codec->core.dev.power.power_state.event == PM_EVENT_SUSPEND) in intel_pin_eld_notify()
2879 snd_hdac_i915_set_bclk(&codec->bus->core); in intel_pin_eld_notify()
2880 check_presence_and_report(codec, pin_nid, dev_id); in intel_pin_eld_notify()
2889 static void register_i915_notifier(struct hda_codec *codec) in register_i915_notifier() argument
2891 struct hdmi_spec *spec = codec->spec; in register_i915_notifier()
2893 spec->use_acomp_notifier = true; in register_i915_notifier()
2894 spec->port2pin = intel_port2pin; in register_i915_notifier()
2895 setup_drm_audio_ops(codec, &intel_audio_ops); in register_i915_notifier()
2896 snd_hdac_acomp_register_notifier(&codec->bus->core, in register_i915_notifier()
2897 &spec->drm_audio_ops); in register_i915_notifier()
2899 codec->relaxed_resume = 1; in register_i915_notifier()
2903 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, in i915_hsw_setup_stream() argument
2907 struct hdmi_spec *spec = codec->spec; in i915_hsw_setup_stream()
2908 int pin_idx = pin_id_to_pin_index(codec, pin_nid, dev_id); in i915_hsw_setup_stream()
2912 if (pin_idx < 0) in i915_hsw_setup_stream()
2917 haswell_verify_D0(codec, cvt_nid, pin_nid); in i915_hsw_setup_stream()
2919 if (spec->silent_stream_type == SILENT_STREAM_KAE && per_pin && per_pin->silent_stream) { in i915_hsw_setup_stream()
2920 silent_stream_set_kae(codec, per_pin, false); in i915_hsw_setup_stream()
2921 /* wait for pending transfers in codec to clear */ in i915_hsw_setup_stream()
2925 res = hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id, in i915_hsw_setup_stream()
2928 if (spec->silent_stream_type == SILENT_STREAM_KAE && per_pin && per_pin->silent_stream) { in i915_hsw_setup_stream()
2930 silent_stream_set_kae(codec, per_pin, true); in i915_hsw_setup_stream()
2937 static void i915_pin_cvt_fixup(struct hda_codec *codec, in i915_pin_cvt_fixup() argument
2942 haswell_verify_D0(codec, per_pin->cvt_nid, per_pin->pin_nid); in i915_pin_cvt_fixup()
2943 snd_hda_set_dev_select(codec, per_pin->pin_nid, in i915_pin_cvt_fixup()
2944 per_pin->dev_id); in i915_pin_cvt_fixup()
2945 intel_verify_pin_cvt_connect(codec, per_pin); in i915_pin_cvt_fixup()
2946 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, in i915_pin_cvt_fixup()
2947 per_pin->dev_id, per_pin->mux_idx); in i915_pin_cvt_fixup()
2949 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid); in i915_pin_cvt_fixup()
2953 static int i915_adlp_hdmi_suspend(struct hda_codec *codec) in i915_adlp_hdmi_suspend() argument
2955 struct hdmi_spec *spec = codec->spec; in i915_adlp_hdmi_suspend()
2959 res = generic_hdmi_suspend(codec); in i915_adlp_hdmi_suspend()
2961 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in i915_adlp_hdmi_suspend()
2964 if (per_pin->silent_stream) { in i915_adlp_hdmi_suspend()
2970 if (silent_streams && spec->silent_stream_type == SILENT_STREAM_KAE) { in i915_adlp_hdmi_suspend()
2972 * stream-id should remain programmed when codec goes in i915_adlp_hdmi_suspend()
2975 codec->no_stream_clean_at_suspend = 1; in i915_adlp_hdmi_suspend()
2978 * the system might go to S3, in which case keep-alive in i915_adlp_hdmi_suspend()
2981 codec->forced_resume = 1; in i915_adlp_hdmi_suspend()
2983 codec_dbg(codec, "HDMI: KAE active at suspend\n"); in i915_adlp_hdmi_suspend()
2985 codec->no_stream_clean_at_suspend = 0; in i915_adlp_hdmi_suspend()
2986 codec->forced_resume = 0; in i915_adlp_hdmi_suspend()
2992 static int i915_adlp_hdmi_resume(struct hda_codec *codec) in i915_adlp_hdmi_resume() argument
2994 struct hdmi_spec *spec = codec->spec; in i915_adlp_hdmi_resume()
2997 res = generic_hdmi_resume(codec); in i915_adlp_hdmi_resume()
3000 if (!codec->no_stream_clean_at_suspend) in i915_adlp_hdmi_resume()
3003 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in i915_adlp_hdmi_resume()
3008 * the codec setting may have been lost. Re-enable in i915_adlp_hdmi_resume()
3009 * keep-alive. in i915_adlp_hdmi_resume()
3011 if (per_pin->silent_stream) { in i915_adlp_hdmi_resume()
3014 param = snd_hda_codec_read(codec, per_pin->cvt_nid, 0, in i915_adlp_hdmi_resume()
3015 AC_VERB_GET_CONV, 0); in i915_adlp_hdmi_resume()
3017 codec_dbg(codec, "HDMI: KAE: restore stream id\n"); in i915_adlp_hdmi_resume()
3018 silent_stream_enable_i915(codec, per_pin); in i915_adlp_hdmi_resume()
3021 param = snd_hda_codec_read(codec, per_pin->cvt_nid, 0, in i915_adlp_hdmi_resume()
3022 AC_VERB_GET_DIGI_CONVERT_1, 0); in i915_adlp_hdmi_resume()
3024 codec_dbg(codec, "HDMI: KAE: restore DIG3_KAE\n"); in i915_adlp_hdmi_resume()
3025 silent_stream_set_kae(codec, per_pin, true); in i915_adlp_hdmi_resume()
3034 static int alloc_intel_hdmi(struct hda_codec *codec) in alloc_intel_hdmi() argument
3039 if (!codec->bus->core.audio_component) { in alloc_intel_hdmi()
3040 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n"); in alloc_intel_hdmi()
3042 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE; in alloc_intel_hdmi()
3043 return -ENODEV; in alloc_intel_hdmi()
3046 err = alloc_generic_hdmi(codec); in alloc_intel_hdmi()
3047 if (err < 0) in alloc_intel_hdmi()
3050 codec->patch_ops.unsol_event = NULL; in alloc_intel_hdmi()
3051 return 0; in alloc_intel_hdmi()
3054 /* parse and post-process for Intel codecs */
3055 static int parse_intel_hdmi(struct hda_codec *codec) in parse_intel_hdmi() argument
3060 err = hdmi_parse_codec(codec); in parse_intel_hdmi()
3061 } while (err < 0 && retries--); in parse_intel_hdmi()
3063 if (err < 0) { in parse_intel_hdmi()
3064 generic_spec_free(codec); in parse_intel_hdmi()
3068 generic_hdmi_init_per_pins(codec); in parse_intel_hdmi()
3069 register_i915_notifier(codec); in parse_intel_hdmi()
3070 return 0; in parse_intel_hdmi()
3074 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid, in intel_hsw_common_init() argument
3081 err = alloc_intel_hdmi(codec); in intel_hsw_common_init()
3082 if (err < 0) in intel_hsw_common_init()
3084 spec = codec->spec; in intel_hsw_common_init()
3085 codec->dp_mst = true; in intel_hsw_common_init()
3086 spec->vendor_nid = vendor_nid; in intel_hsw_common_init()
3087 spec->port_map = port_map; in intel_hsw_common_init()
3088 spec->port_num = port_num; in intel_hsw_common_init()
3089 spec->intel_hsw_fixup = true; in intel_hsw_common_init()
3090 spec->dev_num = dev_num; in intel_hsw_common_init()
3092 intel_haswell_enable_all_pins(codec, true); in intel_hsw_common_init()
3093 intel_haswell_fixup_enable_dp12(codec); in intel_hsw_common_init()
3095 codec->display_power_control = 1; in intel_hsw_common_init()
3097 codec->patch_ops.set_power_state = haswell_set_power_state; in intel_hsw_common_init()
3098 codec->depop_delay = 0; in intel_hsw_common_init()
3099 codec->auto_runtime_pm = 1; in intel_hsw_common_init()
3101 spec->ops.setup_stream = i915_hsw_setup_stream; in intel_hsw_common_init()
3102 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup; in intel_hsw_common_init()
3109 spec->silent_stream_type = SILENT_STREAM_I915; in intel_hsw_common_init()
3111 return parse_intel_hdmi(codec); in intel_hsw_common_init()
3114 static int patch_i915_hsw_hdmi(struct hda_codec *codec) in patch_i915_hsw_hdmi() argument
3116 return intel_hsw_common_init(codec, 0x08, NULL, 0, 3, in patch_i915_hsw_hdmi()
3120 static int patch_i915_glk_hdmi(struct hda_codec *codec) in patch_i915_glk_hdmi() argument
3127 return intel_hsw_common_init(codec, 0x0b, NULL, 0, 3, false); in patch_i915_glk_hdmi()
3130 static int patch_i915_icl_hdmi(struct hda_codec *codec) in patch_i915_icl_hdmi() argument
3136 static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb}; in patch_i915_icl_hdmi()
3138 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 3, in patch_i915_icl_hdmi()
3142 static int patch_i915_tgl_hdmi(struct hda_codec *codec) in patch_i915_tgl_hdmi() argument
3148 static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf}; in patch_i915_tgl_hdmi()
3150 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map), 4, in patch_i915_tgl_hdmi()
3154 static int patch_i915_adlp_hdmi(struct hda_codec *codec) in patch_i915_adlp_hdmi() argument
3159 res = patch_i915_tgl_hdmi(codec); in patch_i915_adlp_hdmi()
3161 spec = codec->spec; in patch_i915_adlp_hdmi()
3163 if (spec->silent_stream_type) { in patch_i915_adlp_hdmi()
3164 spec->silent_stream_type = SILENT_STREAM_KAE; in patch_i915_adlp_hdmi()
3166 codec->patch_ops.resume = i915_adlp_hdmi_resume; in patch_i915_adlp_hdmi()
3167 codec->patch_ops.suspend = i915_adlp_hdmi_suspend; in patch_i915_adlp_hdmi()
3175 static int patch_i915_byt_hdmi(struct hda_codec *codec) in patch_i915_byt_hdmi() argument
3180 err = alloc_intel_hdmi(codec); in patch_i915_byt_hdmi()
3181 if (err < 0) in patch_i915_byt_hdmi()
3183 spec = codec->spec; in patch_i915_byt_hdmi()
3185 /* For Valleyview/Cherryview, only the display codec is in the display in patch_i915_byt_hdmi()
3188 codec->display_power_control = 1; in patch_i915_byt_hdmi()
3190 codec->depop_delay = 0; in patch_i915_byt_hdmi()
3191 codec->auto_runtime_pm = 1; in patch_i915_byt_hdmi()
3193 spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup; in patch_i915_byt_hdmi()
3195 return parse_intel_hdmi(codec); in patch_i915_byt_hdmi()
3199 static int patch_i915_cpt_hdmi(struct hda_codec *codec) in patch_i915_cpt_hdmi() argument
3203 err = alloc_intel_hdmi(codec); in patch_i915_cpt_hdmi()
3204 if (err < 0) in patch_i915_cpt_hdmi()
3206 return parse_intel_hdmi(codec); in patch_i915_cpt_hdmi()
3210 * Shared non-generic implementations
3213 static int simple_playback_build_pcms(struct hda_codec *codec) in simple_playback_build_pcms() argument
3215 struct hdmi_spec *spec = codec->spec; in simple_playback_build_pcms()
3221 per_cvt = get_cvt(spec, 0); in simple_playback_build_pcms()
3222 chans = get_wcaps(codec, per_cvt->cvt_nid); in simple_playback_build_pcms()
3225 info = snd_hda_codec_pcm_new(codec, "HDMI 0"); in simple_playback_build_pcms()
3227 return -ENOMEM; in simple_playback_build_pcms()
3228 spec->pcm_rec[0].pcm = info; in simple_playback_build_pcms()
3229 info->pcm_type = HDA_PCM_TYPE_HDMI; in simple_playback_build_pcms()
3230 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; in simple_playback_build_pcms()
3231 *pstr = spec->pcm_playback; in simple_playback_build_pcms()
3232 pstr->nid = per_cvt->cvt_nid; in simple_playback_build_pcms()
3233 if (pstr->channels_max <= 2 && chans && chans <= 16) in simple_playback_build_pcms()
3234 pstr->channels_max = chans; in simple_playback_build_pcms()
3236 return 0; in simple_playback_build_pcms()
3240 static void simple_hdmi_unsol_event(struct hda_codec *codec, in simple_hdmi_unsol_event() argument
3243 snd_hda_jack_set_dirty_all(codec); in simple_hdmi_unsol_event()
3244 snd_hda_jack_report_sync(codec); in simple_hdmi_unsol_event()
3248 * as long as spec->pins[] is set correctly
3252 static int simple_playback_build_controls(struct hda_codec *codec) in simple_playback_build_controls() argument
3254 struct hdmi_spec *spec = codec->spec; in simple_playback_build_controls()
3258 per_cvt = get_cvt(spec, 0); in simple_playback_build_controls()
3259 err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid, in simple_playback_build_controls()
3260 per_cvt->cvt_nid, in simple_playback_build_controls()
3262 if (err < 0) in simple_playback_build_controls()
3264 return simple_hdmi_build_jack(codec, 0); in simple_playback_build_controls()
3267 static int simple_playback_init(struct hda_codec *codec) in simple_playback_init() argument
3269 struct hdmi_spec *spec = codec->spec; in simple_playback_init()
3270 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0); in simple_playback_init()
3271 hda_nid_t pin = per_pin->pin_nid; in simple_playback_init()
3273 snd_hda_codec_write(codec, pin, 0, in simple_playback_init()
3276 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) in simple_playback_init()
3277 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE, in simple_playback_init()
3279 snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id); in simple_playback_init()
3280 return 0; in simple_playback_init()
3283 static void simple_playback_free(struct hda_codec *codec) in simple_playback_free() argument
3285 struct hdmi_spec *spec = codec->spec; in simple_playback_free()
3295 #define Nv_VERB_SET_Channel_Allocation 0xF79
3296 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
3297 #define Nv_VERB_SET_Audio_Protection_On 0xF98
3298 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
3300 #define nvhdmi_master_con_nid_7x 0x04
3301 #define nvhdmi_master_pin_nid_7x 0x05
3305 0x6, 0x8, 0xa, 0xc,
3310 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3312 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3318 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3320 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3321 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3322 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3323 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3324 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3344 static int nvhdmi_7x_init_2ch(struct hda_codec *codec) in nvhdmi_7x_init_2ch() argument
3346 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch); in nvhdmi_7x_init_2ch()
3347 return 0; in nvhdmi_7x_init_2ch()
3350 static int nvhdmi_7x_init_8ch(struct hda_codec *codec) in nvhdmi_7x_init_8ch() argument
3352 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch); in nvhdmi_7x_init_8ch()
3353 return 0; in nvhdmi_7x_init_8ch()
3367 .mask = 0,
3373 .mask = 0,
3377 struct hda_codec *codec, in simple_playback_pcm_open() argument
3380 struct hdmi_spec *spec = codec->spec; in simple_playback_pcm_open()
3383 switch (codec->preset->vendor_id) { in simple_playback_pcm_open()
3384 case 0x10de0002: in simple_playback_pcm_open()
3385 case 0x10de0003: in simple_playback_pcm_open()
3386 case 0x10de0005: in simple_playback_pcm_open()
3387 case 0x10de0006: in simple_playback_pcm_open()
3390 case 0x10de0007: in simple_playback_pcm_open()
3398 snd_pcm_hw_constraint_list(substream->runtime, 0, in simple_playback_pcm_open()
3402 snd_pcm_hw_constraint_step(substream->runtime, 0, in simple_playback_pcm_open()
3406 return snd_hda_multi_out_dig_open(codec, &spec->multiout); in simple_playback_pcm_open()
3410 struct hda_codec *codec, in simple_playback_pcm_close() argument
3413 struct hdmi_spec *spec = codec->spec; in simple_playback_pcm_close()
3414 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in simple_playback_pcm_close()
3418 struct hda_codec *codec, in simple_playback_pcm_prepare() argument
3423 struct hdmi_spec *spec = codec->spec; in simple_playback_pcm_prepare()
3424 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, in simple_playback_pcm_prepare()
3447 static int patch_simple_hdmi(struct hda_codec *codec, in patch_simple_hdmi() argument
3456 return -ENOMEM; in patch_simple_hdmi()
3458 spec->codec = codec; in patch_simple_hdmi()
3459 codec->spec = spec; in patch_simple_hdmi()
3462 spec->multiout.num_dacs = 0; /* no analog */ in patch_simple_hdmi()
3463 spec->multiout.max_channels = 2; in patch_simple_hdmi()
3464 spec->multiout.dig_out_nid = cvt_nid; in patch_simple_hdmi()
3465 spec->num_cvts = 1; in patch_simple_hdmi()
3466 spec->num_pins = 1; in patch_simple_hdmi()
3467 per_pin = snd_array_new(&spec->pins); in patch_simple_hdmi()
3468 per_cvt = snd_array_new(&spec->cvts); in patch_simple_hdmi()
3470 simple_playback_free(codec); in patch_simple_hdmi()
3471 return -ENOMEM; in patch_simple_hdmi()
3473 per_cvt->cvt_nid = cvt_nid; in patch_simple_hdmi()
3474 per_pin->pin_nid = pin_nid; in patch_simple_hdmi()
3475 spec->pcm_playback = simple_pcm_playback; in patch_simple_hdmi()
3477 codec->patch_ops = simple_hdmi_patch_ops; in patch_simple_hdmi()
3479 return 0; in patch_simple_hdmi()
3482 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, in nvhdmi_8ch_7x_set_info_frame_parameters() argument
3486 int chan = channels ? (channels - 1) : 1; in nvhdmi_8ch_7x_set_info_frame_parameters()
3490 case 0: in nvhdmi_8ch_7x_set_info_frame_parameters()
3492 chanmask = 0x00; in nvhdmi_8ch_7x_set_info_frame_parameters()
3495 chanmask = 0x08; in nvhdmi_8ch_7x_set_info_frame_parameters()
3498 chanmask = 0x0b; in nvhdmi_8ch_7x_set_info_frame_parameters()
3501 chanmask = 0x13; in nvhdmi_8ch_7x_set_info_frame_parameters()
3507 snd_hda_codec_write(codec, 0x1, 0, in nvhdmi_8ch_7x_set_info_frame_parameters()
3510 snd_hda_codec_write(codec, 0x1, 0, in nvhdmi_8ch_7x_set_info_frame_parameters()
3512 (0x71 - chan - chanmask)); in nvhdmi_8ch_7x_set_info_frame_parameters()
3516 struct hda_codec *codec, in nvhdmi_8ch_7x_pcm_close() argument
3519 struct hdmi_spec *spec = codec->spec; in nvhdmi_8ch_7x_pcm_close()
3522 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, in nvhdmi_8ch_7x_pcm_close()
3523 0, AC_VERB_SET_CHANNEL_STREAMID, 0); in nvhdmi_8ch_7x_pcm_close()
3524 for (i = 0; i < 4; i++) { in nvhdmi_8ch_7x_pcm_close()
3526 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, in nvhdmi_8ch_7x_pcm_close()
3527 AC_VERB_SET_CHANNEL_STREAMID, 0); in nvhdmi_8ch_7x_pcm_close()
3529 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, in nvhdmi_8ch_7x_pcm_close()
3530 AC_VERB_SET_STREAM_FORMAT, 0); in nvhdmi_8ch_7x_pcm_close()
3533 /* The audio hardware sends a channel count of 0x7 (8ch) when all the in nvhdmi_8ch_7x_pcm_close()
3535 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); in nvhdmi_8ch_7x_pcm_close()
3537 return snd_hda_multi_out_dig_close(codec, &spec->multiout); in nvhdmi_8ch_7x_pcm_close()
3541 struct hda_codec *codec, in nvhdmi_8ch_7x_pcm_prepare() argument
3549 struct hdmi_spec *spec = codec->spec; in nvhdmi_8ch_7x_pcm_prepare()
3553 mutex_lock(&codec->spdif_mutex); in nvhdmi_8ch_7x_pcm_prepare()
3554 per_cvt = get_cvt(spec, 0); in nvhdmi_8ch_7x_pcm_prepare()
3555 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid); in nvhdmi_8ch_7x_pcm_prepare()
3557 chs = substream->runtime->channels; in nvhdmi_8ch_7x_pcm_prepare()
3559 dataDCC2 = 0x2; in nvhdmi_8ch_7x_pcm_prepare()
3562 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) in nvhdmi_8ch_7x_pcm_prepare()
3563 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3565 0, in nvhdmi_8ch_7x_pcm_prepare()
3567 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); in nvhdmi_8ch_7x_pcm_prepare()
3570 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, in nvhdmi_8ch_7x_pcm_prepare()
3571 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); in nvhdmi_8ch_7x_pcm_prepare()
3574 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, in nvhdmi_8ch_7x_pcm_prepare()
3579 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { in nvhdmi_8ch_7x_pcm_prepare()
3580 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3582 0, in nvhdmi_8ch_7x_pcm_prepare()
3584 spdif->ctls & 0xff); in nvhdmi_8ch_7x_pcm_prepare()
3585 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3587 0, in nvhdmi_8ch_7x_pcm_prepare()
3591 for (i = 0; i < 4; i++) { in nvhdmi_8ch_7x_pcm_prepare()
3593 channel_id = 0; in nvhdmi_8ch_7x_pcm_prepare()
3600 if (codec->spdif_status_reset && in nvhdmi_8ch_7x_pcm_prepare()
3601 (spdif->ctls & AC_DIG1_ENABLE)) in nvhdmi_8ch_7x_pcm_prepare()
3602 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3604 0, in nvhdmi_8ch_7x_pcm_prepare()
3606 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); in nvhdmi_8ch_7x_pcm_prepare()
3608 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3610 0, in nvhdmi_8ch_7x_pcm_prepare()
3614 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3616 0, in nvhdmi_8ch_7x_pcm_prepare()
3621 if (codec->spdif_status_reset && in nvhdmi_8ch_7x_pcm_prepare()
3622 (spdif->ctls & AC_DIG1_ENABLE)) { in nvhdmi_8ch_7x_pcm_prepare()
3623 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3625 0, in nvhdmi_8ch_7x_pcm_prepare()
3627 spdif->ctls & 0xff); in nvhdmi_8ch_7x_pcm_prepare()
3628 snd_hda_codec_write(codec, in nvhdmi_8ch_7x_pcm_prepare()
3630 0, in nvhdmi_8ch_7x_pcm_prepare()
3635 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); in nvhdmi_8ch_7x_pcm_prepare()
3637 mutex_unlock(&codec->spdif_mutex); in nvhdmi_8ch_7x_pcm_prepare()
3638 return 0; in nvhdmi_8ch_7x_pcm_prepare()
3656 static int patch_nvhdmi_2ch(struct hda_codec *codec) in patch_nvhdmi_2ch() argument
3659 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x, in patch_nvhdmi_2ch()
3661 if (err < 0) in patch_nvhdmi_2ch()
3664 codec->patch_ops.init = nvhdmi_7x_init_2ch; in patch_nvhdmi_2ch()
3665 /* override the PCM rates, etc, as the codec doesn't give full list */ in patch_nvhdmi_2ch()
3666 spec = codec->spec; in patch_nvhdmi_2ch()
3667 spec->pcm_playback.rates = SUPPORTED_RATES; in patch_nvhdmi_2ch()
3668 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS; in patch_nvhdmi_2ch()
3669 spec->pcm_playback.formats = SUPPORTED_FORMATS; in patch_nvhdmi_2ch()
3670 spec->nv_dp_workaround = true; in patch_nvhdmi_2ch()
3671 return 0; in patch_nvhdmi_2ch()
3674 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec) in nvhdmi_7x_8ch_build_pcms() argument
3676 struct hdmi_spec *spec = codec->spec; in nvhdmi_7x_8ch_build_pcms()
3677 int err = simple_playback_build_pcms(codec); in nvhdmi_7x_8ch_build_pcms()
3679 struct hda_pcm *info = get_pcm_rec(spec, 0); in nvhdmi_7x_8ch_build_pcms()
3680 info->own_chmap = true; in nvhdmi_7x_8ch_build_pcms()
3685 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec) in nvhdmi_7x_8ch_build_controls() argument
3687 struct hdmi_spec *spec = codec->spec; in nvhdmi_7x_8ch_build_controls()
3692 err = simple_playback_build_controls(codec); in nvhdmi_7x_8ch_build_controls()
3693 if (err < 0) in nvhdmi_7x_8ch_build_controls()
3697 info = get_pcm_rec(spec, 0); in nvhdmi_7x_8ch_build_controls()
3698 err = snd_pcm_add_chmap_ctls(info->pcm, in nvhdmi_7x_8ch_build_controls()
3700 snd_pcm_alt_chmaps, 8, 0, &chmap); in nvhdmi_7x_8ch_build_controls()
3701 if (err < 0) in nvhdmi_7x_8ch_build_controls()
3703 switch (codec->preset->vendor_id) { in nvhdmi_7x_8ch_build_controls()
3704 case 0x10de0002: in nvhdmi_7x_8ch_build_controls()
3705 case 0x10de0003: in nvhdmi_7x_8ch_build_controls()
3706 case 0x10de0005: in nvhdmi_7x_8ch_build_controls()
3707 case 0x10de0006: in nvhdmi_7x_8ch_build_controls()
3708 chmap->channel_mask = (1U << 2) | (1U << 8); in nvhdmi_7x_8ch_build_controls()
3710 case 0x10de0007: in nvhdmi_7x_8ch_build_controls()
3711 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8); in nvhdmi_7x_8ch_build_controls()
3713 return 0; in nvhdmi_7x_8ch_build_controls()
3716 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) in patch_nvhdmi_8ch_7x() argument
3719 int err = patch_nvhdmi_2ch(codec); in patch_nvhdmi_8ch_7x()
3720 if (err < 0) in patch_nvhdmi_8ch_7x()
3722 spec = codec->spec; in patch_nvhdmi_8ch_7x()
3723 spec->multiout.max_channels = 8; in patch_nvhdmi_8ch_7x()
3724 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x; in patch_nvhdmi_8ch_7x()
3725 codec->patch_ops.init = nvhdmi_7x_init_8ch; in patch_nvhdmi_8ch_7x()
3726 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms; in patch_nvhdmi_8ch_7x()
3727 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls; in patch_nvhdmi_8ch_7x()
3731 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); in patch_nvhdmi_8ch_7x()
3733 return 0; in patch_nvhdmi_8ch_7x()
3737 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3738 * - 0x10de0015
3739 * - 0x10de0040
3744 if (cap->ca_index == 0x00 && channels == 2) in nvhdmi_chmap_cea_alloc_validate_get_type()
3748 if (cap->channels != channels) in nvhdmi_chmap_cea_alloc_validate_get_type()
3749 return -1; in nvhdmi_chmap_cea_alloc_validate_get_type()
3758 if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR)) in nvhdmi_chmap_validate()
3759 return -EINVAL; in nvhdmi_chmap_validate()
3761 return 0; in nvhdmi_chmap_validate()
3764 /* map from pin NID to port; port is 0-based */
3768 return pin_nid - 4; in nvhdmi_pin2port()
3771 /* reverse-map from port to pin NID: see above */
3772 static int nvhdmi_port2pin(struct hda_codec *codec, int port) in nvhdmi_port2pin() argument
3784 static int patch_nvhdmi(struct hda_codec *codec) in patch_nvhdmi() argument
3789 err = alloc_generic_hdmi(codec); in patch_nvhdmi()
3790 if (err < 0) in patch_nvhdmi()
3792 codec->dp_mst = true; in patch_nvhdmi()
3794 spec = codec->spec; in patch_nvhdmi()
3796 err = hdmi_parse_codec(codec); in patch_nvhdmi()
3797 if (err < 0) { in patch_nvhdmi()
3798 generic_spec_free(codec); in patch_nvhdmi()
3802 generic_hdmi_init_per_pins(codec); in patch_nvhdmi()
3804 spec->dyn_pin_out = true; in patch_nvhdmi()
3806 spec->chmap.ops.chmap_cea_alloc_validate_get_type = in patch_nvhdmi()
3808 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate; in patch_nvhdmi()
3809 spec->nv_dp_workaround = true; in patch_nvhdmi()
3811 codec->link_down_at_suspend = 1; in patch_nvhdmi()
3813 generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin); in patch_nvhdmi()
3815 return 0; in patch_nvhdmi()
3818 static int patch_nvhdmi_legacy(struct hda_codec *codec) in patch_nvhdmi_legacy() argument
3823 err = patch_generic_hdmi(codec); in patch_nvhdmi_legacy()
3827 spec = codec->spec; in patch_nvhdmi_legacy()
3828 spec->dyn_pin_out = true; in patch_nvhdmi_legacy()
3830 spec->chmap.ops.chmap_cea_alloc_validate_get_type = in patch_nvhdmi_legacy()
3832 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate; in patch_nvhdmi_legacy()
3833 spec->nv_dp_workaround = true; in patch_nvhdmi_legacy()
3835 codec->link_down_at_suspend = 1; in patch_nvhdmi_legacy()
3837 return 0; in patch_nvhdmi_legacy()
3841 * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3842 * accessed using vendor-defined verbs. These registers can be used for
3847 #define NVIDIA_AFG_NID 0x01
3850 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3852 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3853 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3856 * | 31 | 30 | 29 16 | 15 0 |
3857 * +---------+-------+--------+--------+
3859 * +-----------------------------------|
3863 * TEGRA234 chip onwards, as new verb id 0xf80 will be used for interrupt
3866 #define NVIDIA_SET_HOST_INTR 0xf80
3867 #define NVIDIA_GET_SCRATCH0 0xfa6
3868 #define NVIDIA_SET_SCRATCH0_BYTE0 0xfa7
3869 #define NVIDIA_SET_SCRATCH0_BYTE1 0xfa8
3870 #define NVIDIA_SET_SCRATCH0_BYTE2 0xfa9
3871 #define NVIDIA_SET_SCRATCH0_BYTE3 0xfaa
3875 #define NVIDIA_GET_SCRATCH1 0xfab
3876 #define NVIDIA_SET_SCRATCH1_BYTE0 0xfac
3877 #define NVIDIA_SET_SCRATCH1_BYTE1 0xfad
3878 #define NVIDIA_SET_SCRATCH1_BYTE2 0xfae
3879 #define NVIDIA_SET_SCRATCH1_BYTE3 0xfaf
3882 * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3883 * the format is invalidated so that the HDMI codec can be disabled.
3885 static void tegra_hdmi_set_format(struct hda_codec *codec, in tegra_hdmi_set_format() argument
3891 struct hdmi_spec *spec = codec->spec; in tegra_hdmi_set_format()
3894 * Tegra HDA codec design from TEGRA234 chip onwards support DP MST. in tegra_hdmi_set_format()
3897 * scratch register read/write for DP MST supported Tegra HDA codec. in tegra_hdmi_set_format()
3899 if (codec->dp_mst) in tegra_hdmi_set_format()
3903 value = snd_hda_codec_read(codec, nid, 0, in tegra_hdmi_set_format()
3904 NVIDIA_GET_SCRATCH0, 0); in tegra_hdmi_set_format()
3905 value = (value >> 24) & 0xff; in tegra_hdmi_set_format()
3907 /* bits [15:0] are used to store the HDA format */ in tegra_hdmi_set_format()
3908 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3910 (format >> 0) & 0xff); in tegra_hdmi_set_format()
3911 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3913 (format >> 8) & 0xff); in tegra_hdmi_set_format()
3916 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3917 NVIDIA_SET_SCRATCH0_BYTE2, 0); in tegra_hdmi_set_format()
3923 if (format == 0) in tegra_hdmi_set_format()
3928 if (spec->hdmi_intr_trig_ctrl) { in tegra_hdmi_set_format()
3930 * For Tegra HDA Codec design from TEGRA234 onwards, the in tegra_hdmi_set_format()
3932 * non-zero values to verb 0xF80 instead of 31st bit of in tegra_hdmi_set_format()
3935 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3937 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3938 NVIDIA_SET_HOST_INTR, 0x1); in tegra_hdmi_set_format()
3942 * in the HDMI codec. The HDMI driver will use that as trigger in tegra_hdmi_set_format()
3947 snd_hda_codec_write(codec, nid, 0, in tegra_hdmi_set_format()
3953 struct hda_codec *codec, in tegra_hdmi_pcm_prepare() argument
3960 err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag, in tegra_hdmi_pcm_prepare()
3962 if (err < 0) in tegra_hdmi_pcm_prepare()
3965 /* notify the HDMI codec of the format change */ in tegra_hdmi_pcm_prepare()
3966 tegra_hdmi_set_format(codec, hinfo->nid, format); in tegra_hdmi_pcm_prepare()
3968 return 0; in tegra_hdmi_pcm_prepare()
3972 struct hda_codec *codec, in tegra_hdmi_pcm_cleanup() argument
3975 /* invalidate the format in the HDMI codec */ in tegra_hdmi_pcm_cleanup()
3976 tegra_hdmi_set_format(codec, hinfo->nid, 0); in tegra_hdmi_pcm_cleanup()
3978 return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream); in tegra_hdmi_pcm_cleanup()
3981 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type) in hda_find_pcm_by_type() argument
3983 struct hdmi_spec *spec = codec->spec; in hda_find_pcm_by_type()
3986 for (i = 0; i < spec->num_pins; i++) { in hda_find_pcm_by_type()
3989 if (pcm->pcm_type == type) in hda_find_pcm_by_type()
3996 static int tegra_hdmi_build_pcms(struct hda_codec *codec) in tegra_hdmi_build_pcms() argument
4002 err = generic_hdmi_build_pcms(codec); in tegra_hdmi_build_pcms()
4003 if (err < 0) in tegra_hdmi_build_pcms()
4006 pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI); in tegra_hdmi_build_pcms()
4008 return -ENODEV; in tegra_hdmi_build_pcms()
4011 * Override ->prepare() and ->cleanup() operations to notify the HDMI in tegra_hdmi_build_pcms()
4012 * codec about format changes. in tegra_hdmi_build_pcms()
4014 stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK]; in tegra_hdmi_build_pcms()
4015 stream->ops.prepare = tegra_hdmi_pcm_prepare; in tegra_hdmi_build_pcms()
4016 stream->ops.cleanup = tegra_hdmi_pcm_cleanup; in tegra_hdmi_build_pcms()
4018 return 0; in tegra_hdmi_build_pcms()
4021 static int tegra_hdmi_init(struct hda_codec *codec) in tegra_hdmi_init() argument
4023 struct hdmi_spec *spec = codec->spec; in tegra_hdmi_init()
4026 err = hdmi_parse_codec(codec); in tegra_hdmi_init()
4027 if (err < 0) { in tegra_hdmi_init()
4028 generic_spec_free(codec); in tegra_hdmi_init()
4032 for (i = 0; i < spec->num_cvts; i++) in tegra_hdmi_init()
4033 snd_hda_codec_write(codec, spec->cvt_nids[i], 0, in tegra_hdmi_init()
4037 generic_hdmi_init_per_pins(codec); in tegra_hdmi_init()
4039 codec->depop_delay = 10; in tegra_hdmi_init()
4040 codec->patch_ops.build_pcms = tegra_hdmi_build_pcms; in tegra_hdmi_init()
4041 spec->chmap.ops.chmap_cea_alloc_validate_get_type = in tegra_hdmi_init()
4043 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate; in tegra_hdmi_init()
4045 spec->chmap.ops.chmap_cea_alloc_validate_get_type = in tegra_hdmi_init()
4047 spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate; in tegra_hdmi_init()
4048 spec->nv_dp_workaround = true; in tegra_hdmi_init()
4050 return 0; in tegra_hdmi_init()
4053 static int patch_tegra_hdmi(struct hda_codec *codec) in patch_tegra_hdmi() argument
4057 err = alloc_generic_hdmi(codec); in patch_tegra_hdmi()
4058 if (err < 0) in patch_tegra_hdmi()
4061 return tegra_hdmi_init(codec); in patch_tegra_hdmi()
4064 static int patch_tegra234_hdmi(struct hda_codec *codec) in patch_tegra234_hdmi() argument
4069 err = alloc_generic_hdmi(codec); in patch_tegra234_hdmi()
4070 if (err < 0) in patch_tegra234_hdmi()
4073 codec->dp_mst = true; in patch_tegra234_hdmi()
4074 spec = codec->spec; in patch_tegra234_hdmi()
4075 spec->dyn_pin_out = true; in patch_tegra234_hdmi()
4076 spec->hdmi_intr_trig_ctrl = true; in patch_tegra234_hdmi()
4078 return tegra_hdmi_init(codec); in patch_tegra234_hdmi()
4082 * ATI/AMD-specific implementations
4085 #define is_amdhdmi_rev3_or_later(codec) \ argument
4086 ((codec)->core.vendor_id == 0x1002aa01 && \
4087 ((codec)->core.revision_id & 0xff00) >= 0x0300)
4088 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec) argument
4091 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
4092 #define ATI_VERB_SET_DOWNMIX_INFO 0x772
4093 #define ATI_VERB_SET_MULTICHANNEL_01 0x777
4094 #define ATI_VERB_SET_MULTICHANNEL_23 0x778
4095 #define ATI_VERB_SET_MULTICHANNEL_45 0x779
4096 #define ATI_VERB_SET_MULTICHANNEL_67 0x77a
4097 #define ATI_VERB_SET_HBR_CONTROL 0x77c
4098 #define ATI_VERB_SET_MULTICHANNEL_1 0x785
4099 #define ATI_VERB_SET_MULTICHANNEL_3 0x786
4100 #define ATI_VERB_SET_MULTICHANNEL_5 0x787
4101 #define ATI_VERB_SET_MULTICHANNEL_7 0x788
4102 #define ATI_VERB_SET_MULTICHANNEL_MODE 0x789
4103 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
4104 #define ATI_VERB_GET_DOWNMIX_INFO 0xf72
4105 #define ATI_VERB_GET_MULTICHANNEL_01 0xf77
4106 #define ATI_VERB_GET_MULTICHANNEL_23 0xf78
4107 #define ATI_VERB_GET_MULTICHANNEL_45 0xf79
4108 #define ATI_VERB_GET_MULTICHANNEL_67 0xf7a
4109 #define ATI_VERB_GET_HBR_CONTROL 0xf7c
4110 #define ATI_VERB_GET_MULTICHANNEL_1 0xf85
4111 #define ATI_VERB_GET_MULTICHANNEL_3 0xf86
4112 #define ATI_VERB_GET_MULTICHANNEL_5 0xf87
4113 #define ATI_VERB_GET_MULTICHANNEL_7 0xf88
4114 #define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89
4117 #define ATI_VERB_SET_RAMP_RATE 0x770
4118 #define ATI_VERB_GET_RAMP_RATE 0xf70
4120 #define ATI_OUT_ENABLE 0x1
4122 #define ATI_MULTICHANNEL_MODE_PAIRED 0
4125 #define ATI_HBR_CAPABLE 0x01
4126 #define ATI_HBR_ENABLE 0x10
4128 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid, in atihdmi_pin_get_eld() argument
4131 WARN_ON(dev_id != 0); in atihdmi_pin_get_eld()
4132 /* call hda_eld.c ATI/AMD-specific function */ in atihdmi_pin_get_eld()
4133 return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size, in atihdmi_pin_get_eld()
4134 is_amdhdmi_rev3_or_later(codec)); in atihdmi_pin_get_eld()
4137 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, in atihdmi_pin_setup_infoframe() argument
4141 WARN_ON(dev_id != 0); in atihdmi_pin_setup_infoframe()
4142 snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca); in atihdmi_pin_setup_infoframe()
4148 * ATI/AMD have automatic FC/LFE swap built-in in atihdmi_paired_swap_fc_lfe()
4168 /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */ in atihdmi_paired_chmap_validate()
4171 for (i = 0; i < chs; ++i) { in atihdmi_paired_chmap_validate()
4179 for (j = 0 + i % 2; j < 8; j += 2) { in atihdmi_paired_chmap_validate()
4180 int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j); in atihdmi_paired_chmap_validate()
4181 if (cap->speakers[chan_idx] == mask) { in atihdmi_paired_chmap_validate()
4185 if (i % 2 == 0 && i + 1 < chs) { in atihdmi_paired_chmap_validate()
4187 int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1); in atihdmi_paired_chmap_validate()
4189 int comp_mask_act = cap->speakers[comp_chan_idx]; in atihdmi_paired_chmap_validate()
4194 return -EINVAL; in atihdmi_paired_chmap_validate()
4201 return -EINVAL; in atihdmi_paired_chmap_validate()
4207 return 0; in atihdmi_paired_chmap_validate()
4213 struct hda_codec *codec = hdac_to_hda_codec(hdac); in atihdmi_pin_set_slot_channel() local
4215 int ati_channel_setup = 0; in atihdmi_pin_set_slot_channel()
4218 return -EINVAL; in atihdmi_pin_set_slot_channel()
4220 if (!has_amd_full_remap_support(codec)) { in atihdmi_pin_set_slot_channel()
4227 if (hdmi_slot % 2 != 0 && stream_channel == 0xf) in atihdmi_pin_set_slot_channel()
4228 return 0; in atihdmi_pin_set_slot_channel()
4230 hdmi_slot -= hdmi_slot % 2; in atihdmi_pin_set_slot_channel()
4232 if (stream_channel != 0xf) in atihdmi_pin_set_slot_channel()
4233 stream_channel -= stream_channel % 2; in atihdmi_pin_set_slot_channel()
4236 verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e; in atihdmi_pin_set_slot_channel()
4238 /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */ in atihdmi_pin_set_slot_channel()
4240 if (stream_channel != 0xf) in atihdmi_pin_set_slot_channel()
4243 return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup); in atihdmi_pin_set_slot_channel()
4249 struct hda_codec *codec = hdac_to_hda_codec(hdac); in atihdmi_pin_get_slot_channel() local
4256 return -EINVAL; in atihdmi_pin_get_slot_channel()
4258 if (!has_amd_full_remap_support(codec)) { in atihdmi_pin_get_slot_channel()
4260 if (ati_asp_slot % 2 != 0) { in atihdmi_pin_get_slot_channel()
4261 ati_asp_slot -= 1; in atihdmi_pin_get_slot_channel()
4266 verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e; in atihdmi_pin_get_slot_channel()
4268 ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0); in atihdmi_pin_get_slot_channel()
4271 return 0xf; in atihdmi_pin_get_slot_channel()
4273 return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd; in atihdmi_pin_get_slot_channel()
4284 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4289 int chanpairs = 0; in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4291 /* We only produce even-numbered channel count TLVs */ in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4292 if ((channels % 2) != 0) in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4293 return -1; in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4295 for (c = 0; c < 7; c += 2) { in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4296 if (cap->speakers[c] || cap->speakers[c+1]) in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4301 return -1; in atihdmi_paired_chmap_cea_alloc_validate_get_type()
4310 /* produce paired maps for pre-rev3 ATI/AMD codecs */ in atihdmi_paired_cea_alloc_to_tlv_chmap()
4311 int count = 0; in atihdmi_paired_cea_alloc_to_tlv_chmap()
4314 for (c = 7; c >= 0; c--) { in atihdmi_paired_cea_alloc_to_tlv_chmap()
4315 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c); in atihdmi_paired_cea_alloc_to_tlv_chmap()
4316 int spk = cap->speakers[chan]; in atihdmi_paired_cea_alloc_to_tlv_chmap()
4319 if (cap->speakers[chan + (chan % 2 ? -1 : 1)]) in atihdmi_paired_cea_alloc_to_tlv_chmap()
4331 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid, in atihdmi_pin_hbr_setup() argument
4336 WARN_ON(dev_id != 0); in atihdmi_pin_hbr_setup()
4338 hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0); in atihdmi_pin_hbr_setup()
4339 if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) { in atihdmi_pin_hbr_setup()
4345 codec_dbg(codec, in atihdmi_pin_hbr_setup()
4346 "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n", in atihdmi_pin_hbr_setup()
4348 hbr_ctl == hbr_ctl_new ? "" : "new-", in atihdmi_pin_hbr_setup()
4352 snd_hda_codec_write(codec, pin_nid, 0, in atihdmi_pin_hbr_setup()
4357 return -EINVAL; in atihdmi_pin_hbr_setup()
4359 return 0; in atihdmi_pin_hbr_setup()
4362 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, in atihdmi_setup_stream() argument
4366 if (is_amdhdmi_rev3_or_later(codec)) { in atihdmi_setup_stream()
4368 /* disable ramp-up/down for non-pcm as per AMD spec */ in atihdmi_setup_stream()
4370 ramp_rate = 0; in atihdmi_setup_stream()
4372 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate); in atihdmi_setup_stream()
4375 return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id, in atihdmi_setup_stream()
4380 static int atihdmi_init(struct hda_codec *codec) in atihdmi_init() argument
4382 struct hdmi_spec *spec = codec->spec; in atihdmi_init()
4385 err = generic_hdmi_init(codec); in atihdmi_init()
4390 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { in atihdmi_init()
4394 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0); in atihdmi_init()
4396 /* enable channel-wise remap mode if supported */ in atihdmi_init()
4397 if (has_amd_full_remap_support(codec)) in atihdmi_init()
4398 snd_hda_codec_write(codec, per_pin->pin_nid, 0, in atihdmi_init()
4402 codec->auto_runtime_pm = 1; in atihdmi_init()
4404 return 0; in atihdmi_init()
4407 /* map from pin NID to port; port is 0-based */
4411 return pin_nid / 2 - 1; in atihdmi_pin2port()
4414 /* reverse-map from port to pin NID: see above */
4415 static int atihdmi_port2pin(struct hda_codec *codec, int port) in atihdmi_port2pin() argument
4427 static int patch_atihdmi(struct hda_codec *codec) in patch_atihdmi() argument
4433 err = patch_generic_hdmi(codec); in patch_atihdmi()
4438 codec->patch_ops.init = atihdmi_init; in patch_atihdmi()
4440 spec = codec->spec; in patch_atihdmi()
4442 spec->static_pcm_mapping = true; in patch_atihdmi()
4444 spec->ops.pin_get_eld = atihdmi_pin_get_eld; in patch_atihdmi()
4445 spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe; in patch_atihdmi()
4446 spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup; in patch_atihdmi()
4447 spec->ops.setup_stream = atihdmi_setup_stream; in patch_atihdmi()
4449 spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel; in patch_atihdmi()
4450 spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel; in patch_atihdmi()
4452 if (!has_amd_full_remap_support(codec)) { in patch_atihdmi()
4453 /* override to ATI/AMD-specific versions with pairwise mapping */ in patch_atihdmi()
4454 spec->chmap.ops.chmap_cea_alloc_validate_get_type = in patch_atihdmi()
4456 spec->chmap.ops.cea_alloc_to_tlv_chmap = in patch_atihdmi()
4458 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate; in patch_atihdmi()
4462 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { in patch_atihdmi()
4464 per_cvt->channels_max = max(per_cvt->channels_max, 8u); in patch_atihdmi()
4465 per_cvt->rates |= SUPPORTED_RATES; in patch_atihdmi()
4466 per_cvt->formats |= SUPPORTED_FORMATS; in patch_atihdmi()
4467 per_cvt->maxbps = max(per_cvt->maxbps, 24u); in patch_atihdmi()
4470 spec->chmap.channels_max = max(spec->chmap.channels_max, 8u); in patch_atihdmi()
4473 * the link-down as is. Tell the core to allow it. in patch_atihdmi()
4475 codec->link_down_at_suspend = 1; in patch_atihdmi()
4477 generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin); in patch_atihdmi()
4479 return 0; in patch_atihdmi()
4483 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
4484 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
4486 static int patch_via_hdmi(struct hda_codec *codec) in patch_via_hdmi() argument
4488 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID); in patch_via_hdmi()
4491 static int patch_gf_hdmi(struct hda_codec *codec) in patch_gf_hdmi() argument
4495 err = patch_generic_hdmi(codec); in patch_gf_hdmi()
4500 * Glenfly GPUs have two codecs, stream switches from one codec to in patch_gf_hdmi()
4501 * another, need to do actual clean-ups in codec_cleanup_stream in patch_gf_hdmi()
4503 codec->no_sticky_stream = 1; in patch_gf_hdmi()
4504 return 0; in patch_gf_hdmi()
4511 HDA_CODEC_ENTRY(0x00147a47, "Loongson HDMI", patch_generic_hdmi),
4512 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
4513 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
4514 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
4515 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI", patch_atihdmi),
4516 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI", patch_generic_hdmi),
4517 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI", patch_generic_hdmi),
4518 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI", patch_generic_hdmi),
4519 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI", patch_nvhdmi_2ch),
4520 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4521 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4522 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI", patch_nvhdmi_8ch_7x),
4523 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4524 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI", patch_nvhdmi_8ch_7x),
4525 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI", patch_nvhdmi_8ch_7x),
4526 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP", patch_nvhdmi_legacy),
4527 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP", patch_nvhdmi_legacy),
4528 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP", patch_nvhdmi_legacy),
4529 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP", patch_nvhdmi_legacy),
4530 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI", patch_nvhdmi_legacy),
4531 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP", patch_nvhdmi_legacy),
4532 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP", patch_nvhdmi_legacy),
4533 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP", patch_nvhdmi_legacy),
4534 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP", patch_nvhdmi_legacy),
4535 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP", patch_nvhdmi_legacy),
4536 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP", patch_nvhdmi_legacy),
4537 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP", patch_nvhdmi_legacy),
4538 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP", patch_nvhdmi_legacy),
4540 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP", patch_nvhdmi_legacy),
4541 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP", patch_nvhdmi_legacy),
4542 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP", patch_nvhdmi_legacy),
4543 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP", patch_nvhdmi_legacy),
4544 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP", patch_nvhdmi_legacy),
4545 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI", patch_tegra_hdmi),
4546 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI", patch_tegra_hdmi),
4547 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI", patch_tegra_hdmi),
4548 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4549 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4550 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4551 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4552 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4553 HDA_CODEC_ENTRY(0x10de0031, "Tegra234 HDMI/DP", patch_tegra234_hdmi),
4554 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
4555 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
4556 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
4557 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP", patch_nvhdmi),
4558 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP", patch_nvhdmi),
4559 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP", patch_nvhdmi),
4560 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP", patch_nvhdmi),
4561 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP", patch_nvhdmi),
4562 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP", patch_nvhdmi),
4563 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP", patch_nvhdmi),
4564 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP", patch_nvhdmi),
4565 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP", patch_nvhdmi),
4566 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI", patch_nvhdmi_2ch),
4567 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP", patch_nvhdmi),
4568 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP", patch_nvhdmi),
4569 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP", patch_nvhdmi),
4570 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP", patch_nvhdmi),
4571 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP", patch_nvhdmi),
4572 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP", patch_nvhdmi),
4573 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP", patch_nvhdmi),
4574 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP", patch_nvhdmi),
4575 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP", patch_nvhdmi),
4576 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP", patch_nvhdmi),
4577 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP", patch_nvhdmi),
4578 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP", patch_nvhdmi),
4579 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP", patch_nvhdmi),
4580 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP", patch_nvhdmi),
4581 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP", patch_nvhdmi),
4582 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP", patch_nvhdmi),
4583 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP", patch_nvhdmi),
4584 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP", patch_nvhdmi),
4585 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP", patch_nvhdmi),
4586 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP", patch_nvhdmi),
4587 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP", patch_nvhdmi),
4588 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP", patch_nvhdmi),
4589 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP", patch_nvhdmi),
4590 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP", patch_nvhdmi),
4591 HDA_CODEC_ENTRY(0x10de009a, "GPU 9a HDMI/DP", patch_nvhdmi),
4592 HDA_CODEC_ENTRY(0x10de009d, "GPU 9d HDMI/DP", patch_nvhdmi),
4593 HDA_CODEC_ENTRY(0x10de009e, "GPU 9e HDMI/DP", patch_nvhdmi),
4594 HDA_CODEC_ENTRY(0x10de009f, "GPU 9f HDMI/DP", patch_nvhdmi),
4595 HDA_CODEC_ENTRY(0x10de00a0, "GPU a0 HDMI/DP", patch_nvhdmi),
4596 HDA_CODEC_ENTRY(0x10de00a3, "GPU a3 HDMI/DP", patch_nvhdmi),
4597 HDA_CODEC_ENTRY(0x10de00a4, "GPU a4 HDMI/DP", patch_nvhdmi),
4598 HDA_CODEC_ENTRY(0x10de00a5, "GPU a5 HDMI/DP", patch_nvhdmi),
4599 HDA_CODEC_ENTRY(0x10de00a6, "GPU a6 HDMI/DP", patch_nvhdmi),
4600 HDA_CODEC_ENTRY(0x10de00a7, "GPU a7 HDMI/DP", patch_nvhdmi),
4601 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI", patch_nvhdmi_2ch),
4602 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI", patch_nvhdmi_2ch),
4603 HDA_CODEC_ENTRY(0x67663d82, "Arise 82 HDMI/DP", patch_gf_hdmi),
4604 HDA_CODEC_ENTRY(0x67663d83, "Arise 83 HDMI/DP", patch_gf_hdmi),
4605 HDA_CODEC_ENTRY(0x67663d84, "Arise 84 HDMI/DP", patch_gf_hdmi),
4606 HDA_CODEC_ENTRY(0x67663d85, "Arise 85 HDMI/DP", patch_gf_hdmi),
4607 HDA_CODEC_ENTRY(0x67663d86, "Arise 86 HDMI/DP", patch_gf_hdmi),
4608 HDA_CODEC_ENTRY(0x67663d87, "Arise 87 HDMI/DP", patch_gf_hdmi),
4609 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP", patch_via_hdmi),
4610 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP", patch_via_hdmi),
4611 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP", patch_generic_hdmi),
4612 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP", patch_generic_hdmi),
4613 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4614 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI", patch_i915_glk_hdmi),
4615 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI", patch_generic_hdmi),
4616 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI", patch_generic_hdmi),
4617 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI", patch_generic_hdmi),
4618 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI", patch_i915_cpt_hdmi),
4619 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4620 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4621 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI", patch_i915_hsw_hdmi),
4622 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI", patch_i915_hsw_hdmi),
4623 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI", patch_i915_hsw_hdmi),
4624 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI", patch_i915_hsw_hdmi),
4625 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI", patch_i915_hsw_hdmi),
4626 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi),
4627 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
4628 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
4629 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
4630 HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
4631 HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
4632 HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
4633 HDA_CODEC_ENTRY(0x80862818, "Raptorlake HDMI", patch_i915_tgl_hdmi),
4634 HDA_CODEC_ENTRY(0x80862819, "DG2 HDMI", patch_i915_tgl_hdmi),
4635 HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
4636 HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
4637 HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_adlp_hdmi),
4638 HDA_CODEC_ENTRY(0x8086281d, "Meteor Lake HDMI", patch_i915_adlp_hdmi),
4639 HDA_CODEC_ENTRY(0x8086281e, "Battlemage HDMI", patch_i915_adlp_hdmi),
4640 HDA_CODEC_ENTRY(0x8086281f, "Raptor Lake P HDMI", patch_i915_adlp_hdmi),
4641 HDA_CODEC_ENTRY(0x80862820, "Lunar Lake HDMI", patch_i915_adlp_hdmi),
4642 HDA_CODEC_ENTRY(0x80862822, "Panther Lake HDMI", patch_i915_adlp_hdmi),
4643 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
4644 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4645 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
4646 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI", patch_generic_hdmi),
4654 MODULE_DESCRIPTION("HDMI HD-audio codec");
4655 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4656 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4657 MODULE_ALIAS("snd-hda-codec-atihdmi");