Lines Matching +full:0 +full:xfff7
118 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
119 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
120 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
122 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
123 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
127 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
142 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard. (0 = auto-detect)");
144 MODULE_PARM_DESC(use_pm, "Toggle power-management. (0 = off, 1 = on, 2 = auto)");
146 MODULE_PARM_DESC(enable_mpu, "Enable MPU401. (0 = off, 1 = on, 2 = auto)");
160 #define NEC_VERSA_SUBID1 0x80581033
161 #define NEC_VERSA_SUBID2 0x803c1033
164 #define ESS_FMT_STEREO 0x01
165 #define ESS_FMT_16BIT 0x02
172 #define ESS_DISABLE_AUDIO 0x8000
173 #define ESS_ENABLE_SERIAL_IRQ 0x4000
174 #define IO_ADRESS_ALIAS 0x0020
175 #define MPU401_IRQ_ENABLE 0x0010
176 #define MPU401_IO_ENABLE 0x0008
177 #define GAME_IO_ENABLE 0x0004
178 #define FM_IO_ENABLE 0x0002
179 #define SB_IO_ENABLE 0x0001
183 #define PIC_SNOOP1 0x4000
184 #define PIC_SNOOP2 0x2000
185 #define SAFEGUARD 0x0800
186 #define DMA_CLEAR 0x0700
187 #define DMA_DDMA 0x0000
188 #define DMA_TDMA 0x0100
189 #define DMA_PCPCI 0x0200
190 #define POST_WRITE 0x0080
191 #define PCI_TIMING 0x0040
192 #define SWAP_LR 0x0020
193 #define SUBTR_DECODE 0x0002
197 #define SPDIF_CONFB 0x0100
198 #define HWV_CONFB 0x0080
199 #define DEBOUNCE 0x0040
200 #define GPIO_CONFB 0x0020
201 #define CHI_CONFB 0x0010
202 #define IDMA_CONFB 0x0008 /*undoc */
203 #define MIDI_FIX 0x0004 /*undoc */
204 #define IRQ_TO_ISA 0x0001 /*undoc */
207 #define RINGB_2CODEC_ID_MASK 0x0003
208 #define RINGB_DIS_VALIDATION 0x0008
209 #define RINGB_EN_SPDIF 0x0010
210 #define RINGB_EN_2CODEC 0x0020
211 #define RINGB_SING_BIT_DUAL 0x0040
216 #define ESM_INDEX 0x02
217 #define ESM_DATA 0x00
220 #define ESM_AC97_INDEX 0x30
221 #define ESM_AC97_DATA 0x32
222 #define ESM_RING_BUS_DEST 0x34
223 #define ESM_RING_BUS_CONTR_A 0x36
224 #define ESM_RING_BUS_CONTR_B 0x38
225 #define ESM_RING_BUS_SDO 0x3A
228 #define WC_INDEX 0x10
229 #define WC_DATA 0x12
230 #define WC_CONTROL 0x14
233 #define ASSP_INDEX 0x80
234 #define ASSP_MEMORY 0x82
235 #define ASSP_DATA 0x84
236 #define ASSP_CONTROL_A 0xA2
237 #define ASSP_CONTROL_B 0xA4
238 #define ASSP_CONTROL_C 0xA6
239 #define ASSP_HOSTW_INDEX 0xA8
240 #define ASSP_HOSTW_DATA 0xAA
241 #define ASSP_HOSTW_IRQ 0xAC
243 #define ESM_MPU401_PORT 0x98
245 #define ESM_PORT_HOST_IRQ 0x18
247 #define IDR0_DATA_PORT 0x00
248 #define IDR1_CRAM_POINTER 0x01
249 #define IDR2_CRAM_DATA 0x02
250 #define IDR3_WAVE_DATA 0x03
251 #define IDR4_WAVE_PTR_LOW 0x04
252 #define IDR5_WAVE_PTR_HI 0x05
253 #define IDR6_TIMER_CTRL 0x06
254 #define IDR7_WAVE_ROMRAM 0x07
256 #define WRITEABLE_MAP 0xEFFFFF
257 #define READABLE_MAP 0x64003F
261 #define ESM_LEGACY_AUDIO_CONTROL 0x40
262 #define ESM_ACPI_COMMAND 0x54
263 #define ESM_CONFIG_A 0x50
264 #define ESM_CONFIG_B 0x52
265 #define ESM_DDMA 0x60
268 #define ESM_BOB_ENABLE 0x0001
269 #define ESM_BOB_START 0x0001
272 #define ESM_RESET_MAESTRO 0x8000
273 #define ESM_RESET_DIRECTSOUND 0x4000
274 #define ESM_HIRQ_ClkRun 0x0100
275 #define ESM_HIRQ_HW_VOLUME 0x0040
276 #define ESM_HIRQ_HARPO 0x0030 /* What's that? */
277 #define ESM_HIRQ_ASSP 0x0010
278 #define ESM_HIRQ_DSIE 0x0004
279 #define ESM_HIRQ_MPU401 0x0002
280 #define ESM_HIRQ_SB 0x0001
283 #define ESM_MPU401_IRQ 0x02
284 #define ESM_SB_IRQ 0x01
285 #define ESM_SOUND_IRQ 0x04
286 #define ESM_ASSP_IRQ 0x10
287 #define ESM_HWVOL_IRQ 0x40
296 /* APU Modes: reg 0x00, bit 4-7 */
298 #define ESM_APU_MODE_MASK (0xf << 4)
299 #define ESM_APU_OFF 0x00
300 #define ESM_APU_16BITLINEAR 0x01 /* 16-Bit Linear Sample Player */
301 #define ESM_APU_16BITSTEREO 0x02 /* 16-Bit Stereo Sample Player */
302 #define ESM_APU_8BITLINEAR 0x03 /* 8-Bit Linear Sample Player */
303 #define ESM_APU_8BITSTEREO 0x04 /* 8-Bit Stereo Sample Player */
304 #define ESM_APU_8BITDIFF 0x05 /* 8-Bit Differential Sample Playrer */
305 #define ESM_APU_DIGITALDELAY 0x06 /* Digital Delay Line */
306 #define ESM_APU_DUALTAP 0x07 /* Dual Tap Reader */
307 #define ESM_APU_CORRELATOR 0x08 /* Correlator */
308 #define ESM_APU_INPUTMIXER 0x09 /* Input Mixer */
309 #define ESM_APU_WAVETABLE 0x0A /* Wave Table Mode */
310 #define ESM_APU_SRCONVERTOR 0x0B /* Sample Rate Convertor */
311 #define ESM_APU_16BITPINGPONG 0x0C /* 16-Bit Ping-Pong Sample Player */
312 #define ESM_APU_RESERVED1 0x0D /* Reserved 1 */
313 #define ESM_APU_RESERVED2 0x0E /* Reserved 2 */
314 #define ESM_APU_RESERVED3 0x0F /* Reserved 3 */
316 /* reg 0x00 */
317 #define ESM_APU_FILTER_Q_SHIFT 0
318 #define ESM_APU_FILTER_Q_MASK (3 << 0)
320 #define ESM_APU_FILTER_LESSQ 0x00
321 #define ESM_APU_FILTER_MOREQ 0x03
333 /* reg 0x02 */
334 #define ESM_APU_SUBMIX_GROUP_SHIRT 0
335 #define ESM_APU_SUBMIX_GROUP_MASK (7 << 0)
342 /* reg 0x03 */
343 #define ESM_APU_STEP_SIZE_MASK 0x0fff
345 /* reg 0x04 */
346 #define ESM_APU_PHASE_SHIFT 0
347 #define ESM_APU_PHASE_MASK (0xff << 0)
349 #define ESM_APU_WAVE64K_PAGE_MASK (0xff << 8)
351 /* reg 0x05 - wave start offset */
352 /* reg 0x06 - wave end offset */
353 /* reg 0x07 - wave loop length */
355 /* reg 0x08 */
356 #define ESM_APU_EFFECT_GAIN_SHIFT 0
357 #define ESM_APU_EFFECT_GAIN_MASK (0xff << 0)
359 #define ESM_APU_TREMOLO_DEPTH_MASK (0xf << 8)
361 #define ESM_APU_TREMOLO_RATE_MASK (0xf << 12)
363 /* reg 0x09 */
364 /* bit 0-7 amplitude dest? */
366 #define ESM_APU_AMPLITUDE_NOW_MASK (0xff << 8)
368 /* reg 0x0a */
369 #define ESM_APU_POLAR_PAN_SHIFT 0
370 #define ESM_APU_POLAR_PAN_MASK (0x3f << 0)
372 #define ESM_APU_PAN_CENTER_CIRCLE 0x00
373 #define ESM_APU_PAN_MIDDLE_RADIUS 0x01
374 #define ESM_APU_PAN_OUTSIDE_RADIUS 0x02
377 #define ESM_APU_FILTER_TUNING_MASK (0xff << 8)
379 /* reg 0x0b */
380 #define ESM_APU_DATA_SRC_A_SHIFT 0
381 #define ESM_APU_DATA_SRC_A_MASK (0x7f << 0)
384 #define ESM_APU_DATA_SRC_B_MASK (0x7f << 8)
387 #define ESM_APU_VIBRATO_RATE_SHIFT 0
388 #define ESM_APU_VIBRATO_RATE_MASK (0xf << 0)
390 #define ESM_APU_VIBRATO_DEPTH_MASK (0xf << 4)
392 #define ESM_APU_VIBRATO_PHASE_MASK (0xff << 8)
394 /* reg 0x0c */
398 #define ESM_APU_FILTER_2POLE_LOPASS 0x00
399 #define ESM_APU_FILTER_2POLE_BANDPASS 0x01
400 #define ESM_APU_FILTER_2POLE_HIPASS 0x02
401 #define ESM_APU_FILTER_1POLE_LOPASS 0x03
402 #define ESM_APU_FILTER_1POLE_HIPASS 0x04
403 #define ESM_APU_FILTER_OFF 0x05
406 #define ESM_APU_ATFP_AMPLITUDE 0x00
407 #define ESM_APU_ATFP_TREMELO 0x01
408 #define ESM_APU_ATFP_FILTER 0x02
409 #define ESM_APU_ATFP_PAN 0x03
412 #define ESM_APU_ATFP_FLG_OFF 0x00
413 #define ESM_APU_ATFP_FLG_WAIT 0x01
414 #define ESM_APU_ATFP_FLG_DONE 0x02
415 #define ESM_APU_ATFP_FLG_INPROCESS 0x03
419 #define ESM_MEM_ALIGN 0x1000
420 #define ESM_MIXBUF_SIZE 0x400
422 #define ESM_MODE_PLAY 0
553 …{ 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO …
555 …{ 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2…
557 …{ 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2…
558 { 0, }
608 while (timeout-- > 0) { in snd_es1968_ac97_wait()
610 return 0; in snd_es1968_ac97_wait()
621 while (timeout-- > 0) { in snd_es1968_ac97_wait_poll()
623 return 0; in snd_es1968_ac97_wait_poll()
644 u16 data = 0; in snd_es1968_ac97_read()
649 outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX); in snd_es1968_ac97_read()
665 for (i = 0; i < 1000; i++) in apu_index_set()
675 for (i = 0; i < 1000; i++) { in apu_data_set()
705 return 0; in __apu_get_register()
721 #if 0 /* ASSP is not supported */
779 reg = __maestro_read(chip, 0x11); in snd_es1968_bob_stop()
781 __maestro_write(chip, 0x11, reg); in snd_es1968_bob_stop()
782 reg = __maestro_read(chip, 0x17); in snd_es1968_bob_stop()
784 __maestro_write(chip, 0x17, reg); in snd_es1968_bob_stop()
811 /* divide = 0 is illegal, but don't let prescale = 4! */ in snd_es1968_bob_start()
812 if (divide == 0) { in snd_es1968_bob_start()
819 __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide); /* set reg */ in snd_es1968_bob_start()
822 __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1); in snd_es1968_bob_start()
823 __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1); in snd_es1968_bob_start()
844 if (chip->bobclient <= 0) in snd_es1968_bob_dec()
888 #if 0 /* XXX: do we need this? */ in snd_es1968_compute_rate()
889 if (rate > 0x10000) in snd_es1968_compute_rate()
890 rate = 0x10000; in snd_es1968_compute_rate()
901 offset = apu_get_register(chip, es->apu[0], 5); in snd_es1968_get_dma_ptr()
903 offset -= es->base[0]; in snd_es1968_get_dma_ptr()
905 return (offset & 0xFFFE); /* hardware is in words */ in snd_es1968_get_dma_ptr()
911 (apu_get_register(chip, apu, 2) & 0x00FF) | in snd_es1968_apu_set_freq()
912 ((freq & 0xff) << 8) | 0x10); in snd_es1968_apu_set_freq()
920 __apu_set_register(esm, apu, 0, in snd_es1968_trigger_apu()
921 (__apu_get_register(esm, apu, 0) & 0xff0f) | in snd_es1968_trigger_apu()
928 __apu_set_register(chip, es->apu[0], 5, es->base[0]); in snd_es1968_pcm_start()
929 snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]); in snd_es1968_pcm_start()
948 snd_es1968_trigger_apu(chip, es->apu[0], 0); in snd_es1968_pcm_stop()
949 snd_es1968_trigger_apu(chip, es->apu[1], 0); in snd_es1968_pcm_stop()
951 snd_es1968_trigger_apu(chip, es->apu[2], 0); in snd_es1968_pcm_stop()
952 snd_es1968_trigger_apu(chip, es->apu[3], 0); in snd_es1968_pcm_stop()
961 u32 tmpval = (addr - 0x10) & 0xFFF8; in snd_es1968_program_wavecache()
981 int high_apu = 0; in snd_es1968_playback_setup()
992 for (channel = 0; channel <= high_apu; channel++) { in snd_es1968_playback_setup()
995 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0); in snd_es1968_playback_setup()
1002 pa |= 0x00400000; /* System RAM (Bit 22) */ in snd_es1968_playback_setup()
1007 pa |= 0x00800000; /* (Bit 23) */ in snd_es1968_playback_setup()
1014 es->base[channel] = pa & 0xFFFF; in snd_es1968_playback_setup()
1016 for (i = 0; i < 16; i++) in snd_es1968_playback_setup()
1017 apu_set_register(chip, apu, i, 0x0000); in snd_es1968_playback_setup()
1020 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); in snd_es1968_playback_setup()
1021 apu_set_register(chip, apu, 5, pa & 0xFFFF); in snd_es1968_playback_setup()
1022 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF); in snd_es1968_playback_setup()
1027 apu_set_register(chip, apu, 8, 0x0000); in snd_es1968_playback_setup()
1028 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */ in snd_es1968_playback_setup()
1029 apu_set_register(chip, apu, 9, 0xD000); in snd_es1968_playback_setup()
1032 apu_set_register(chip, apu, 11, 0x0000); in snd_es1968_playback_setup()
1034 apu_set_register(chip, apu, 0, 0x400F); in snd_es1968_playback_setup()
1048 0x8F00 | (channel ? 0 : 0x10)); in snd_es1968_playback_setup()
1051 apu_set_register(chip, apu, 10, 0x8F08); in snd_es1968_playback_setup()
1056 outw(1, chip->io_port + 0x04); in snd_es1968_playback_setup()
1075 snd_es1968_apu_set_freq(chip, es->apu[0], freq); in snd_es1968_playback_setup()
1097 es->base[channel] = pa & 0xFFFF; in init_capture_apu()
1098 pa |= 0x00400000; /* bit 22 -> System RAM */ in init_capture_apu()
1101 for (i = 0; i < 16; i++) in init_capture_apu()
1102 apu_set_register(chip, apu, i, 0x0000); in init_capture_apu()
1106 apu_set_register(chip, apu, 2, 0x8); in init_capture_apu()
1109 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8); in init_capture_apu()
1110 apu_set_register(chip, apu, 5, pa & 0xFFFF); in init_capture_apu()
1111 apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF); in init_capture_apu()
1114 apu_set_register(chip, apu, 8, 0x00F0); in init_capture_apu()
1116 apu_set_register(chip, apu, 9, 0x0000); in init_capture_apu()
1118 apu_set_register(chip, apu, 10, 0x8F08); in init_capture_apu()
1122 apu_set_register(chip, apu, 0, 0x400F); in init_capture_apu()
1135 0 = mono/left SRC in snd_es1968_capture_setup()
1145 /* parallel in crap, see maestro reg 0xC [8-11] */ in snd_es1968_capture_setup()
1148 ESM_APU_INPUTMIXER, 0x14); in snd_es1968_capture_setup()
1150 init_capture_apu(chip, es, 0, es->memory->buf.addr, size, in snd_es1968_capture_setup()
1157 ESM_APU_INPUTMIXER, 0x15); in snd_es1968_capture_setup()
1165 /* Sample Rate conversion APUs don't like 0x10000 for their rate */ in snd_es1968_capture_setup()
1174 snd_es1968_apu_set_freq(chip, es->apu[0], freq); in snd_es1968_capture_setup()
1177 /* fix mixer rate at 48khz. and its _must_ be 0x10000. */ in snd_es1968_capture_setup()
1178 freq = 0x10000; in snd_es1968_capture_setup()
1184 outw(1, chip->io_port + 0x04); in snd_es1968_capture_setup()
1204 es->fmt = 0; in snd_es1968_pcm_prepare()
1223 return 0; in snd_es1968_pcm_prepare()
1238 es->count = 0; in snd_es1968_pcm_trigger()
1239 es->hwptr = 0; in snd_es1968_pcm_trigger()
1248 es->running = 0; in snd_es1968_pcm_trigger()
1253 return 0; in snd_es1968_pcm_trigger()
1285 .fifo_size = 0,
1306 .fifo_size = 0,
1318 int max_size = 0; in calc_available_memory_size()
1361 buf->empty = 0; in snd_es1968_new_memory()
1416 if (err < 0 || ! chip->dma.area) { in snd_es1968_init_dmabuf()
1435 memset(chip->dma.area, 0, ESM_MEM_ALIGN); in snd_es1968_init_dmabuf()
1443 return 0; in snd_es1968_init_dmabuf()
1459 return 0; in snd_es1968_hw_params()
1481 return 0; in snd_es1968_hw_free()
1487 return 0; in snd_es1968_hw_free()
1498 for (apu = 0; apu < NR_APUS; apu += 2) { in snd_es1968_alloc_apu_pair()
1530 if (apu1 < 0) in snd_es1968_playback_open()
1539 es->apu[0] = apu1; in snd_es1968_playback_open()
1541 es->apu_mode[0] = 0; in snd_es1968_playback_open()
1542 es->apu_mode[1] = 0; in snd_es1968_playback_open()
1543 es->running = 0; in snd_es1968_playback_open()
1556 return 0; in snd_es1968_playback_open()
1567 if (apu1 < 0) in snd_es1968_capture_open()
1570 if (apu2 < 0) { in snd_es1968_capture_open()
1582 es->apu[0] = apu1; in snd_es1968_capture_open()
1586 es->apu_mode[0] = 0; in snd_es1968_capture_open()
1587 es->apu_mode[1] = 0; in snd_es1968_capture_open()
1588 es->apu_mode[2] = 0; in snd_es1968_capture_open()
1589 es->apu_mode[3] = 0; in snd_es1968_capture_open()
1590 es->running = 0; in snd_es1968_capture_open()
1602 memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE); in snd_es1968_capture_open()
1608 snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES); in snd_es1968_capture_open()
1614 return 0; in snd_es1968_capture_open()
1623 return 0; in snd_es1968_playback_close()
1628 snd_es1968_free_apu_pair(chip, es->apu[0]); in snd_es1968_playback_close()
1631 return 0; in snd_es1968_playback_close()
1640 return 0; in snd_es1968_capture_close()
1646 snd_es1968_free_apu_pair(chip, es->apu[0]); in snd_es1968_capture_close()
1650 return 0; in snd_es1968_capture_close()
1687 if (chip->clock == 0) in es1968_measure_clock()
1692 if (apu < 0) { in es1968_measure_clock()
1705 memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE); in es1968_measure_clock()
1707 wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8); in es1968_measure_clock()
1710 pa |= 0x00400000; /* System RAM (Bit 22) */ in es1968_measure_clock()
1713 for (i = 0; i < 16; i++) in es1968_measure_clock()
1714 apu_set_register(chip, apu, i, 0x0000); in es1968_measure_clock()
1716 apu_set_register(chip, apu, 0, 0x400f); in es1968_measure_clock()
1717 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8); in es1968_measure_clock()
1718 apu_set_register(chip, apu, 5, pa & 0xffff); in es1968_measure_clock()
1719 apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff); in es1968_measure_clock()
1721 apu_set_register(chip, apu, 8, 0x0000); in es1968_measure_clock()
1722 apu_set_register(chip, apu, 9, 0xD000); in es1968_measure_clock()
1723 apu_set_register(chip, apu, 10, 0x8F08); in es1968_measure_clock()
1724 apu_set_register(chip, apu, 11, 0x0000); in es1968_measure_clock()
1726 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ in es1968_measure_clock()
1736 __apu_set_register(chip, apu, 5, pa & 0xffff); in es1968_measure_clock()
1744 snd_es1968_trigger_apu(chip, apu, 0); /* stop */ in es1968_measure_clock()
1746 chip->in_measurement = 0; in es1968_measure_clock()
1750 offset -= (pa & 0xffff); in es1968_measure_clock()
1751 offset &= 0xfffe; in es1968_measure_clock()
1756 if (t == 0) { in es1968_measure_clock()
1790 if (err < 0) in snd_es1968_pcm()
1794 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); in snd_es1968_pcm()
1795 wave_set_register(chip, 0x01FD, chip->dma.addr >> 12); in snd_es1968_pcm()
1796 wave_set_register(chip, 0x01FE, chip->dma.addr >> 12); in snd_es1968_pcm()
1797 wave_set_register(chip, 0x01FF, chip->dma.addr >> 12); in snd_es1968_pcm()
1802 if (err < 0) in snd_es1968_pcm()
1811 pcm->info_flags = 0; in snd_es1968_pcm()
1817 return 0; in snd_es1968_pcm()
1828 cp1 = __apu_get_register(chip, 0, 5); in snd_es1968_suppress_jitter()
1867 of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1876 x = inb(chip->io_port + 0x1c) & 0xee; in es1968_update_hw_volume()
1878 outb(0x88, chip->io_port + 0x1c); in es1968_update_hw_volume()
1879 outb(0x88, chip->io_port + 0x1d); in es1968_update_hw_volume()
1880 outb(0x88, chip->io_port + 0x1e); in es1968_update_hw_volume()
1881 outb(0x88, chip->io_port + 0x1f); in es1968_update_hw_volume()
1892 case 0x88: in es1968_update_hw_volume()
1894 val ^= 0x8000; in es1968_update_hw_volume()
1896 case 0xaa: in es1968_update_hw_volume()
1898 if ((val & 0x7f) > 0) in es1968_update_hw_volume()
1900 if ((val & 0x7f00) > 0) in es1968_update_hw_volume()
1901 val -= 0x0100; in es1968_update_hw_volume()
1903 case 0x66: in es1968_update_hw_volume()
1905 if ((val & 0x7f) < 0x1f) in es1968_update_hw_volume()
1907 if ((val & 0x7f00) < 0x1f00) in es1968_update_hw_volume()
1908 val += 0x0100; in es1968_update_hw_volume()
1918 val = 0; in es1968_update_hw_volume()
1920 case 0x88: in es1968_update_hw_volume()
1926 case 0xaa: in es1968_update_hw_volume()
1930 case 0x66: in es1968_update_hw_volume()
1939 input_report_key(chip->input_dev, val, 0); in es1968_update_hw_volume()
1953 event = inb(chip->io_port + 0x1A); in snd_es1968_interrupt()
1963 outb(0xFF, chip->io_port + 0x1A); in snd_es1968_interrupt()
2006 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); in snd_es1968_mixer()
2007 if (err < 0) in snd_es1968_mixer()
2011 memset(&ac97, 0, sizeof(ac97)); in snd_es1968_mixer()
2014 if (err < 0) in snd_es1968_mixer()
2025 return 0; in snd_es1968_mixer()
2042 save_ringbus_a = inw(ioaddr + 0x36); in snd_es1968_ac97_reset()
2044 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */ in snd_es1968_ac97_reset()
2046 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2047 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2050 outw(0x0000, ioaddr + 0x36); in snd_es1968_ac97_reset()
2051 save_68 = inw(ioaddr + 0x68); in snd_es1968_ac97_reset()
2052 pci_read_config_word(chip->pci, 0x58, &w); /* something magical with gpio and bus arb. */ in snd_es1968_ac97_reset()
2055 save_68 |= 0x10; in snd_es1968_ac97_reset()
2056 outw(0xfffe, ioaddr + 0x64); /* unmask gpio 0 */ in snd_es1968_ac97_reset()
2057 outw(0x0001, ioaddr + 0x68); /* gpio write */ in snd_es1968_ac97_reset()
2058 outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */ in snd_es1968_ac97_reset()
2060 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */ in snd_es1968_ac97_reset()
2063 outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ in snd_es1968_ac97_reset()
2064 outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38); in snd_es1968_ac97_reset()
2065 outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2066 outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2070 outw(0x0000, ioaddr + 0x36); in snd_es1968_ac97_reset()
2071 outw(0xfff7, ioaddr + 0x64); /* unmask gpio 3 */ in snd_es1968_ac97_reset()
2072 save_68 = inw(ioaddr + 0x68); in snd_es1968_ac97_reset()
2073 outw(0x0009, ioaddr + 0x68); /* gpio write 0 & 3 ?? */ in snd_es1968_ac97_reset()
2074 outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */ in snd_es1968_ac97_reset()
2076 outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */ in snd_es1968_ac97_reset()
2078 //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); in snd_es1968_ac97_reset()
2079 outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); in snd_es1968_ac97_reset()
2080 outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); in snd_es1968_ac97_reset()
2082 #if 0 /* the loop here needs to be much better if we want it.. */ in snd_es1968_ac97_reset()
2085 outb(0x80 | 0x7c, ioaddr + 0x30); in snd_es1968_ac97_reset()
2086 for (w = 0;; w++) { in snd_es1968_ac97_reset()
2087 if ((inw(ioaddr + 0x30) & 1) == 0) { in snd_es1968_ac97_reset()
2088 if (inb(ioaddr + 0x32) != 0) in snd_es1968_ac97_reset()
2091 outb(0x80 | 0x7d, ioaddr + 0x30); in snd_es1968_ac97_reset()
2092 if (((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2093 && (inb(ioaddr + 0x32) != 0)) in snd_es1968_ac97_reset()
2095 outb(0x80 | 0x7f, ioaddr + 0x30); in snd_es1968_ac97_reset()
2096 if (((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2097 && (inb(ioaddr + 0x32) != 0)) in snd_es1968_ac97_reset()
2102 outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ in snd_es1968_ac97_reset()
2104 outb(inb(ioaddr + 0x37) & ~0x08, in snd_es1968_ac97_reset()
2105 ioaddr + 0x37); in snd_es1968_ac97_reset()
2107 outw(0x80, ioaddr + 0x30); in snd_es1968_ac97_reset()
2108 for (w = 0; w < 10000; w++) { in snd_es1968_ac97_reset()
2109 if ((inw(ioaddr + 0x30) & 1) == 0) in snd_es1968_ac97_reset()
2117 outw(0xf9ff, ioaddr + 0x64); in snd_es1968_ac97_reset()
2118 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68); in snd_es1968_ac97_reset()
2119 outw(0x0209, ioaddr + 0x60); in snd_es1968_ac97_reset()
2123 outw(save_ringbus_a, ioaddr + 0x36); in snd_es1968_ac97_reset()
2128 outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0); in snd_es1968_ac97_reset()
2129 outb(0xff, ioaddr+0xc3); in snd_es1968_ac97_reset()
2130 outb(0xff, ioaddr+0xc4); in snd_es1968_ac97_reset()
2131 outb(0xff, ioaddr+0xc6); in snd_es1968_ac97_reset()
2132 outb(0xff, ioaddr+0xc8); in snd_es1968_ac97_reset()
2133 outb(0x3f, ioaddr+0xcf); in snd_es1968_ac97_reset()
2134 outb(0x3f, ioaddr+0xd0); in snd_es1968_ac97_reset()
2143 outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ); in snd_es1968_reset()
2200 w &= ~(1 << 1); /* reserved, always write 0 */ in snd_es1968_chip_init()
2208 w &= ~(1 << 0); in snd_es1968_chip_init()
2219 w &= ~(0x1f); /* disable mpu irq/io, game port, fm, SB */ in snd_es1968_chip_init()
2224 pci_read_config_word(pci, 0x58, &w); in snd_es1968_chip_init()
2228 pci_write_config_word(pci, 0x58, w); in snd_es1968_chip_init()
2238 /* setup usual 0x34 stuff.. 0x36 may be chip specific */ in snd_es1968_chip_init()
2239 outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */ in snd_es1968_chip_init()
2241 outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */ in snd_es1968_chip_init()
2259 outb(0x88, iobase+0x1c); in snd_es1968_chip_init()
2260 outb(0x88, iobase+0x1d); in snd_es1968_chip_init()
2261 outb(0x88, iobase+0x1e); in snd_es1968_chip_init()
2262 outb(0x88, iobase+0x1f); in snd_es1968_chip_init()
2267 outb(0, iobase + ASSP_CONTROL_B); in snd_es1968_chip_init()
2269 outb(0, iobase + ASSP_CONTROL_C); /* M: Disable ASSP, ASSP IRQ's and FM Port */ in snd_es1968_chip_init()
2274 for (i = 0; i < 16; i++) { in snd_es1968_chip_init()
2275 /* Write 0 into the buffer area 0x1E0->1EF */ in snd_es1968_chip_init()
2276 outw(0x01E0 + i, iobase + WC_INDEX); in snd_es1968_chip_init()
2277 outw(0x0000, iobase + WC_DATA); in snd_es1968_chip_init()
2279 /* The 1.10 test program seem to write 0 into the buffer area in snd_es1968_chip_init()
2280 * 0x1D0-0x1DF too.*/ in snd_es1968_chip_init()
2281 outw(0x01D0 + i, iobase + WC_INDEX); in snd_es1968_chip_init()
2282 outw(0x0000, iobase + WC_DATA); in snd_es1968_chip_init()
2285 (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00)); in snd_es1968_chip_init()
2287 wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100); in snd_es1968_chip_init()
2289 wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200); in snd_es1968_chip_init()
2291 wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400); in snd_es1968_chip_init()
2294 maestro_write(chip, IDR2_CRAM_DATA, 0x0000); in snd_es1968_chip_init()
2297 maestro_write(chip, 0x08, 0xB004); in snd_es1968_chip_init()
2298 maestro_write(chip, 0x09, 0x001B); in snd_es1968_chip_init()
2299 maestro_write(chip, 0x0A, 0x8000); in snd_es1968_chip_init()
2300 maestro_write(chip, 0x0B, 0x3F37); in snd_es1968_chip_init()
2301 maestro_write(chip, 0x0C, 0x0098); in snd_es1968_chip_init()
2304 maestro_write(chip, 0x0C, in snd_es1968_chip_init()
2305 (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000); in snd_es1968_chip_init()
2307 maestro_write(chip, 0x0C, in snd_es1968_chip_init()
2308 (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500); in snd_es1968_chip_init()
2310 maestro_write(chip, 0x0D, 0x7632); in snd_es1968_chip_init()
2317 w &= ~0xFA00; /* Seems to be reserved? I don't know */ in snd_es1968_chip_init()
2318 w |= 0xA000; /* reserved... I don't know */ in snd_es1968_chip_init()
2319 w &= ~0x0200; /* Channels 56,57,58,59 as Extra Play,Rec Channel enable in snd_es1968_chip_init()
2321 w |= 0x0100; /* Wave Cache Operation Enabled */ in snd_es1968_chip_init()
2322 w |= 0x0080; /* Channels 60/61 as Placback/Record enabled */ in snd_es1968_chip_init()
2323 w &= ~0x0060; /* Clear Wavtable Size */ in snd_es1968_chip_init()
2324 w |= 0x0020; /* Wavetable Size : 1MB */ in snd_es1968_chip_init()
2326 w &= ~0x000C; /* DMA Stuff? I don't understand what the datasheet means */ in snd_es1968_chip_init()
2328 w &= ~0x0001; /* Test Mode off */ in snd_es1968_chip_init()
2333 for (i = 0; i < NR_APUS; i++) { in snd_es1968_chip_init()
2334 for (w = 0; w < NR_APU_REGS; w++) in snd_es1968_chip_init()
2335 apu_set_register(chip, i, w, 0); in snd_es1968_chip_init()
2347 outb(w, chip->io_port + 0x1A); in snd_es1968_start_irq()
2360 return 0; in es1968_suspend()
2367 return 0; in es1968_suspend()
2377 return 0; in es1968_resume()
2384 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12); in es1968_resume()
2408 chip->in_suspend = 0; in es1968_resume()
2409 return 0; in es1968_resume()
2415 #define JOYSTICK_ADDR 0x200
2438 pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04); in snd_es1968_create_gameport()
2447 return 0; in snd_es1968_create_gameport()
2492 return 0; in snd_es1968_input_register()
2497 #define GPIO_DATA 0x60
2501 bits 0/1=read/write direction */
2522 u16 val = 0; in snd_es1968_tea575x_set_pins()
2524 val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0; in snd_es1968_tea575x_set_pins()
2525 val |= (pins & TEA575X_CLK) ? (1 << gpio.clk) : 0; in snd_es1968_tea575x_set_pins()
2526 val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0; in snd_es1968_tea575x_set_pins()
2536 u8 ret = 0; in snd_es1968_tea575x_get_pins()
2580 outw(1, chip->io_port + 0x04); /* clear WP interrupts */ in snd_es1968_free()
2581 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */ in snd_es1968_free()
2598 { TYPE_MAESTRO2E, 0x0e11 }, /* Compaq Armada */
2599 { TYPE_MAESTRO2E, 0x1028 },
2600 { TYPE_MAESTRO2E, 0x103c },
2601 { TYPE_MAESTRO2E, 0x1179 },
2602 { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */
2603 { TYPE_MAESTRO2E, 0x1558 },
2604 { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */
2605 { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */
2609 { TYPE_MAESTRO2, 0x125d },
2626 if (err < 0) in snd_es1968_create()
2651 if (err < 0) in snd_es1968_create()
2653 chip->io_port = pci_resource_start(pci, 0); in snd_es1968_create()
2664 for (i = 0; i < 32; i++) in snd_es1968_create()
2665 chip->maestro_map[i] = 0; in snd_es1968_create()
2668 for (i = 0; i < NR_APUS; i++) in snd_es1968_create()
2678 for (i = 0; i < (int)ARRAY_SIZE(pm_allowlist); i++) { in snd_es1968_create()
2688 do_pm = 0; in snd_es1968_create()
2697 if (chip->pci->subsystem_vendor != 0x125d) in snd_es1968_create()
2698 return 0; in snd_es1968_create()
2700 if (err < 0) in snd_es1968_create()
2707 for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) { in snd_es1968_create()
2718 return 0; in snd_es1968_create()
2742 if (err < 0) in __snd_es1968_probe()
2757 if (err < 0) in __snd_es1968_probe()
2775 err = snd_es1968_pcm(chip, 0); in __snd_es1968_probe()
2776 if (err < 0) in __snd_es1968_probe()
2780 if (err < 0) in __snd_es1968_probe()
2787 for (i = 0; i < ARRAY_SIZE(mpu_denylist); i++) { in __snd_es1968_probe()
2790 enable_mpu[dev] = 0; in __snd_es1968_probe()
2796 err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, in __snd_es1968_probe()
2801 if (err < 0) in __snd_es1968_probe()
2820 sprintf(card->longname, "%s at 0x%lx, irq %i", in __snd_es1968_probe()
2824 if (err < 0) in __snd_es1968_probe()
2828 return 0; in __snd_es1968_probe()