Lines Matching +full:pcm +full:- +full:clock +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /* Power-Management-Code ( CONFIG_PM )
11 * using https://www.kernel.org/doc/html/latest/sound/kernel-api/writing-an-alsa-driver.html
27 #include <sound/pcm.h>
64 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
96 MODULE_PARM_DESC(spdif, "S/PDIF output (-1 = none, 0 = auto, 1 = force).");
111 #define CT5880REV_CT5880_D 0x03 /* ??? -jk */
121 #define ES_REG(ensoniq, x) ((ensoniq)->port + ES_REG_##x)
131 #define ES_1373_SPDIF_THRU (1<<26) /* 0 = SPDIF thru mode, 1 = SPDIF == dig out */
135 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f)/* GPIO in [3:0] pins - R/O */
136 #define ES_1370_PCLKDIVO(o) (((o)&0x1fff)<<16)/* clock divide ratio for DAC2 */
138 #define ES_1370_PCLKDIVI(i) (((i)>>16)&0x1fff)/* clock divide ratio for DAC2 */
139 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16)/* GPIO out [3:0] pins - W/R */
142 #define ES_1370_M_SBB (1<<14) /* clock source for DAC - 0 = clock generator; 1 = MPEG clocks */
144 #define ES_1370_WTSRSEL(o) (((o)&0x03)<<12)/* fixed frequency clock for DAC1 */
149 #define ES_1371_M_CB (1<<11) /* capture clock source; 0 = AC'97 ADC; 1 = I2S */
151 #define ES_1370_M_CB (1<<9) /* capture clock source; 0 = ADC; 1 = MPEG */
162 #define ES_1371_XTALCKDIS (1<<1) /* Xtal clock disable */
164 #define ES_1371_PCICLKDIS (1<<0) /* PCI clock disable */
168 #define ES_1373_REAR_BIT27 (1<<27) /* rear bits: 000 - front, 010 - mirror, 101 - separate */
171 #define ES_1373_GPIO_INT_EN(o)(((o)&0x0f)<<20)/* GPIO [3:0] pins - interrupt enable */
175 #define ES_1373_GPIO_INT(i) (((i)&0x0f)>>12)/* GPIO [3:0] pins - interrupt pending */
202 #define ES_TEST_MODE (1<<0) /* test mode enabled */
204 #define ES_MEM_PAGEO(o) (((o)&0x0f)<<0) /* memory page select - out */
206 #define ES_MEM_PAGEI(i) (((i)>>0)&0x0f) /* memory page select - in */
256 #define ES_REG_CHANNEL_STATUS 0x1c /* R/W: first 32-bits from S/PDIF channel status block, es1373 */
259 #define ES_1371_DAC_TEST (1<<22) /* DAC test mode enable */
266 #define ES_R1_LOOP_SEL (1<<15) /* ADC; 0 - loop mode; 1 = stop mode */
267 #define ES_P2_LOOP_SEL (1<<14) /* DAC2; 0 - loop mode; 1 = stop mode */
268 #define ES_P1_LOOP_SEL (1<<13) /* DAC1; 0 - loop mode; 1 = stop mode */
269 #define ES_P2_PAUSE (1<<12) /* DAC2; 0 - play mode; 1 = pause mode */
270 #define ES_P1_PAUSE (1<<11) /* DAC1; 0 - play mode; 1 = pause mode */
275 #define ES_P2_DAC_SEN (1<<6) /* when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample */
276 #define ES_R1_MODEO(o) (((o)&0x03)<<4) /* ADC mode; 0 = 8-bit mono; 1 = 8-bit stereo; 2 = 16-bit mono; 3 = 16-bit stereo */
279 #define ES_P2_MODEO(o) (((o)&0x03)<<2) /* DAC2 mode; -- '' -- */
282 #define ES_P1_MODEO(o) (((o)&0x03)<<0) /* DAC1 mode; -- '' -- */
345 #define ES_1370_SRTODIV(x) (ES_1370_SRCLOCK/(x)-2)
373 unsigned int mode;
374 unsigned int uartm; /* UART mode */
397 struct snd_pcm *pcm1; /* DAC1/ADC PCM */
398 struct snd_pcm *pcm2; /* DAC2 PCM */
433 { PCI_VDEVICE(ENSONIQ, 0x5880), 0, }, /* ES1373 - CT5880 */
506 dev_err(ensoniq->card->dev, "wait src ready timeout 0x%lx [0x%x]\n",
564 struct ensoniq *ensoniq = ak4531->private_data;
568 dev_dbg(ensoniq->card->dev,
579 dev_err(ensoniq->card->dev, "codec write timeout, status = 0x%x\n",
589 return ensoniq->pci->device == 0x8938;
595 struct ensoniq *ensoniq = ac97->private_data;
599 guard(mutex)(&ensoniq->src_mutex);
628 dev_err(ensoniq->card->dev, "codec write timeout at 0x%lx [0x%x]\n",
635 struct ensoniq *ensoniq = ac97->private_data;
640 mutex_lock(&ensoniq->src_mutex);
680 mutex_unlock(&ensoniq->src_mutex);
684 mutex_unlock(&ensoniq->src_mutex);
686 dev_err(ensoniq->card->dev,
695 mutex_unlock(&ensoniq->src_mutex);
696 dev_err(ensoniq->card->dev, "codec read timeout at 0x%lx [0x%x]\n",
714 guard(mutex)(&ensoniq->src_mutex);
717 n--;
718 truncm = (21 * n - 1) | 1;
724 (((239 - truncm) >> 1) << 9) | (n << 4));
729 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
744 guard(mutex)(&ensoniq->src_mutex);
764 guard(mutex)(&ensoniq->src_mutex);
793 if (s == ensoniq->playback1_substream) {
796 } else if (s == ensoniq->playback2_substream) {
799 } else if (s == ensoniq->capture_substream)
800 return -EINVAL;
802 scoped_guard(spinlock, &ensoniq->reg_lock) {
804 ensoniq->sctrl |= what;
806 ensoniq->sctrl &= ~what;
807 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
817 if (s == ensoniq->playback1_substream) {
820 } else if (s == ensoniq->playback2_substream) {
823 } else if (s == ensoniq->capture_substream) {
828 scoped_guard(spinlock, &ensoniq->reg_lock) {
830 ensoniq->ctrl |= what;
832 ensoniq->ctrl &= ~what;
833 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
838 return -EINVAL;
844 * PCM part
850 struct snd_pcm_runtime *runtime = substream->runtime;
851 unsigned int mode = 0;
853 ensoniq->p1_dma_size = snd_pcm_lib_buffer_bytes(substream);
854 ensoniq->p1_period_size = snd_pcm_lib_period_bytes(substream);
855 if (snd_pcm_format_width(runtime->format) == 16)
856 mode |= 0x02;
857 if (runtime->channels > 1)
858 mode |= 0x01;
859 scoped_guard(spinlock_irq, &ensoniq->reg_lock) {
860 ensoniq->ctrl &= ~ES_DAC1_EN;
862 /* 48k doesn't need SRC (it breaks AC3-passthru) */
863 if (runtime->rate == 48000)
864 ensoniq->ctrl |= ES_1373_BYPASS_P1;
866 ensoniq->ctrl &= ~ES_1373_BYPASS_P1;
868 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
870 outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME));
871 outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE));
872 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM);
873 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode);
874 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
875 outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
878 ensoniq->ctrl &= ~ES_1370_WTSRSELM;
879 switch (runtime->rate) {
880 case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break;
881 case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break;
882 case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break;
883 case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break;
887 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
890 snd_es1371_dac1_rate(ensoniq, runtime->rate);
898 struct snd_pcm_runtime *runtime = substream->runtime;
899 unsigned int mode = 0;
901 ensoniq->p2_dma_size = snd_pcm_lib_buffer_bytes(substream);
902 ensoniq->p2_period_size = snd_pcm_lib_period_bytes(substream);
903 if (snd_pcm_format_width(runtime->format) == 16)
904 mode |= 0x02;
905 if (runtime->channels > 1)
906 mode |= 0x01;
907 scoped_guard(spinlock_irq, &ensoniq->reg_lock) {
908 ensoniq->ctrl &= ~ES_DAC2_EN;
909 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
911 outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME));
912 outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE));
913 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN |
915 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) |
916 ES_P2_END_INCO(mode & 2 ? 2 : 1) | ES_P2_ST_INCO(0);
917 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
918 outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
921 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) {
922 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
923 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
924 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2;
927 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
930 snd_es1371_dac2_rate(ensoniq, runtime->rate);
938 struct snd_pcm_runtime *runtime = substream->runtime;
939 unsigned int mode = 0;
941 ensoniq->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
942 ensoniq->c_period_size = snd_pcm_lib_period_bytes(substream);
943 if (snd_pcm_format_width(runtime->format) == 16)
944 mode |= 0x02;
945 if (runtime->channels > 1)
946 mode |= 0x01;
947 scoped_guard(spinlock_irq, &ensoniq->reg_lock) {
948 ensoniq->ctrl &= ~ES_ADC_EN;
949 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
951 outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME));
952 outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE));
953 ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM);
954 ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode);
955 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
956 outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
959 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) {
960 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
961 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
962 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE;
965 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
968 snd_es1371_adc_rate(ensoniq, runtime->rate);
978 guard(spinlock)(&ensoniq->reg_lock);
982 return bytes_to_frames(substream->runtime, ptr);
993 guard(spinlock)(&ensoniq->reg_lock);
997 return bytes_to_frames(substream->runtime, ptr);
1008 guard(spinlock)(&ensoniq->reg_lock);
1012 return bytes_to_frames(substream->runtime, ptr);
1087 struct snd_pcm_runtime *runtime = substream->runtime;
1089 ensoniq->mode |= ES_MODE_PLAY1;
1090 ensoniq->playback1_substream = substream;
1091 runtime->hw = snd_ensoniq_playback1;
1093 scoped_guard(spinlock_irq, &ensoniq->reg_lock) {
1094 if (ensoniq->spdif && ensoniq->playback2_substream == NULL)
1095 ensoniq->spdif_stream = ensoniq->spdif_default;
1110 struct snd_pcm_runtime *runtime = substream->runtime;
1112 ensoniq->mode |= ES_MODE_PLAY2;
1113 ensoniq->playback2_substream = substream;
1114 runtime->hw = snd_ensoniq_playback2;
1116 scoped_guard(spinlock_irq, &ensoniq->reg_lock) {
1117 if (ensoniq->spdif && ensoniq->playback1_substream == NULL)
1118 ensoniq->spdif_stream = ensoniq->spdif_default;
1133 struct snd_pcm_runtime *runtime = substream->runtime;
1135 ensoniq->mode |= ES_MODE_CAPTURE;
1136 ensoniq->capture_substream = substream;
1137 runtime->hw = snd_ensoniq_capture;
1153 ensoniq->playback1_substream = NULL;
1154 ensoniq->mode &= ~ES_MODE_PLAY1;
1162 ensoniq->playback2_substream = NULL;
1163 guard(spinlock_irq)(&ensoniq->reg_lock);
1165 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2;
1167 ensoniq->mode &= ~ES_MODE_PLAY2;
1175 ensoniq->capture_substream = NULL;
1176 guard(spinlock_irq)(&ensoniq->reg_lock);
1178 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE;
1180 ensoniq->mode &= ~ES_MODE_CAPTURE;
1218 struct snd_pcm *pcm;
1221 err = snd_pcm_new(ensoniq->card, CHIP_NAME "/1", device, 1, 1, &pcm);
1226 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops);
1228 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops);
1230 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ensoniq_capture_ops);
1232 pcm->private_data = ensoniq;
1233 pcm->info_flags = 0;
1234 strscpy(pcm->name, CHIP_NAME " DAC2/ADC");
1235 ensoniq->pcm1 = pcm;
1237 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1238 &ensoniq->pci->dev, 64*1024, 128*1024);
1241 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1244 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1252 struct snd_pcm *pcm;
1255 err = snd_pcm_new(ensoniq->card, CHIP_NAME "/2", device, 1, 0, &pcm);
1260 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback1_ops);
1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ensoniq_playback2_ops);
1264 pcm->private_data = ensoniq;
1265 pcm->info_flags = 0;
1266 strscpy(pcm->name, CHIP_NAME " DAC1");
1267 ensoniq->pcm2 = pcm;
1269 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1270 &ensoniq->pci->dev, 64*1024, 128*1024);
1273 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1276 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1293 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1294 uinfo->count = 1;
1303 guard(spinlock_irq)(&ensoniq->reg_lock);
1304 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff;
1305 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff;
1306 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff;
1307 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff;
1318 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1319 ((u32)ucontrol->value.iec958.status[1] << 8) |
1320 ((u32)ucontrol->value.iec958.status[2] << 16) |
1321 ((u32)ucontrol->value.iec958.status[3] << 24);
1322 guard(spinlock_irq)(&ensoniq->reg_lock);
1323 change = ensoniq->spdif_default != val;
1324 ensoniq->spdif_default = val;
1325 if (change && ensoniq->playback1_substream == NULL &&
1326 ensoniq->playback2_substream == NULL)
1334 ucontrol->value.iec958.status[0] = 0xff;
1335 ucontrol->value.iec958.status[1] = 0xff;
1336 ucontrol->value.iec958.status[2] = 0xff;
1337 ucontrol->value.iec958.status[3] = 0xff;
1346 guard(spinlock_irq)(&ensoniq->reg_lock);
1347 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff;
1348 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff;
1349 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff;
1350 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff;
1361 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1362 ((u32)ucontrol->value.iec958.status[1] << 8) |
1363 ((u32)ucontrol->value.iec958.status[2] << 16) |
1364 ((u32)ucontrol->value.iec958.status[3] << 24);
1365 guard(spinlock_irq)(&ensoniq->reg_lock);
1366 change = ensoniq->spdif_stream != val;
1367 ensoniq->spdif_stream = val;
1368 if (change && (ensoniq->playback1_substream != NULL ||
1369 ensoniq->playback2_substream != NULL))
1385 guard(spinlock_irq)(&ensoniq->reg_lock);
1386 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0;
1397 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0;
1398 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0;
1399 guard(spinlock_irq)(&ensoniq->reg_lock);
1400 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1;
1401 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU;
1402 ensoniq->ctrl |= nval1;
1403 ensoniq->cssr &= ~ES_1373_SPDIF_EN;
1404 ensoniq->cssr |= nval2;
1405 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1406 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1446 guard(spinlock_irq)(&ensoniq->reg_lock);
1447 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|
1450 ucontrol->value.integer.value[0] = val;
1461 nval1 = ucontrol->value.integer.value[0] ?
1463 guard(spinlock_irq)(&ensoniq->reg_lock);
1464 change = (ensoniq->cssr & (ES_1373_REAR_BIT27|
1466 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24);
1467 ensoniq->cssr |= nval1;
1468 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1475 .name = "AC97 2ch->4ch Copy Switch",
1489 guard(spinlock_irq)(&ensoniq->reg_lock);
1490 if (ensoniq->ctrl & ES_1371_GPIO_OUT(4))
1492 ucontrol->value.integer.value[0] = val;
1503 guard(spinlock_irq)(&ensoniq->reg_lock);
1504 ctrl = ensoniq->ctrl;
1505 if (ucontrol->value.integer.value[0])
1506 ensoniq->ctrl |= ES_1371_GPIO_OUT(4); /* switch line-in -> rear out */
1508 ensoniq->ctrl &= ~ES_1371_GPIO_OUT(4);
1509 changed = (ctrl != ensoniq->ctrl);
1511 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1518 .name = "Line In->Rear Out Switch",
1526 struct ensoniq *ensoniq = ac97->private_data;
1527 ensoniq->u.es1371.ac97 = NULL;
1539 while (list->vid != (unsigned short)PCI_ANY_ID) {
1540 if (ensoniq->pci->vendor == list->vid &&
1541 ensoniq->pci->device == list->did &&
1542 ensoniq->rev == list->rev)
1559 SND_PCI_QUIRK_ID(0x1274, 0x2000), /* GA-7DXR */
1560 SND_PCI_QUIRK_ID(0x1458, 0xa000), /* GA-8IEXP */
1567 struct snd_card *card = ensoniq->card;
1584 ac97.pci = ensoniq->pci;
1586 err = snd_ac97_mixer(pbus, &ac97, &ensoniq->u.es1371.ac97);
1594 ensoniq->spdif_default = ensoniq->spdif_stream =
1596 outl(ensoniq->spdif_default, ES_REG(ensoniq, CHANNEL_STATUS));
1598 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SPDIF)
1604 return -ENOMEM;
1605 kctl->id.index = is_spdif;
1611 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SDAC) {
1613 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT24);
1614 ensoniq->cssr |= ES_1373_REAR_BIT26;
1620 snd_pci_quirk_lookup(ensoniq->pci, ens1373_line_quirk)) {
1645 int mask = kcontrol->private_value;
1647 guard(spinlock_irq)(&ensoniq->reg_lock);
1648 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0;
1656 int mask = kcontrol->private_value;
1660 nval = ucontrol->value.integer.value[0] ? mask : 0;
1661 guard(spinlock_irq)(&ensoniq->reg_lock);
1662 change = (ensoniq->ctrl & mask) != nval;
1663 ensoniq->ctrl &= ~mask;
1664 ensoniq->ctrl |= nval;
1665 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1674 ENSONIQ_CONTROL("PCM 0 Output also on Line-In Jack", ES_1370_XCTL0),
1682 struct ensoniq *ensoniq = ak4531->private_data;
1683 ensoniq->u.es1370.ak4531 = NULL;
1688 struct snd_card *card = ensoniq->card;
1705 err = snd_ak4531_mixer(card, &ak4531, &ensoniq->u.es1370.ak4531);
1725 case 1: /* auto-detect */
1733 dev_err(ensoniq->card->dev,
1754 return -ENOSYS;
1761 dev_warn(ensoniq->card->dev,
1763 return -EBUSY;
1769 dev_warn(ensoniq->card->dev,
1772 return -EBUSY;
1777 ensoniq->gameport = gp = gameport_allocate_port();
1779 dev_err(ensoniq->card->dev,
1782 return -ENOMEM;
1786 gameport_set_phys(gp, "pci%s/gameport0", pci_name(ensoniq->pci));
1787 gameport_set_dev_parent(gp, &ensoniq->pci->dev);
1788 gp->io = io_port;
1790 ensoniq->ctrl |= ES_JYSTK_EN;
1792 ensoniq->ctrl &= ~ES_1371_JOY_ASELM;
1793 ensoniq->ctrl |= ES_1371_JOY_ASEL((io_port - 0x200) / 8);
1795 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1797 gameport_register_port(ensoniq->gameport);
1804 if (ensoniq->gameport) {
1805 int port = ensoniq->gameport->io;
1807 gameport_unregister_port(ensoniq->gameport);
1808 ensoniq->gameport = NULL;
1809 ensoniq->ctrl &= ~ES_JYSTK_EN;
1810 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1815 static inline int snd_ensoniq_create_gameport(struct ensoniq *ensoniq, long port) { return -ENOSYS; }
1826 struct ensoniq *ensoniq = entry->private_data;
1830 str_on_off(ensoniq->ctrl & ES_JYSTK_EN));
1833 str_on_off(ensoniq->ctrl & ES_1370_XCTL1));
1835 str_on_off(ensoniq->ctrl & ES_1370_XCTL0));
1838 (ES_1371_JOY_ASELI(ensoniq->ctrl) * 8) + 0x200);
1844 snd_card_ro_proc_new(ensoniq->card, "audiopci", ensoniq,
1854 struct ensoniq *ensoniq = card->private_data;
1869 SND_PCI_QUIRK_ID(0x13bd, 0x100c), /* EV1938 on Mebius PC-MJ100V */
1894 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1895 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1897 outl(ensoniq->dma_bug->addr, ES_REG(ensoniq, PHANTOM_FRAME));
1900 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1901 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1904 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1910 outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL));
1913 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1936 * power cycle) - Thomas Sailer
1943 outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
1945 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1951 struct ensoniq *ensoniq = card->private_data;
1956 snd_ac97_suspend(ensoniq->u.es1371.ac97);
1965 snd_ak4531_suspend(ensoniq->u.es1370.ak4531);
1973 struct ensoniq *ensoniq = card->private_data;
1978 snd_ac97_resume(ensoniq->u.es1371.ac97);
1980 snd_ak4531_resume(ensoniq->u.es1370.ak4531);
1991 struct ensoniq *ensoniq = card->private_data;
1997 spin_lock_init(&ensoniq->reg_lock);
1998 mutex_init(&ensoniq->src_mutex);
1999 ensoniq->card = card;
2000 ensoniq->pci = pci;
2001 ensoniq->irq = -1;
2005 ensoniq->port = pci_resource_start(pci, 0);
2006 if (devm_request_irq(&pci->dev, pci->irq, snd_audiopci_interrupt,
2008 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2009 return -EBUSY;
2011 ensoniq->irq = pci->irq;
2012 card->sync_irq = ensoniq->irq;
2014 ensoniq->dma_bug =
2015 snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 16);
2016 if (!ensoniq->dma_bug)
2017 return -ENOMEM;
2020 ensoniq->rev = pci->revision;
2023 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE |
2026 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000));
2028 ensoniq->sctrl = 0;
2030 ensoniq->ctrl = 0;
2031 ensoniq->sctrl = 0;
2032 ensoniq->cssr = 0;
2034 ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */
2037 ensoniq->cssr |= ES_1371_ST_AC97_RST;
2040 card->private_free = snd_ensoniq_free;
2053 struct snd_rawmidi *rmidi = ensoniq->rmidi;
2059 scoped_guard(spinlock, &ensoniq->reg_lock) {
2060 mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0;
2066 snd_rawmidi_receive(ensoniq->midi_input, &byte, 1);
2071 guard(spinlock)(&ensoniq->reg_lock);
2072 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0;
2077 if (snd_rawmidi_transmit(ensoniq->midi_output, &byte, 1) != 1) {
2078 ensoniq->uartc &= ~ES_TXINTENM;
2079 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2089 struct ensoniq *ensoniq = substream->rmidi->private_data;
2091 guard(spinlock_irq)(&ensoniq->reg_lock);
2092 ensoniq->uartm |= ES_MODE_INPUT;
2093 ensoniq->midi_input = substream;
2094 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2096 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2097 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2104 struct ensoniq *ensoniq = substream->rmidi->private_data;
2106 guard(spinlock_irq)(&ensoniq->reg_lock);
2107 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2108 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2109 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2111 outb(ensoniq->uartc &= ~ES_RXINTEN, ES_REG(ensoniq, UART_CONTROL));
2113 ensoniq->midi_input = NULL;
2114 ensoniq->uartm &= ~ES_MODE_INPUT;
2120 struct ensoniq *ensoniq = substream->rmidi->private_data;
2122 guard(spinlock_irq)(&ensoniq->reg_lock);
2123 ensoniq->uartm |= ES_MODE_OUTPUT;
2124 ensoniq->midi_output = substream;
2125 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2127 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2128 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2135 struct ensoniq *ensoniq = substream->rmidi->private_data;
2137 guard(spinlock_irq)(&ensoniq->reg_lock);
2138 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2139 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2140 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2142 outb(ensoniq->uartc &= ~ES_TXINTENM, ES_REG(ensoniq, UART_CONTROL));
2144 ensoniq->midi_output = NULL;
2145 ensoniq->uartm &= ~ES_MODE_OUTPUT;
2151 struct ensoniq *ensoniq = substream->rmidi->private_data;
2154 guard(spinlock_irqsave)(&ensoniq->reg_lock);
2156 if ((ensoniq->uartc & ES_RXINTEN) == 0) {
2160 ensoniq->uartc |= ES_RXINTEN;
2161 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2164 if (ensoniq->uartc & ES_RXINTEN) {
2165 ensoniq->uartc &= ~ES_RXINTEN;
2166 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2173 struct ensoniq *ensoniq = substream->rmidi->private_data;
2176 guard(spinlock_irqsave)(&ensoniq->reg_lock);
2178 if (ES_TXINTENI(ensoniq->uartc) == 0) {
2179 ensoniq->uartc |= ES_TXINTENO(1);
2181 while (ES_TXINTENI(ensoniq->uartc) == 1 &&
2184 ensoniq->uartc &= ~ES_TXINTENM;
2189 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2192 if (ES_TXINTENI(ensoniq->uartc) == 1) {
2193 ensoniq->uartc &= ~ES_TXINTENM;
2194 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2218 err = snd_rawmidi_new(ensoniq->card, "ES1370/1", device, 1, 1, &rmidi);
2221 strscpy(rmidi->name, CHIP_NAME);
2224 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT |
2226 rmidi->private_data = ensoniq;
2227 ensoniq->rmidi = rmidi;
2247 scoped_guard(spinlock, &ensoniq->reg_lock) {
2248 sctrl = ensoniq->sctrl;
2256 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
2261 if ((status & ES_DAC2) && ensoniq->playback2_substream)
2262 snd_pcm_period_elapsed(ensoniq->playback2_substream);
2263 if ((status & ES_ADC) && ensoniq->capture_substream)
2264 snd_pcm_period_elapsed(ensoniq->capture_substream);
2265 if ((status & ES_DAC1) && ensoniq->playback1_substream)
2266 snd_pcm_period_elapsed(ensoniq->playback1_substream);
2279 return -ENODEV;
2282 return -ENOENT;
2285 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2289 ensoniq = card->private_data;
2317 strscpy(card->driver, DRIVER_NAME);
2319 strscpy(card->shortname, "Ensoniq AudioPCI");
2320 sprintf(card->longname, "%s %s at 0x%lx, irq %i",
2321 card->shortname,
2322 card->driver,
2323 ensoniq->port,
2324 ensoniq->irq);
2338 return snd_card_free_on_error(&pci->dev, __snd_audiopci_probe(pci, pci_id));