Lines Matching +full:bias +full:- +full:ctrl +full:- +full:value
1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /* Power-Management-Code ( CONFIG_PM )
11 * using https://www.kernel.org/doc/html/latest/sound/kernel-api/writing-an-alsa-driver.html
64 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80 MODULE_PARM_DESC(index, "Index value for Ensoniq AudioPCI soundcard.");
96 MODULE_PARM_DESC(spdif, "S/PDIF output (-1 = none, 0 = auto, 1 = force).");
111 #define CT5880REV_CT5880_D 0x03 /* ??? -jk */
121 #define ES_REG(ensoniq, x) ((ensoniq)->port + ES_REG_##x)
135 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f)/* GPIO in [3:0] pins - R/O */
139 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16)/* GPIO out [3:0] pins - W/R */
142 #define ES_1370_M_SBB (1<<14) /* clock source for DAC - 0 = clock generator; 1 = MPEG clocks */
168 #define ES_1373_REAR_BIT27 (1<<27) /* rear bits: 000 - front, 010 - mirror, 101 - separate */
171 #define ES_1373_GPIO_INT_EN(o)(((o)&0x0f)<<20)/* GPIO [3:0] pins - interrupt enable */
175 #define ES_1373_GPIO_INT(i) (((i)&0x0f)>>12)/* GPIO [3:0] pins - interrupt pending */
204 #define ES_MEM_PAGEO(o) (((o)&0x0f)<<0) /* memory page select - out */
206 #define ES_MEM_PAGEI(i) (((i)>>0)&0x0f) /* memory page select - in */
228 #define ES_1371_SRC_RAM_DATAO(o) (((o)&0xffff)<<0)/* current value of the sample rate converter */
230 #define ES_1371_SRC_RAM_DATAI(i) (((i)>>0)&0xffff)/* current value of the sample rate converter */
256 #define ES_REG_CHANNEL_STATUS 0x1c /* R/W: first 32-bits from S/PDIF channel status block, es1373 */
260 #define ES_P2_END_INCO(o) (((o)&0x07)<<19)/* binary offset value to increment / loop end */
262 #define ES_P2_END_INCI(i) (((i)>>16)&0x07)/* binary offset value to increment / loop end */
263 #define ES_P2_ST_INCO(o) (((o)&0x07)<<16)/* binary offset value to increment / start */
265 #define ES_P2_ST_INCI(i) (((i)<<16)&0x07)/* binary offset value to increment / start */
266 #define ES_R1_LOOP_SEL (1<<15) /* ADC; 0 - loop mode; 1 = stop mode */
267 #define ES_P2_LOOP_SEL (1<<14) /* DAC2; 0 - loop mode; 1 = stop mode */
268 #define ES_P1_LOOP_SEL (1<<13) /* DAC1; 0 - loop mode; 1 = stop mode */
269 #define ES_P2_PAUSE (1<<12) /* DAC2; 0 - play mode; 1 = pause mode */
270 #define ES_P1_PAUSE (1<<11) /* DAC1; 0 - play mode; 1 = pause mode */
275 #define ES_P2_DAC_SEN (1<<6) /* when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample */
276 #define ES_R1_MODEO(o) (((o)&0x03)<<4) /* ADC mode; 0 = 8-bit mono; 1 = 8-bit stereo; 2 = 16-bit mono; 3 = 16-bit stereo */
279 #define ES_P2_MODEO(o) (((o)&0x03)<<2) /* DAC2 mode; -- '' -- */
282 #define ES_P1_MODEO(o) (((o)&0x03)<<0) /* DAC1 mode; -- '' -- */
345 #define ES_1370_SRTODIV(x) (ES_1370_SRCLOCK/(x)-2)
376 unsigned int ctrl; /* control register */
433 { PCI_VDEVICE(ENSONIQ, 0x5880), 0, }, /* ES1373 - CT5880 */
506 dev_err(ensoniq->card->dev, "wait src ready timeout 0x%lx [0x%x]\n",
564 struct ensoniq *ensoniq = ak4531->private_data;
568 dev_dbg(ensoniq->card->dev,
579 dev_err(ensoniq->card->dev, "codec write timeout, status = 0x%x\n",
589 return ensoniq->pci->device == 0x8938;
595 struct ensoniq *ensoniq = ac97->private_data;
599 mutex_lock(&ensoniq->src_mutex);
625 mutex_unlock(&ensoniq->src_mutex);
629 mutex_unlock(&ensoniq->src_mutex);
630 dev_err(ensoniq->card->dev, "codec write timeout at 0x%lx [0x%x]\n",
637 struct ensoniq *ensoniq = ac97->private_data;
642 mutex_lock(&ensoniq->src_mutex);
682 mutex_unlock(&ensoniq->src_mutex);
686 mutex_unlock(&ensoniq->src_mutex);
688 dev_err(ensoniq->card->dev,
697 mutex_unlock(&ensoniq->src_mutex);
698 dev_err(ensoniq->card->dev, "codec read timeout at 0x%lx [0x%x]\n",
716 mutex_lock(&ensoniq->src_mutex);
719 n--;
720 truncm = (21 * n - 1) | 1;
726 (((239 - truncm) >> 1) << 9) | (n << 4));
731 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
740 mutex_unlock(&ensoniq->src_mutex);
747 mutex_lock(&ensoniq->src_mutex);
761 mutex_unlock(&ensoniq->src_mutex);
768 mutex_lock(&ensoniq->src_mutex);
783 mutex_unlock(&ensoniq->src_mutex);
798 if (s == ensoniq->playback1_substream) {
801 } else if (s == ensoniq->playback2_substream) {
804 } else if (s == ensoniq->capture_substream)
805 return -EINVAL;
807 spin_lock(&ensoniq->reg_lock);
809 ensoniq->sctrl |= what;
811 ensoniq->sctrl &= ~what;
812 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
813 spin_unlock(&ensoniq->reg_lock);
822 if (s == ensoniq->playback1_substream) {
825 } else if (s == ensoniq->playback2_substream) {
828 } else if (s == ensoniq->capture_substream) {
833 spin_lock(&ensoniq->reg_lock);
835 ensoniq->ctrl |= what;
837 ensoniq->ctrl &= ~what;
838 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
839 spin_unlock(&ensoniq->reg_lock);
843 return -EINVAL;
855 struct snd_pcm_runtime *runtime = substream->runtime;
858 ensoniq->p1_dma_size = snd_pcm_lib_buffer_bytes(substream);
859 ensoniq->p1_period_size = snd_pcm_lib_period_bytes(substream);
860 if (snd_pcm_format_width(runtime->format) == 16)
862 if (runtime->channels > 1)
864 spin_lock_irq(&ensoniq->reg_lock);
865 ensoniq->ctrl &= ~ES_DAC1_EN;
867 /* 48k doesn't need SRC (it breaks AC3-passthru) */
868 if (runtime->rate == 48000)
869 ensoniq->ctrl |= ES_1373_BYPASS_P1;
871 ensoniq->ctrl &= ~ES_1373_BYPASS_P1;
873 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
875 outl(runtime->dma_addr, ES_REG(ensoniq, DAC1_FRAME));
876 outl((ensoniq->p1_dma_size >> 2) - 1, ES_REG(ensoniq, DAC1_SIZE));
877 ensoniq->sctrl &= ~(ES_P1_LOOP_SEL | ES_P1_PAUSE | ES_P1_SCT_RLD | ES_P1_MODEM);
878 ensoniq->sctrl |= ES_P1_INT_EN | ES_P1_MODEO(mode);
879 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
880 outl((ensoniq->p1_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
883 ensoniq->ctrl &= ~ES_1370_WTSRSELM;
884 switch (runtime->rate) {
885 case 5512: ensoniq->ctrl |= ES_1370_WTSRSEL(0); break;
886 case 11025: ensoniq->ctrl |= ES_1370_WTSRSEL(1); break;
887 case 22050: ensoniq->ctrl |= ES_1370_WTSRSEL(2); break;
888 case 44100: ensoniq->ctrl |= ES_1370_WTSRSEL(3); break;
892 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
893 spin_unlock_irq(&ensoniq->reg_lock);
895 snd_es1371_dac1_rate(ensoniq, runtime->rate);
903 struct snd_pcm_runtime *runtime = substream->runtime;
906 ensoniq->p2_dma_size = snd_pcm_lib_buffer_bytes(substream);
907 ensoniq->p2_period_size = snd_pcm_lib_period_bytes(substream);
908 if (snd_pcm_format_width(runtime->format) == 16)
910 if (runtime->channels > 1)
912 spin_lock_irq(&ensoniq->reg_lock);
913 ensoniq->ctrl &= ~ES_DAC2_EN;
914 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
916 outl(runtime->dma_addr, ES_REG(ensoniq, DAC2_FRAME));
917 outl((ensoniq->p2_dma_size >> 2) - 1, ES_REG(ensoniq, DAC2_SIZE));
918 ensoniq->sctrl &= ~(ES_P2_LOOP_SEL | ES_P2_PAUSE | ES_P2_DAC_SEN |
920 ensoniq->sctrl |= ES_P2_INT_EN | ES_P2_MODEO(mode) |
922 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
923 outl((ensoniq->p2_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
926 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_CAPTURE)) {
927 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
928 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
929 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_PLAY2;
932 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
933 spin_unlock_irq(&ensoniq->reg_lock);
935 snd_es1371_dac2_rate(ensoniq, runtime->rate);
943 struct snd_pcm_runtime *runtime = substream->runtime;
946 ensoniq->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
947 ensoniq->c_period_size = snd_pcm_lib_period_bytes(substream);
948 if (snd_pcm_format_width(runtime->format) == 16)
950 if (runtime->channels > 1)
952 spin_lock_irq(&ensoniq->reg_lock);
953 ensoniq->ctrl &= ~ES_ADC_EN;
954 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
956 outl(runtime->dma_addr, ES_REG(ensoniq, ADC_FRAME));
957 outl((ensoniq->c_dma_size >> 2) - 1, ES_REG(ensoniq, ADC_SIZE));
958 ensoniq->sctrl &= ~(ES_R1_LOOP_SEL | ES_R1_MODEM);
959 ensoniq->sctrl |= ES_R1_INT_EN | ES_R1_MODEO(mode);
960 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
961 outl((ensoniq->c_period_size >> snd_ensoniq_sample_shift[mode]) - 1,
964 if (!(ensoniq->u.es1370.pclkdiv_lock & ES_MODE_PLAY2)) {
965 ensoniq->ctrl &= ~ES_1370_PCLKDIVM;
966 ensoniq->ctrl |= ES_1370_PCLKDIVO(ES_1370_SRTODIV(runtime->rate));
967 ensoniq->u.es1370.pclkdiv_lock |= ES_MODE_CAPTURE;
970 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
971 spin_unlock_irq(&ensoniq->reg_lock);
973 snd_es1371_adc_rate(ensoniq, runtime->rate);
983 spin_lock(&ensoniq->reg_lock);
987 ptr = bytes_to_frames(substream->runtime, ptr);
991 spin_unlock(&ensoniq->reg_lock);
1000 spin_lock(&ensoniq->reg_lock);
1004 ptr = bytes_to_frames(substream->runtime, ptr);
1008 spin_unlock(&ensoniq->reg_lock);
1017 spin_lock(&ensoniq->reg_lock);
1021 ptr = bytes_to_frames(substream->runtime, ptr);
1025 spin_unlock(&ensoniq->reg_lock);
1098 struct snd_pcm_runtime *runtime = substream->runtime;
1100 ensoniq->mode |= ES_MODE_PLAY1;
1101 ensoniq->playback1_substream = substream;
1102 runtime->hw = snd_ensoniq_playback1;
1104 spin_lock_irq(&ensoniq->reg_lock);
1105 if (ensoniq->spdif && ensoniq->playback2_substream == NULL)
1106 ensoniq->spdif_stream = ensoniq->spdif_default;
1107 spin_unlock_irq(&ensoniq->reg_lock);
1121 struct snd_pcm_runtime *runtime = substream->runtime;
1123 ensoniq->mode |= ES_MODE_PLAY2;
1124 ensoniq->playback2_substream = substream;
1125 runtime->hw = snd_ensoniq_playback2;
1127 spin_lock_irq(&ensoniq->reg_lock);
1128 if (ensoniq->spdif && ensoniq->playback1_substream == NULL)
1129 ensoniq->spdif_stream = ensoniq->spdif_default;
1130 spin_unlock_irq(&ensoniq->reg_lock);
1144 struct snd_pcm_runtime *runtime = substream->runtime;
1146 ensoniq->mode |= ES_MODE_CAPTURE;
1147 ensoniq->capture_substream = substream;
1148 runtime->hw = snd_ensoniq_capture;
1164 ensoniq->playback1_substream = NULL;
1165 ensoniq->mode &= ~ES_MODE_PLAY1;
1173 ensoniq->playback2_substream = NULL;
1174 spin_lock_irq(&ensoniq->reg_lock);
1176 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_PLAY2;
1178 ensoniq->mode &= ~ES_MODE_PLAY2;
1179 spin_unlock_irq(&ensoniq->reg_lock);
1187 ensoniq->capture_substream = NULL;
1188 spin_lock_irq(&ensoniq->reg_lock);
1190 ensoniq->u.es1370.pclkdiv_lock &= ~ES_MODE_CAPTURE;
1192 ensoniq->mode &= ~ES_MODE_CAPTURE;
1193 spin_unlock_irq(&ensoniq->reg_lock);
1234 err = snd_pcm_new(ensoniq->card, CHIP_NAME "/1", device, 1, 1, &pcm);
1245 pcm->private_data = ensoniq;
1246 pcm->info_flags = 0;
1247 strcpy(pcm->name, CHIP_NAME " DAC2/ADC");
1248 ensoniq->pcm1 = pcm;
1251 &ensoniq->pci->dev, 64*1024, 128*1024);
1268 err = snd_pcm_new(ensoniq->card, CHIP_NAME "/2", device, 1, 0, &pcm);
1277 pcm->private_data = ensoniq;
1278 pcm->info_flags = 0;
1279 strcpy(pcm->name, CHIP_NAME " DAC1");
1280 ensoniq->pcm2 = pcm;
1283 &ensoniq->pci->dev, 64*1024, 128*1024);
1306 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1307 uinfo->count = 1;
1315 spin_lock_irq(&ensoniq->reg_lock);
1316 ucontrol->value.iec958.status[0] = (ensoniq->spdif_default >> 0) & 0xff;
1317 ucontrol->value.iec958.status[1] = (ensoniq->spdif_default >> 8) & 0xff;
1318 ucontrol->value.iec958.status[2] = (ensoniq->spdif_default >> 16) & 0xff;
1319 ucontrol->value.iec958.status[3] = (ensoniq->spdif_default >> 24) & 0xff;
1320 spin_unlock_irq(&ensoniq->reg_lock);
1331 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1332 ((u32)ucontrol->value.iec958.status[1] << 8) |
1333 ((u32)ucontrol->value.iec958.status[2] << 16) |
1334 ((u32)ucontrol->value.iec958.status[3] << 24);
1335 spin_lock_irq(&ensoniq->reg_lock);
1336 change = ensoniq->spdif_default != val;
1337 ensoniq->spdif_default = val;
1338 if (change && ensoniq->playback1_substream == NULL &&
1339 ensoniq->playback2_substream == NULL)
1341 spin_unlock_irq(&ensoniq->reg_lock);
1348 ucontrol->value.iec958.status[0] = 0xff;
1349 ucontrol->value.iec958.status[1] = 0xff;
1350 ucontrol->value.iec958.status[2] = 0xff;
1351 ucontrol->value.iec958.status[3] = 0xff;
1359 spin_lock_irq(&ensoniq->reg_lock);
1360 ucontrol->value.iec958.status[0] = (ensoniq->spdif_stream >> 0) & 0xff;
1361 ucontrol->value.iec958.status[1] = (ensoniq->spdif_stream >> 8) & 0xff;
1362 ucontrol->value.iec958.status[2] = (ensoniq->spdif_stream >> 16) & 0xff;
1363 ucontrol->value.iec958.status[3] = (ensoniq->spdif_stream >> 24) & 0xff;
1364 spin_unlock_irq(&ensoniq->reg_lock);
1375 val = ((u32)ucontrol->value.iec958.status[0] << 0) |
1376 ((u32)ucontrol->value.iec958.status[1] << 8) |
1377 ((u32)ucontrol->value.iec958.status[2] << 16) |
1378 ((u32)ucontrol->value.iec958.status[3] << 24);
1379 spin_lock_irq(&ensoniq->reg_lock);
1380 change = ensoniq->spdif_stream != val;
1381 ensoniq->spdif_stream = val;
1382 if (change && (ensoniq->playback1_substream != NULL ||
1383 ensoniq->playback2_substream != NULL))
1385 spin_unlock_irq(&ensoniq->reg_lock);
1400 spin_lock_irq(&ensoniq->reg_lock);
1401 ucontrol->value.integer.value[0] = ensoniq->ctrl & ES_1373_SPDIF_THRU ? 1 : 0;
1402 spin_unlock_irq(&ensoniq->reg_lock);
1413 nval1 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_THRU : 0;
1414 nval2 = ucontrol->value.integer.value[0] ? ES_1373_SPDIF_EN : 0;
1415 spin_lock_irq(&ensoniq->reg_lock);
1416 change = (ensoniq->ctrl & ES_1373_SPDIF_THRU) != nval1;
1417 ensoniq->ctrl &= ~ES_1373_SPDIF_THRU;
1418 ensoniq->ctrl |= nval1;
1419 ensoniq->cssr &= ~ES_1373_SPDIF_EN;
1420 ensoniq->cssr |= nval2;
1421 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1422 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1423 spin_unlock_irq(&ensoniq->reg_lock);
1463 spin_lock_irq(&ensoniq->reg_lock);
1464 if ((ensoniq->cssr & (ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|
1467 ucontrol->value.integer.value[0] = val;
1468 spin_unlock_irq(&ensoniq->reg_lock);
1479 nval1 = ucontrol->value.integer.value[0] ?
1481 spin_lock_irq(&ensoniq->reg_lock);
1482 change = (ensoniq->cssr & (ES_1373_REAR_BIT27|
1484 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT26|ES_1373_REAR_BIT24);
1485 ensoniq->cssr |= nval1;
1486 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1487 spin_unlock_irq(&ensoniq->reg_lock);
1494 .name = "AC97 2ch->4ch Copy Switch",
1508 spin_lock_irq(&ensoniq->reg_lock);
1509 if (ensoniq->ctrl & ES_1371_GPIO_OUT(4))
1511 ucontrol->value.integer.value[0] = val;
1512 spin_unlock_irq(&ensoniq->reg_lock);
1521 unsigned int ctrl;
1523 spin_lock_irq(&ensoniq->reg_lock);
1524 ctrl = ensoniq->ctrl;
1525 if (ucontrol->value.integer.value[0])
1526 ensoniq->ctrl |= ES_1371_GPIO_OUT(4); /* switch line-in -> rear out */
1528 ensoniq->ctrl &= ~ES_1371_GPIO_OUT(4);
1529 changed = (ctrl != ensoniq->ctrl);
1531 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1532 spin_unlock_irq(&ensoniq->reg_lock);
1539 .name = "Line In->Rear Out Switch",
1547 struct ensoniq *ensoniq = ac97->private_data;
1548 ensoniq->u.es1371.ac97 = NULL;
1560 while (list->vid != (unsigned short)PCI_ANY_ID) {
1561 if (ensoniq->pci->vendor == list->vid &&
1562 ensoniq->pci->device == list->did &&
1563 ensoniq->rev == list->rev)
1580 SND_PCI_QUIRK_ID(0x1274, 0x2000), /* GA-7DXR */
1581 SND_PCI_QUIRK_ID(0x1458, 0xa000), /* GA-8IEXP */
1588 struct snd_card *card = ensoniq->card;
1605 ac97.pci = ensoniq->pci;
1607 err = snd_ac97_mixer(pbus, &ac97, &ensoniq->u.es1371.ac97);
1615 ensoniq->spdif_default = ensoniq->spdif_stream =
1617 outl(ensoniq->spdif_default, ES_REG(ensoniq, CHANNEL_STATUS));
1619 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SPDIF)
1625 return -ENOMEM;
1626 kctl->id.index = is_spdif;
1632 if (ensoniq->u.es1371.ac97->ext_id & AC97_EI_SDAC) {
1634 ensoniq->cssr &= ~(ES_1373_REAR_BIT27|ES_1373_REAR_BIT24);
1635 ensoniq->cssr |= ES_1373_REAR_BIT26;
1641 snd_pci_quirk_lookup(ensoniq->pci, ens1373_line_quirk)) {
1666 int mask = kcontrol->private_value;
1668 spin_lock_irq(&ensoniq->reg_lock);
1669 ucontrol->value.integer.value[0] = ensoniq->ctrl & mask ? 1 : 0;
1670 spin_unlock_irq(&ensoniq->reg_lock);
1678 int mask = kcontrol->private_value;
1682 nval = ucontrol->value.integer.value[0] ? mask : 0;
1683 spin_lock_irq(&ensoniq->reg_lock);
1684 change = (ensoniq->ctrl & mask) != nval;
1685 ensoniq->ctrl &= ~mask;
1686 ensoniq->ctrl |= nval;
1687 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1688 spin_unlock_irq(&ensoniq->reg_lock);
1697 ENSONIQ_CONTROL("PCM 0 Output also on Line-In Jack", ES_1370_XCTL0),
1698 ENSONIQ_CONTROL("Mic +5V bias", ES_1370_XCTL1)
1705 struct ensoniq *ensoniq = ak4531->private_data;
1706 ensoniq->u.es1370.ak4531 = NULL;
1711 struct snd_card *card = ensoniq->card;
1728 err = snd_ak4531_mixer(card, &ak4531, &ensoniq->u.es1370.ak4531);
1748 case 1: /* auto-detect */
1756 dev_err(ensoniq->card->dev,
1777 return -ENOSYS;
1784 dev_warn(ensoniq->card->dev,
1786 return -EBUSY;
1792 dev_warn(ensoniq->card->dev,
1795 return -EBUSY;
1800 ensoniq->gameport = gp = gameport_allocate_port();
1802 dev_err(ensoniq->card->dev,
1805 return -ENOMEM;
1809 gameport_set_phys(gp, "pci%s/gameport0", pci_name(ensoniq->pci));
1810 gameport_set_dev_parent(gp, &ensoniq->pci->dev);
1811 gp->io = io_port;
1813 ensoniq->ctrl |= ES_JYSTK_EN;
1815 ensoniq->ctrl &= ~ES_1371_JOY_ASELM;
1816 ensoniq->ctrl |= ES_1371_JOY_ASEL((io_port - 0x200) / 8);
1818 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1820 gameport_register_port(ensoniq->gameport);
1827 if (ensoniq->gameport) {
1828 int port = ensoniq->gameport->io;
1830 gameport_unregister_port(ensoniq->gameport);
1831 ensoniq->gameport = NULL;
1832 ensoniq->ctrl &= ~ES_JYSTK_EN;
1833 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1838 static inline int snd_ensoniq_create_gameport(struct ensoniq *ensoniq, long port) { return -ENOSYS; }
1849 struct ensoniq *ensoniq = entry->private_data;
1853 str_on_off(ensoniq->ctrl & ES_JYSTK_EN));
1855 snd_iprintf(buffer, "MIC +5V bias : %s\n",
1856 str_on_off(ensoniq->ctrl & ES_1370_XCTL1));
1858 str_on_off(ensoniq->ctrl & ES_1370_XCTL0));
1861 (ES_1371_JOY_ASELI(ensoniq->ctrl) * 8) + 0x200);
1867 snd_card_ro_proc_new(ensoniq->card, "audiopci", ensoniq,
1877 struct ensoniq *ensoniq = card->private_data;
1892 SND_PCI_QUIRK_ID(0x13bd, 0x100c), /* EV1938 on Mebius PC-MJ100V */
1917 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1918 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1920 outl(ensoniq->dma_bug->addr, ES_REG(ensoniq, PHANTOM_FRAME));
1923 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1924 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
1927 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1933 outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL));
1936 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
1959 * power cycle) - Thomas Sailer
1966 outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
1968 outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
1974 struct ensoniq *ensoniq = card->private_data;
1979 snd_ac97_suspend(ensoniq->u.es1371.ac97);
1988 snd_ak4531_suspend(ensoniq->u.es1370.ak4531);
1996 struct ensoniq *ensoniq = card->private_data;
2001 snd_ac97_resume(ensoniq->u.es1371.ac97);
2003 snd_ak4531_resume(ensoniq->u.es1370.ak4531);
2014 struct ensoniq *ensoniq = card->private_data;
2020 spin_lock_init(&ensoniq->reg_lock);
2021 mutex_init(&ensoniq->src_mutex);
2022 ensoniq->card = card;
2023 ensoniq->pci = pci;
2024 ensoniq->irq = -1;
2028 ensoniq->port = pci_resource_start(pci, 0);
2029 if (devm_request_irq(&pci->dev, pci->irq, snd_audiopci_interrupt,
2031 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2032 return -EBUSY;
2034 ensoniq->irq = pci->irq;
2035 card->sync_irq = ensoniq->irq;
2037 ensoniq->dma_bug =
2038 snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 16);
2039 if (!ensoniq->dma_bug)
2040 return -ENOMEM;
2043 ensoniq->rev = pci->revision;
2046 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_SERR_DISABLE |
2049 ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000));
2051 ensoniq->sctrl = 0;
2053 ensoniq->ctrl = 0;
2054 ensoniq->sctrl = 0;
2055 ensoniq->cssr = 0;
2057 ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */
2060 ensoniq->cssr |= ES_1371_ST_AC97_RST;
2063 card->private_free = snd_ensoniq_free;
2076 struct snd_rawmidi *rmidi = ensoniq->rmidi;
2082 spin_lock(&ensoniq->reg_lock);
2083 mask = ensoniq->uartm & ES_MODE_INPUT ? ES_RXRDY : 0;
2089 snd_rawmidi_receive(ensoniq->midi_input, &byte, 1);
2091 spin_unlock(&ensoniq->reg_lock);
2094 spin_lock(&ensoniq->reg_lock);
2095 mask = ensoniq->uartm & ES_MODE_OUTPUT ? ES_TXRDY : 0;
2100 if (snd_rawmidi_transmit(ensoniq->midi_output, &byte, 1) != 1) {
2101 ensoniq->uartc &= ~ES_TXINTENM;
2102 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2108 spin_unlock(&ensoniq->reg_lock);
2113 struct ensoniq *ensoniq = substream->rmidi->private_data;
2115 spin_lock_irq(&ensoniq->reg_lock);
2116 ensoniq->uartm |= ES_MODE_INPUT;
2117 ensoniq->midi_input = substream;
2118 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2120 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2121 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2123 spin_unlock_irq(&ensoniq->reg_lock);
2129 struct ensoniq *ensoniq = substream->rmidi->private_data;
2131 spin_lock_irq(&ensoniq->reg_lock);
2132 if (!(ensoniq->uartm & ES_MODE_OUTPUT)) {
2133 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2134 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2136 outb(ensoniq->uartc &= ~ES_RXINTEN, ES_REG(ensoniq, UART_CONTROL));
2138 ensoniq->midi_input = NULL;
2139 ensoniq->uartm &= ~ES_MODE_INPUT;
2140 spin_unlock_irq(&ensoniq->reg_lock);
2146 struct ensoniq *ensoniq = substream->rmidi->private_data;
2148 spin_lock_irq(&ensoniq->reg_lock);
2149 ensoniq->uartm |= ES_MODE_OUTPUT;
2150 ensoniq->midi_output = substream;
2151 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2153 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2154 outl(ensoniq->ctrl |= ES_UART_EN, ES_REG(ensoniq, CONTROL));
2156 spin_unlock_irq(&ensoniq->reg_lock);
2162 struct ensoniq *ensoniq = substream->rmidi->private_data;
2164 spin_lock_irq(&ensoniq->reg_lock);
2165 if (!(ensoniq->uartm & ES_MODE_INPUT)) {
2166 outb(ensoniq->uartc = 0, ES_REG(ensoniq, UART_CONTROL));
2167 outl(ensoniq->ctrl &= ~ES_UART_EN, ES_REG(ensoniq, CONTROL));
2169 outb(ensoniq->uartc &= ~ES_TXINTENM, ES_REG(ensoniq, UART_CONTROL));
2171 ensoniq->midi_output = NULL;
2172 ensoniq->uartm &= ~ES_MODE_OUTPUT;
2173 spin_unlock_irq(&ensoniq->reg_lock);
2180 struct ensoniq *ensoniq = substream->rmidi->private_data;
2183 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2185 if ((ensoniq->uartc & ES_RXINTEN) == 0) {
2189 ensoniq->uartc |= ES_RXINTEN;
2190 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2193 if (ensoniq->uartc & ES_RXINTEN) {
2194 ensoniq->uartc &= ~ES_RXINTEN;
2195 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2198 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2204 struct ensoniq *ensoniq = substream->rmidi->private_data;
2207 spin_lock_irqsave(&ensoniq->reg_lock, flags);
2209 if (ES_TXINTENI(ensoniq->uartc) == 0) {
2210 ensoniq->uartc |= ES_TXINTENO(1);
2212 while (ES_TXINTENI(ensoniq->uartc) == 1 &&
2215 ensoniq->uartc &= ~ES_TXINTENM;
2220 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2223 if (ES_TXINTENI(ensoniq->uartc) == 1) {
2224 ensoniq->uartc &= ~ES_TXINTENM;
2225 outb(ensoniq->uartc, ES_REG(ensoniq, UART_CONTROL));
2228 spin_unlock_irqrestore(&ensoniq->reg_lock, flags);
2250 err = snd_rawmidi_new(ensoniq->card, "ES1370/1", device, 1, 1, &rmidi);
2253 strcpy(rmidi->name, CHIP_NAME);
2256 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT |
2258 rmidi->private_data = ensoniq;
2259 ensoniq->rmidi = rmidi;
2279 spin_lock(&ensoniq->reg_lock);
2280 sctrl = ensoniq->sctrl;
2288 outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
2289 spin_unlock(&ensoniq->reg_lock);
2293 if ((status & ES_DAC2) && ensoniq->playback2_substream)
2294 snd_pcm_period_elapsed(ensoniq->playback2_substream);
2295 if ((status & ES_ADC) && ensoniq->capture_substream)
2296 snd_pcm_period_elapsed(ensoniq->capture_substream);
2297 if ((status & ES_DAC1) && ensoniq->playback1_substream)
2298 snd_pcm_period_elapsed(ensoniq->playback1_substream);
2311 return -ENODEV;
2314 return -ENOENT;
2317 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2321 ensoniq = card->private_data;
2349 strcpy(card->driver, DRIVER_NAME);
2351 strcpy(card->shortname, "Ensoniq AudioPCI");
2352 sprintf(card->longname, "%s %s at 0x%lx, irq %i",
2353 card->shortname,
2354 card->driver,
2355 ensoniq->port,
2356 ensoniq->irq);
2370 return snd_card_free_on_error(&pci->dev, __snd_audiopci_probe(pci, pci_id));