Lines Matching +full:spartan +full:- +full:6
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Lee Revell <rlrevell@joe-job.com>
5 * James Courtier-Dutton <James@superbug.co.uk>
23 if (snd_BUG_ON(reg & (emu->audigy ? (0xffff0000 & ~A_PTR_ADDRESS_MASK) in check_ptr_reg()
41 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr_read()
42 outl(regptr, emu->port + PTR); in snd_emu10k1_ptr_read()
43 val = inl(emu->port + DATA); in snd_emu10k1_ptr_read()
44 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ptr_read()
51 mask = (1 << size) - 1; in snd_emu10k1_ptr_read()
76 mask = (1 << size) - 1; in snd_emu10k1_ptr_write()
82 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr_write()
83 outl(regptr, emu->port + PTR); in snd_emu10k1_ptr_write()
84 data |= inl(emu->port + DATA) & ~mask; in snd_emu10k1_ptr_write()
86 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr_write()
87 outl(regptr, emu->port + PTR); in snd_emu10k1_ptr_write()
89 outl(data, emu->port + DATA); in snd_emu10k1_ptr_write()
90 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ptr_write()
105 addr_mask = ~((emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK) >> 16); in snd_emu10k1_ptr_write_multiple()
108 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr_write_multiple()
117 outl((reg << 16) | chn, emu->port + PTR); in snd_emu10k1_ptr_write_multiple()
118 outl(data, emu->port + DATA); in snd_emu10k1_ptr_write_multiple()
120 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ptr_write_multiple()
135 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr20_read()
136 outl(regptr, emu->port + PTR2); in snd_emu10k1_ptr20_read()
137 val = inl(emu->port + DATA2); in snd_emu10k1_ptr20_read()
138 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ptr20_read()
152 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ptr20_write()
153 outl(regptr, emu->port + PTR2); in snd_emu10k1_ptr20_write()
154 outl(data, emu->port + DATA2); in snd_emu10k1_ptr20_write()
155 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ptr20_write()
166 /* This function is not re-entrant, so protect against it. */ in snd_emu10k1_spi_write()
167 spin_lock(&emu->spi_lock); in snd_emu10k1_spi_write()
168 if (emu->card_capabilities->ca0108_chip) in snd_emu10k1_spi_write()
207 spin_unlock(&emu->spi_lock); in snd_emu10k1_spi_write()
223 dev_err(emu->card->dev, "i2c_write: invalid values.\n"); in snd_emu10k1_i2c_write()
224 return -EINVAL; in snd_emu10k1_i2c_write()
227 /* This function is not re-entrant, so protect against it. */ in snd_emu10k1_i2c_write()
228 spin_lock(&emu->i2c_lock); in snd_emu10k1_i2c_write()
251 dev_warn(emu->card->dev, in snd_emu10k1_i2c_write()
263 dev_err(emu->card->dev, "Writing to ADC failed!\n"); in snd_emu10k1_i2c_write()
264 dev_err(emu->card->dev, "status=0x%x, reg=%d, value=%d\n", in snd_emu10k1_i2c_write()
267 err = -EINVAL; in snd_emu10k1_i2c_write()
270 spin_unlock(&emu->i2c_lock); in snd_emu10k1_i2c_write()
281 outw(reg, emu->port + A_GPIO); in snd_emu1010_fpga_write_locked()
283 outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ in snd_emu1010_fpga_write_locked()
285 outw(value, emu->port + A_GPIO); in snd_emu1010_fpga_write_locked()
287 outw(value | 0x80 , emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ in snd_emu1010_fpga_write_locked()
293 if (snd_BUG_ON(!mutex_is_locked(&emu->emu1010.lock))) in snd_emu1010_fpga_write()
311 u32 mask = emu->card_capabilities->ca0108_chip ? 0x1f : 0x7f; in snd_emu1010_fpga_read()
313 if (snd_BUG_ON(!mutex_is_locked(&emu->emu1010.lock))) in snd_emu1010_fpga_read()
318 outw(reg, emu->port + A_GPIO); in snd_emu1010_fpga_read()
320 outw(reg | 0x80, emu->port + A_GPIO); /* High bit clocks the value into the fpga. */ in snd_emu1010_fpga_read()
322 *value = ((inw(emu->port + A_GPIO) >> 8) & mask); in snd_emu1010_fpga_read()
391 switch (emu->emu1010.wclock) { in snd_emu1010_update_clock()
402 emu, emu->emu1010.wclock & EMU_HANA_WCLOCK_SRC_MASK); in snd_emu1010_update_clock()
416 emu->emu1010.word_clock = clock; in snd_emu1010_update_clock()
430 // On E-MU 1010 rev1 the FPGA is a Xilinx Spartan IIE XC2S50E. in snd_emu1010_load_firmware_entry()
431 // On E-MU 0404b it is a Xilinx Spartan III XC3S50. in snd_emu1010_load_firmware_entry()
433 // GPO7 -> FPGA input & 1K resistor -> FPGA /PGMN <- FPGA output in snd_emu1010_load_firmware_entry()
437 // EMU_HANA_FPGA_CONFIG puts the FPGA output into high-Z mode, at in snd_emu1010_load_firmware_entry()
440 // GPO6 -> FPGA CCLK & FPGA input in snd_emu1010_load_firmware_entry()
441 // GPO5 -> FPGA DIN (dual function) in snd_emu1010_load_firmware_entry()
449 outw(0x00, emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
450 write_post = inw(emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
452 outw(0x80, emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
453 write_post = inw(emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
457 for (int n = 0; n < fw_entry->size; n++) { in snd_emu1010_load_firmware_entry()
458 u8 value = fw_entry->data[n]; in snd_emu1010_load_firmware_entry()
464 outw(reg, emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
465 write_post = inw(emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
466 outw(reg | 0x40, emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
467 write_post = inw(emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
474 outw(0x10, emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
475 write_post = inw(emu->port + A_GPIO); in snd_emu1010_load_firmware_entry()
483 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_intr_enable()
484 enable = inl(emu->port + INTE) | intrenb; in snd_emu10k1_intr_enable()
485 outl(enable, emu->port + INTE); in snd_emu10k1_intr_enable()
486 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_intr_enable()
494 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_intr_disable()
495 enable = inl(emu->port + INTE) & ~intrenb; in snd_emu10k1_intr_disable()
496 outl(enable, emu->port + INTE); in snd_emu10k1_intr_disable()
497 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_intr_disable()
505 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_enable()
507 outl(CLIEH << 16, emu->port + PTR); in snd_emu10k1_voice_intr_enable()
508 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_enable()
509 val |= 1 << (voicenum - 32); in snd_emu10k1_voice_intr_enable()
511 outl(CLIEL << 16, emu->port + PTR); in snd_emu10k1_voice_intr_enable()
512 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_enable()
515 outl(val, emu->port + DATA); in snd_emu10k1_voice_intr_enable()
516 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_enable()
524 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_disable()
526 outl(CLIEH << 16, emu->port + PTR); in snd_emu10k1_voice_intr_disable()
527 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_disable()
528 val &= ~(1 << (voicenum - 32)); in snd_emu10k1_voice_intr_disable()
530 outl(CLIEL << 16, emu->port + PTR); in snd_emu10k1_voice_intr_disable()
531 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_disable()
534 outl(val, emu->port + DATA); in snd_emu10k1_voice_intr_disable()
535 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_disable()
542 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_ack()
544 outl(CLIPH << 16, emu->port + PTR); in snd_emu10k1_voice_intr_ack()
545 voicenum = 1 << (voicenum - 32); in snd_emu10k1_voice_intr_ack()
547 outl(CLIPL << 16, emu->port + PTR); in snd_emu10k1_voice_intr_ack()
550 outl(voicenum, emu->port + DATA); in snd_emu10k1_voice_intr_ack()
551 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_intr_ack()
559 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_enable()
561 outl(HLIEH << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_enable()
562 val = inl(emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_enable()
563 val |= 1 << (voicenum - 32); in snd_emu10k1_voice_half_loop_intr_enable()
565 outl(HLIEL << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_enable()
566 val = inl(emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_enable()
569 outl(val, emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_enable()
570 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_enable()
578 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_disable()
580 outl(HLIEH << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_disable()
581 val = inl(emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_disable()
582 val &= ~(1 << (voicenum - 32)); in snd_emu10k1_voice_half_loop_intr_disable()
584 outl(HLIEL << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_disable()
585 val = inl(emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_disable()
588 outl(val, emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_disable()
589 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_disable()
596 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_ack()
598 outl(HLIPH << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_ack()
599 voicenum = 1 << (voicenum - 32); in snd_emu10k1_voice_half_loop_intr_ack()
601 outl(HLIPL << 16, emu->port + PTR); in snd_emu10k1_voice_half_loop_intr_ack()
604 outl(voicenum, emu->port + DATA); in snd_emu10k1_voice_half_loop_intr_ack()
605 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_half_loop_intr_ack()
614 spin_lock_irqsave(&emu->emu_lock, flags);
616 outl(SOLEH << 16, emu->port + PTR);
617 sol = inl(emu->port + DATA);
618 sol |= 1 << (voicenum - 32);
620 outl(SOLEL << 16, emu->port + PTR);
621 sol = inl(emu->port + DATA);
624 outl(sol, emu->port + DATA);
625 spin_unlock_irqrestore(&emu->emu_lock, flags);
633 spin_lock_irqsave(&emu->emu_lock, flags);
635 outl(SOLEH << 16, emu->port + PTR);
636 sol = inl(emu->port + DATA);
637 sol &= ~(1 << (voicenum - 32));
639 outl(SOLEL << 16, emu->port + PTR);
640 sol = inl(emu->port + DATA);
643 outl(sol, emu->port + DATA);
644 spin_unlock_irqrestore(&emu->emu_lock, flags);
652 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_set_loop_stop_multiple()
653 outl(SOLEL << 16, emu->port + PTR); in snd_emu10k1_voice_set_loop_stop_multiple()
654 outl(inl(emu->port + DATA) | (u32)voices, emu->port + DATA); in snd_emu10k1_voice_set_loop_stop_multiple()
655 outl(SOLEH << 16, emu->port + PTR); in snd_emu10k1_voice_set_loop_stop_multiple()
656 outl(inl(emu->port + DATA) | (u32)(voices >> 32), emu->port + DATA); in snd_emu10k1_voice_set_loop_stop_multiple()
657 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_set_loop_stop_multiple()
664 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple()
665 outl(SOLEL << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple()
666 outl(inl(emu->port + DATA) & (u32)~voices, emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple()
667 outl(SOLEH << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple()
668 outl(inl(emu->port + DATA) & (u32)(~voices >> 32), emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple()
669 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple()
676 int ret = -EIO; in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
678 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
680 outl(SOLEL << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
681 soll = inl(emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
682 outl(SOLEH << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
683 solh = inl(emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
689 const u32 quart = 1U << (REG_SIZE(WC_CURRENTCHANNEL) - 2); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
691 u32 wc = inl(emu->port + WC); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
695 outl(SOLEL << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
696 outl(soll, emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
699 cc = REG_VAL_GET(WC_CURRENTCHANNEL, inl(emu->port + WC)); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
709 outl(SOLEH << 16, emu->port + PTR); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
710 outl(solh, emu->port + DATA); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
712 if (REG_VAL_GET(WC_SAMPLECOUNTER, inl(emu->port + WC)) == in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
716 ret = -EAGAIN; in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
721 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
723 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
726 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_voice_clear_loop_stop_multiple_atomic()
735 curtime = inl(emu->port + WC) >> 6; in snd_emu10k1_wait()
736 while (wait-- > 0) { in snd_emu10k1_wait()
739 newtime = inl(emu->port + WC) >> 6; in snd_emu10k1_wait()
751 struct snd_emu10k1 *emu = ac97->private_data; in snd_emu10k1_ac97_read()
755 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ac97_read()
756 outb(reg, emu->port + AC97ADDRESS); in snd_emu10k1_ac97_read()
757 val = inw(emu->port + AC97DATA); in snd_emu10k1_ac97_read()
758 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ac97_read()
764 struct snd_emu10k1 *emu = ac97->private_data; in snd_emu10k1_ac97_write()
767 spin_lock_irqsave(&emu->emu_lock, flags); in snd_emu10k1_ac97_write()
768 outb(reg, emu->port + AC97ADDRESS); in snd_emu10k1_ac97_write()
769 outw(data, emu->port + AC97DATA); in snd_emu10k1_ac97_write()
770 spin_unlock_irqrestore(&emu->emu_lock, flags); in snd_emu10k1_ac97_write()