3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
21    MA  02111-1307, USA.
25  Translation from C++ and adaptation for use in ALSA-Driver
31 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
32 static int set_input_clock(struct echoaudio *chip, u16 clock);
33 static int set_professional_spdif(struct echoaudio *chip, char prof);
34 static int set_digital_mode(struct echoaudio *chip, u8 mode);
35 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
36 static int check_asic_status(struct echoaudio *chip);
39 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)  in init_hw()  argument
44 		return -ENODEV;  in init_hw()
46 	err = init_dsp_comm_page(chip);  in init_hw()
48 		dev_err(chip->card->dev,  in init_hw()
49 			"init_hw - could not initialize DSP comm page\n");  in init_hw()
53 	chip->device_id = device_id;  in init_hw()
54 	chip->subdevice_id = subdevice_id;  in init_hw()
55 	chip->bad_board = true;  in init_hw()
56 	chip->has_midi = true;  in init_hw()
57 	chip->dsp_code_to_load = FW_LAYLA24_DSP;  in init_hw()
58 	chip->input_clock_types =  in init_hw()
61 	chip->digital_modes =  in init_hw()
66 	err = load_firmware(chip);  in init_hw()
69 	chip->bad_board = false;  in init_hw()
71 	err = init_line_levels(chip);  in init_hw()
80 static int set_mixer_defaults(struct echoaudio *chip)  in set_mixer_defaults()  argument
82 	chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;  in set_mixer_defaults()
83 	chip->professional_spdif = false;  in set_mixer_defaults()
84 	chip->digital_in_automute = true;  in set_mixer_defaults()
85 	return init_line_levels(chip);  in set_mixer_defaults()
90 static u32 detect_input_clocks(const struct echoaudio *chip)  in detect_input_clocks()  argument
94 	/* Map the DSP clock detect bits to the generic driver clock detect bits */  in detect_input_clocks()
95 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in detect_input_clocks()
114 both need to be loaded. */
115 static int load_asic(struct echoaudio *chip)  in load_asic()  argument
119 	if (chip->asic_loaded)  in load_asic()
123 	/* Give the DSP a few milliseconds to settle down */  in load_asic()
127 	err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_PCI_CARD_ASIC,  in load_asic()
132 	chip->asic_code = FW_LAYLA24_2S_ASIC;  in load_asic()
134 	/* Now give the new ASIC a little time to set up */  in load_asic()
138 	err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC,  in load_asic()
143 	/* Now give the external ASIC a little time to set up */  in load_asic()
147 	err = check_asic_status(chip);  in load_asic()
149 	/* Set up the control register if the load succeeded -  in load_asic()
152 		err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ,  in load_asic()
160 static int set_sample_rate(struct echoaudio *chip, u32 rate)  in set_sample_rate()  argument
165 		       chip->digital_mode == DIGITAL_MODE_ADAT))  in set_sample_rate()
166 		return -EINVAL;  in set_sample_rate()
169 	if (chip->input_clock != ECHO_CLOCK_INTERNAL) {  in set_sample_rate()
170 		dev_warn(chip->card->dev,  in set_sample_rate()
171 			 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");  in set_sample_rate()
173 		chip->comm_page->sample_rate = cpu_to_le32(rate);  in set_sample_rate()
174 		chip->sample_rate = rate;  in set_sample_rate()
179 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in set_sample_rate()
217 		/* If this is a non-standard rate, then the driver needs to  in set_sample_rate()
230 		if (wait_handshake(chip))  in set_sample_rate()
231 			return -EIO;  in set_sample_rate()
233 		chip->comm_page->sample_rate =  in set_sample_rate()
234 			cpu_to_le32(LAYLA24_MAGIC_NUMBER / base_rate - 2);  in set_sample_rate()
236 		clear_handshake(chip);  in set_sample_rate()
237 		send_vector(chip, DSP_VC_SET_LAYLA24_FREQUENCY_REG);  in set_sample_rate()
242 	chip->comm_page->sample_rate = cpu_to_le32(rate);	/* ignored by the DSP ? */  in set_sample_rate()
243 	chip->sample_rate = rate;  in set_sample_rate()
244 	dev_dbg(chip->card->dev,  in set_sample_rate()
247 	return write_control_reg(chip, control_reg, false);  in set_sample_rate()
252 static int set_input_clock(struct echoaudio *chip, u16 clock)  in set_input_clock()  argument
257 	control_reg = le32_to_cpu(chip->comm_page->control_register) &  in set_input_clock()
259 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in set_input_clock()
264 		chip->input_clock = ECHO_CLOCK_INTERNAL;  in set_input_clock()
265 		return set_sample_rate(chip, chip->sample_rate);  in set_input_clock()
267 		if (chip->digital_mode == DIGITAL_MODE_ADAT)  in set_input_clock()
268 			return -EAGAIN;  in set_input_clock()
281 		if (chip->digital_mode != DIGITAL_MODE_ADAT)  in set_input_clock()
282 			return -EAGAIN;  in set_input_clock()
287 		dev_err(chip->card->dev,  in set_input_clock()
289 		return -EINVAL;  in set_input_clock()
292 	chip->input_clock = clock;  in set_input_clock()
293 	return write_control_reg(chip, control_reg, true);  in set_input_clock()
301 static int switch_asic(struct echoaudio *chip, short asic)  in switch_asic()  argument
305 	/*  Check to see if this is already loaded */  in switch_asic()
306 	if (asic != chip->asic_code) {  in switch_asic()
307 		monitors = kmemdup(chip->comm_page->monitors,  in switch_asic()
310 			return -ENOMEM;  in switch_asic()
312 		memset(chip->comm_page->monitors, ECHOGAIN_MUTED,  in switch_asic()
316 		if (load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC,  in switch_asic()
318 			memcpy(chip->comm_page->monitors, monitors,  in switch_asic()
321 			return -EIO;  in switch_asic()
323 		chip->asic_code = asic;  in switch_asic()
324 		memcpy(chip->comm_page->monitors, monitors, MONITOR_ARRAY_SIZE);  in switch_asic()
333 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)  in dsp_set_digital_mode()  argument
339 	/* Set clock to "internal" if it's not compatible with the new mode */  in dsp_set_digital_mode()
344 		if (chip->input_clock == ECHO_CLOCK_ADAT)  in dsp_set_digital_mode()
349 		if (chip->input_clock == ECHO_CLOCK_SPDIF)  in dsp_set_digital_mode()
354 		dev_err(chip->card->dev,  in dsp_set_digital_mode()
356 		return -EINVAL;  in dsp_set_digital_mode()
359 	if (incompatible_clock) {	/* Switch to 48KHz, internal */  in dsp_set_digital_mode()
360 		chip->sample_rate = 48000;  in dsp_set_digital_mode()
361 		spin_lock_irq(&chip->lock);  in dsp_set_digital_mode()
362 		set_input_clock(chip, ECHO_CLOCK_INTERNAL);  in dsp_set_digital_mode()
363 		spin_unlock_irq(&chip->lock);  in dsp_set_digital_mode()
367 	if (switch_asic(chip, asic) < 0)  in dsp_set_digital_mode()
368 		return -EIO;  in dsp_set_digital_mode()
370 	spin_lock_irq(&chip->lock);  in dsp_set_digital_mode()
373 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in dsp_set_digital_mode()
389 	err = write_control_reg(chip, control_reg, true);  in dsp_set_digital_mode()
390 	spin_unlock_irq(&chip->lock);  in dsp_set_digital_mode()
393 	chip->digital_mode = mode;  in dsp_set_digital_mode()
395 	dev_dbg(chip->card->dev, "set_digital_mode to %d\n", mode);  in dsp_set_digital_mode()