Lines Matching +full:timer +full:- +full:dsp
3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
42 +-------+
45 audio transport - moving audio data to and from buffers on the host via
53 For most cards, there is a one-to-one correspondence between outputs
54 and busses; that is, each individual pipe is hard-wired to a single bus.
63 +-----------+
64 record | |<----------------------------- Inputs
65 <-------| | |
68 ------->| | +------+ +-------+
69 play | |-->|vmixer|-->|monitor|-------> Outputs
70 +-----------+ +------+ | mixer |
71 +-------+
75 short for "virtual output mixer." For Mia, pipes are *not* hard-wired
79 Note, however, that the left-hand side of the diagram is unchanged.
80 Transport works exactly the same way - the difference is in the mixer stage.
99 0-7 Analog outputs (0 .. FirstDigitalBusOut-1)
100 8-15 Digital outputs (FirstDigitalBusOut .. NumBussesOut-1)
101 16-17 Analog inputs
102 18-25 Digital inputs
125 either S/PDIF mode, the last 6 channels don't do anything - data sent
143 actually support two different word clock modes - single speed (below
241 * Clock bit numbers - used to report capabilities and whatever clocks
283 #define ECHOGAIN_MUTED (-128) /* Minimum possible gain */
284 #define ECHOGAIN_MINOUT (-128) /* Min output gain (dB) */
286 #define ECHOGAIN_MININP (-50) /* Min input gain (0.5 dB) */
317 struct snd_dma_buffer sgpage; /* Room for the scatter-gather list */
357 struct timer_list timer; member
358 char tinuse; /* Timer in use */
365 * seen by DSP
375 u8 spdif_status; /* Gina20, Darla20, Darla24 - only */
376 u8 clock_state; /* Gina20, Darla20, Darla24 - only */
381 char meters_enabled; /* VU-meters status */
383 char bad_board; /* Set true if DSP won't load */
385 char non_audio_spdif; /* 3G - only */
386 char digital_in_automute; /* Gina24, Layla24, Mona - only */
389 char phantom_power; /* Gina3G - only */
394 /* External module -dependent pipe and bus indexes */
399 char nominal_level[ECHO_MAXAUDIOPIPES]; /* True == -10dBV
401 s8 input_gain[ECHO_MAXAUDIOINPUTS]; /* Input level -50..+50
403 s8 output_gain[ECHO_MAXAUDIOOUTPUTS]; /* Output level -128..+6 dB
404 * (-128=muted) */
406 /* -128..+6 dB */
408 /* -128..+6 dB */
413 u16 output_clock_types; /* Suppoted output clock types -
416 u16 *dsp_code; /* Current DSP code loaded,
418 short dsp_code_to_load; /* DSP code to load */
421 * memory seen by DSP */
422 u32 __iomem *dsp_registers; /* DSP's register base */
457 chip->comm_page->handshake = 0; in clear_handshake()
462 return readl(&chip->dsp_registers[index]); in get_dsp_register()
468 writel(value, &chip->dsp_registers[index]); in set_dsp_register()
472 /* Pipe and bus indexes. PX_* and BX_* are defined as chip->px_* and chip->bx_*
524 return px_num(chip) - px_analog_in(chip); in num_pipes_in()
534 return bx_num(chip) - bx_analog_in(chip); in num_busses_in()
544 return bx_digital_in(chip) - bx_analog_in(chip); in num_analog_busses_in()
549 return num_busses_out(chip) - num_analog_busses_out(chip); in num_digital_busses_out()
554 return num_busses_in(chip) - num_analog_busses_in(chip); in num_digital_busses_in()
557 /* The monitor array is a one-dimensional array; compute the offset