Lines Matching +full:adc +full:- +full:use +full:- +full:res
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Abramo Bagnara <abramo@alsa-project.org>
9 * - Sometimes the SPDIF input DSP tasks get's unsynchronized
13 * - On the Hercules Game Theater XP the amplifier are sometimes turned
17 * - Secondary CODEC on some soundcards
18 * - SPDIF input support for other sample rates then 48khz
19 * - Posibility to mix the SPDIF output with analog sources.
20 * - PCM channels for Center and LFE on secondary codec
86 chip->active_ctrl(chip, 1);
94 * 3. Write ACCTL = Control Register = 460h for initiating the write7---55
104 dev_warn(chip->card->dev, "ACCTL_VFRM not set 0x%x\n", tmp);
118 * set DCV - will clear when process completed
119 * set CRW - Read command
120 * set VFRM - valid frame enabled
121 * set ESYN - ASYNC generation enabled
122 * set RSTN - ARST# inactive, AC97 codec not reset
156 dev_err(chip->card->dev,
169 * VSTS - Valid Status
176 dev_err(chip->card->dev,
188 dev_dbg(chip->card->dev,
197 chip->active_ctrl(chip, -1);
204 struct snd_cs46xx *chip = ac97->private_data;
206 int codec_index = ac97->num;
229 chip->active_ctrl(chip, 1);
245 * set DCV - will clear when process completed
246 * reset CRW - Write command
247 * set VFRM - valid frame enabled
248 * set ESYN - ASYNC generation enabled
249 * set RSTN - ARST# inactive, AC97 codec not reset
278 dev_err(chip->card->dev,
282 chip->active_ctrl(chip, -1);
289 struct snd_cs46xx *chip = ac97->private_data;
290 int codec_index = ac97->num;
314 return -EINVAL;
315 dst = chip->region.idx[bank+1].remap_addr + offset;
318 /* writel already converts 32-bit value to right endianess */
319 while (len-- > 0) {
334 while (len-- > 0)
355 kfree(module->module_name);
356 kfree(module->symbol_table.symbols);
357 if (module->segments) {
359 for (i = 0; i < module->nsegments; i++)
360 kfree(module->segments[i].data);
361 kfree(module->segments);
394 err = request_firmware(&fw, fw_path, &chip->pci->dev);
397 fwsize = fw->size / 4;
399 err = -EINVAL;
403 err = -ENOMEM;
407 module->module_name = kstrdup(fw_name, GFP_KERNEL);
408 if (!module->module_name)
412 fwdat = (const __le32 *)fw->data;
413 nums = module->symbol_table.nsymbols = le32_to_cpu(fwdat[fwlen++]);
416 module->symbol_table.symbols =
418 if (!module->symbol_table.symbols)
422 &module->symbol_table.symbols[i];
425 entry->address = le32_to_cpu(fwdat[fwlen++]);
426 memcpy(entry->symbol_name, &fwdat[fwlen], DSP_MAX_SYMBOL_NAME - 1);
428 entry->symbol_type = le32_to_cpu(fwdat[fwlen++]);
433 nums = module->nsegments = le32_to_cpu(fwdat[fwlen++]);
436 module->segments =
438 if (!module->segments)
441 struct dsp_segment_desc *entry = &module->segments[i];
444 entry->segment_type = le32_to_cpu(fwdat[fwlen++]);
445 entry->offset = le32_to_cpu(fwdat[fwlen++]);
446 entry->size = le32_to_cpu(fwdat[fwlen++]);
447 if (fwlen + entry->size > fwsize)
449 entry->data = kmalloc_array(entry->size, 4, GFP_KERNEL);
450 if (!entry->data)
452 memcpy_le32(entry->data, &fwdat[fwlen], entry->size * 4);
453 fwlen += entry->size;
461 err = -EINVAL;
477 return -EINVAL;
478 dst = chip->region.idx[bank+1].remap_addr + offset;
481 /* writel already converts 32-bit value to right endianess */
482 while (len-- > 0) {
506 err = request_firmware(&fw, "cs46xx/ba1", &chip->pci->dev);
509 if (fw->size != sizeof(*chip->ba1)) {
510 err = -EINVAL;
514 chip->ba1 = vmalloc(sizeof(*chip->ba1));
515 if (!chip->ba1) {
516 err = -ENOMEM;
520 memcpy_le32(chip->ba1, fw->data, sizeof(*chip->ba1));
525 size += chip->ba1->memory[i].size;
527 err = -EINVAL;
538 struct ba1_struct *ba1 = chip->ba1;
542 &ba1->map[offset],
543 ba1->memory[idx].offset,
544 ba1->memory[idx].size);
547 offset += ba1->memory[idx].size >> 2;
602 dev_err(chip->card->dev,
604 return -EINVAL;
640 dev_dbg(chip->card->dev,
690 dev_err(chip->card->dev, "SPCR_RUNFR never reset\n");
717 * since we need to use 64 bit arithmetic to compute the values:
720 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
722 * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M
733 tmp1 -= phiIncr * 48000;
738 tmp1 -= tmp2 * 48000;
740 tmp1 -= correctionPerGOF * GOF_PER_SEC;
746 guard(spinlock_irqsave)(&chip->reg_lock);
775 * since we need to use 64 bit arithmetic to compute the values:
777 * coeffIncr = -floor((Fs,out * 2^23) / Fs,in)
779 * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /
781 * correctionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -
791 * initialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out)
796 tmp1 -= coeffIncr * 48000;
804 tmp1 -= phiIncr * rate;
809 tmp1 -= tmp2 * rate;
811 tmp1 -= correctionPerGOF * GOF_PER_SEC;
818 scoped_guard(spinlock_irqsave, &chip->reg_lock) {
848 guard(spinlock_irqsave)(&chip->reg_lock);
863 struct snd_pcm_runtime *runtime = substream->runtime;
864 struct snd_cs46xx_pcm * cpcm = runtime->private_data;
865 memcpy(cpcm->hw_buf.area + rec->hw_data, runtime->dma_area + rec->sw_data, bytes);
870 struct snd_pcm_runtime *runtime = substream->runtime;
871 struct snd_cs46xx_pcm * cpcm = runtime->private_data;
872 return snd_pcm_indirect_playback_transfer(substream, &cpcm->pcm_rec,
880 struct snd_pcm_runtime *runtime = substream->runtime;
881 memcpy(runtime->dma_area + rec->sw_data,
882 chip->capt.hw_buf.area + rec->hw_data, bytes);
888 return snd_pcm_indirect_capture_transfer(substream, &chip->capt.pcm_rec,
896 struct snd_cs46xx_pcm *cpcm = substream->runtime->private_data;
898 if (snd_BUG_ON(!cpcm->pcm_channel))
899 return -ENXIO;
902 ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2);
906 ptr -= cpcm->hw_buf.addr;
907 return ptr >> cpcm->shift;
914 struct snd_cs46xx_pcm *cpcm = substream->runtime->private_data;
917 if (snd_BUG_ON(!cpcm->pcm_channel))
918 return -ENXIO;
919 ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2);
923 ptr -= cpcm->hw_buf.addr;
924 return snd_pcm_indirect_playback_pointer(substream, &cpcm->pcm_rec, ptr);
930 size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr;
931 return ptr >> chip->capt.shift;
937 size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr;
938 return snd_pcm_indirect_capture_pointer(substream, &chip->capt.pcm_rec, ptr);
945 /*struct snd_pcm_runtime *runtime = substream->runtime;*/
949 struct snd_cs46xx_pcm *cpcm = substream->runtime->private_data;
950 if (! cpcm->pcm_channel) {
951 return -ENXIO;
959 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address +
962 if (cpcm->pcm_channel->unlinked)
963 cs46xx_dsp_pcm_link(chip,cpcm->pcm_channel);
965 if (substream->runtime->periods != CS46XX_FRAGS)
968 scoped_guard(spinlock, &chip->reg_lock) {
970 if (substream->runtime->periods != CS46XX_FRAGS)
974 snd_cs46xx_poke(chip, BA1_PCTL, chip->play_ctl | tmp);
982 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address +
985 if (!cpcm->pcm_channel->unlinked)
986 cs46xx_dsp_pcm_unlink(chip,cpcm->pcm_channel);
988 scoped_guard(spinlock, &chip->reg_lock) {
997 result = -EINVAL;
1010 guard(spinlock)(&chip->reg_lock);
1016 snd_cs46xx_poke(chip, BA1_CCTL, chip->capt.ctl | tmp);
1025 return -EINVAL;
1036 if ( cpcm->pcm_channel == NULL) {
1037 cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel (chip, sample_rate,
1038 cpcm, cpcm->hw_buf.addr,cpcm->pcm_channel_id);
1039 if (cpcm->pcm_channel == NULL) {
1040 dev_err(chip->card->dev,
1042 return -ENOMEM;
1044 cpcm->pcm_channel->sample_rate = sample_rate;
1047 if ((int)cpcm->pcm_channel->sample_rate != sample_rate) {
1048 int unlinked = cpcm->pcm_channel->unlinked;
1049 cs46xx_dsp_destroy_pcm_channel (chip,cpcm->pcm_channel);
1051 cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel(chip, sample_rate, cpcm,
1052 cpcm->hw_buf.addr,
1053 cpcm->pcm_channel_id);
1054 if (!cpcm->pcm_channel) {
1055 dev_err(chip->card->dev,
1056 "failed to re-create virtual PCM channel\n");
1057 return -ENOMEM;
1060 if (!unlinked) cs46xx_dsp_pcm_link (chip,cpcm->pcm_channel);
1061 cpcm->pcm_channel->sample_rate = sample_rate;
1072 struct snd_pcm_runtime *runtime = substream->runtime;
1080 cpcm = runtime->private_data;
1084 return -ENXIO;
1086 guard(mutex)(&chip->spos_mutex);
1089 return -ENXIO;
1091 snd_BUG_ON(!cpcm->pcm_channel);
1092 if (!cpcm->pcm_channel)
1093 return -ENXIO;
1095 if (cs46xx_dsp_pcm_channel_set_period(chip, cpcm->pcm_channel, period_size))
1096 return -EINVAL;
1098 dev_dbg(chip->card->dev,
1105 if (runtime->dma_area != cpcm->hw_buf.area)
1107 snd_pcm_set_runtime_buffer(substream, &cpcm->hw_buf);
1111 if (cpcm->pcm_channel_id == DSP_PCM_MAIN_CHANNEL) {
1112 substream->ops = &snd_cs46xx_playback_ops;
1113 } else if (cpcm->pcm_channel_id == DSP_PCM_REAR_CHANNEL) {
1114 substream->ops = &snd_cs46xx_playback_rear_ops;
1115 } else if (cpcm->pcm_channel_id == DSP_PCM_CENTER_LFE_CHANNEL) {
1116 substream->ops = &snd_cs46xx_playback_clfe_ops;
1117 } else if (cpcm->pcm_channel_id == DSP_IEC958_CHANNEL) {
1118 substream->ops = &snd_cs46xx_playback_iec958_ops;
1123 substream->ops = &snd_cs46xx_playback_ops;
1127 if (runtime->dma_area == cpcm->hw_buf.area)
1134 if (cpcm->pcm_channel_id == DSP_PCM_MAIN_CHANNEL) {
1135 substream->ops = &snd_cs46xx_playback_indirect_ops;
1136 } else if (cpcm->pcm_channel_id == DSP_PCM_REAR_CHANNEL) {
1137 substream->ops = &snd_cs46xx_playback_indirect_rear_ops;
1138 } else if (cpcm->pcm_channel_id == DSP_PCM_CENTER_LFE_CHANNEL) {
1139 substream->ops = &snd_cs46xx_playback_indirect_clfe_ops;
1140 } else if (cpcm->pcm_channel_id == DSP_IEC958_CHANNEL) {
1141 substream->ops = &snd_cs46xx_playback_indirect_iec958_ops;
1146 substream->ops = &snd_cs46xx_playback_indirect_ops;
1157 struct snd_pcm_runtime *runtime = substream->runtime;
1160 cpcm = runtime->private_data;
1164 if (!cpcm) return -ENXIO;
1166 if (runtime->dma_area != cpcm->hw_buf.area)
1179 struct snd_pcm_runtime *runtime = substream->runtime;
1182 cpcm = runtime->private_data;
1185 if (snd_BUG_ON(!cpcm->pcm_channel))
1186 return -ENXIO;
1188 pfie = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2 );
1196 cpcm->shift = 2;
1198 if (runtime->channels == 1) {
1199 cpcm->shift--;
1203 if (snd_pcm_format_width(runtime->format) == 8) {
1204 cpcm->shift--;
1208 if (snd_pcm_format_unsigned(runtime->format))
1212 if (snd_pcm_format_width(runtime->format) != 8) {
1214 if (snd_pcm_format_big_endian(runtime->format))
1218 memset(&cpcm->pcm_rec, 0, sizeof(cpcm->pcm_rec));
1219 cpcm->pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1220 cpcm->pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << cpcm->shift;
1224 tmp = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2);
1226 tmp |= (4 << cpcm->shift) - 1;
1228 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2, tmp);
1231 snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2, pfie | cpcm->pcm_channel->pcm_slot);
1233 snd_cs46xx_poke(chip, BA1_PBA, cpcm->hw_buf.addr);
1236 tmp |= (4 << cpcm->shift) - 1;
1239 snd_cs46xx_set_play_sample_rate(chip, runtime->rate);
1249 struct snd_pcm_runtime *runtime = substream->runtime;
1255 if (runtime->periods == CS46XX_FRAGS) {
1256 if (runtime->dma_area != chip->capt.hw_buf.area)
1258 snd_pcm_set_runtime_buffer(substream, &chip->capt.hw_buf);
1259 substream->ops = &snd_cs46xx_capture_ops;
1261 if (runtime->dma_area == chip->capt.hw_buf.area)
1266 substream->ops = &snd_cs46xx_capture_indirect_ops;
1275 struct snd_pcm_runtime *runtime = substream->runtime;
1277 if (runtime->dma_area != chip->capt.hw_buf.area)
1287 struct snd_pcm_runtime *runtime = substream->runtime;
1289 snd_cs46xx_poke(chip, BA1_CBA, chip->capt.hw_buf.addr);
1290 chip->capt.shift = 2;
1291 memset(&chip->capt.pcm_rec, 0, sizeof(chip->capt.pcm_rec));
1292 chip->capt.pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1293 chip->capt.pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << 2;
1294 snd_cs46xx_set_capture_sample_rate(chip, runtime->rate);
1304 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1326 if (chip->capt.substream)
1327 snd_pcm_period_elapsed(chip->capt.substream);
1329 if (ins->pcm_channels[i].active &&
1330 ins->pcm_channels[i].private_data &&
1331 !ins->pcm_channels[i].unlinked) {
1332 cpcm = ins->pcm_channels[i].private_data;
1333 snd_pcm_period_elapsed(cpcm->substream);
1338 if ( status2 & (1 << (i - 16))) {
1339 if (ins->pcm_channels[i].active &&
1340 ins->pcm_channels[i].private_data &&
1341 !ins->pcm_channels[i].unlinked) {
1342 cpcm = ins->pcm_channels[i].private_data;
1343 snd_pcm_period_elapsed(cpcm->substream);
1351 if ((status1 & HISR_VC0) && chip->playback_pcm) {
1352 if (chip->playback_pcm->substream)
1353 snd_pcm_period_elapsed(chip->playback_pcm->substream);
1355 if ((status1 & HISR_VC1) && chip->pcm) {
1356 if (chip->capt.substream)
1357 snd_pcm_period_elapsed(chip->capt.substream);
1361 if ((status1 & HISR_MIDI) && chip->rmidi) {
1364 guard(spinlock)(&chip->reg_lock);
1367 if ((chip->midcr & MIDCR_RIE) == 0)
1369 snd_rawmidi_receive(chip->midi_input, &c, 1);
1372 if ((chip->midcr & MIDCR_TIE) == 0)
1374 if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) {
1375 chip->midcr &= ~MIDCR_TIE;
1376 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
1448 kfree(runtime->private_data);
1455 struct snd_pcm_runtime *runtime = substream->runtime;
1459 return -ENOMEM;
1460 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1461 PAGE_SIZE, &cpcm->hw_buf) < 0) {
1463 return -ENOMEM;
1466 runtime->hw = snd_cs46xx_playback;
1467 runtime->private_data = cpcm;
1468 runtime->private_free = snd_cs46xx_pcm_free_substream;
1470 cpcm->substream = substream;
1472 scoped_guard(mutex, &chip->spos_mutex) {
1473 cpcm->pcm_channel = NULL;
1474 cpcm->pcm_channel_id = pcm_channel_id;
1481 chip->playback_pcm = cpcm; /* HACK */
1484 if (chip->accept_valid)
1485 substream->runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID;
1486 chip->active_ctrl(chip, 1);
1493 dev_dbg(substream->pcm->card->dev, "open front channel\n");
1500 dev_dbg(substream->pcm->card->dev, "open rear channel\n");
1506 dev_dbg(substream->pcm->card->dev, "open center - LFE channel\n");
1514 dev_dbg(chip->card->dev, "open raw iec958 channel\n");
1516 scoped_guard(mutex, &chip->spos_mutex) {
1530 dev_dbg(chip->card->dev, "close raw iec958 channel\n");
1534 scoped_guard(mutex, &chip->spos_mutex) {
1546 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
1547 PAGE_SIZE, &chip->capt.hw_buf) < 0)
1548 return -ENOMEM;
1549 chip->capt.substream = substream;
1550 substream->runtime->hw = snd_cs46xx_capture;
1552 if (chip->accept_valid)
1553 substream->runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID;
1555 chip->active_ctrl(chip, 1);
1558 snd_pcm_hw_constraint_list(substream->runtime, 0,
1568 struct snd_pcm_runtime *runtime = substream->runtime;
1571 cpcm = runtime->private_data;
1574 if (!cpcm) return -ENXIO;
1577 scoped_guard(mutex, &chip->spos_mutex) {
1578 if (cpcm->pcm_channel) {
1579 cs46xx_dsp_destroy_pcm_channel(chip, cpcm->pcm_channel);
1580 cpcm->pcm_channel = NULL;
1584 chip->playback_pcm = NULL;
1587 cpcm->substream = NULL;
1588 snd_dma_free_pages(&cpcm->hw_buf);
1589 chip->active_ctrl(chip, -1);
1598 chip->capt.substream = NULL;
1599 snd_dma_free_pages(&chip->capt.hw_buf);
1600 chip->active_ctrl(chip, -1);
1714 #define MAX_PLAYBACK_CHANNELS (DSP_MAX_PCM_CHANNELS - 1)
1724 err = snd_pcm_new(chip->card, "CS46xx", device, MAX_PLAYBACK_CHANNELS, 1, &pcm);
1728 pcm->private_data = chip;
1734 pcm->info_flags = 0;
1735 strscpy(pcm->name, "CS46xx");
1736 chip->pcm = pcm;
1739 &chip->pci->dev,
1752 err = snd_pcm_new(chip->card, "CS46xx - Rear", device, MAX_PLAYBACK_CHANNELS, 0, &pcm);
1756 pcm->private_data = chip;
1761 pcm->info_flags = 0;
1762 strscpy(pcm->name, "CS46xx - Rear");
1763 chip->pcm_rear = pcm;
1766 &chip->pci->dev,
1777 err = snd_pcm_new(chip->card, "CS46xx - Center LFE", device, MAX_PLAYBACK_CHANNELS, 0, &pcm);
1781 pcm->private_data = chip;
1786 pcm->info_flags = 0;
1787 strscpy(pcm->name, "CS46xx - Center LFE");
1788 chip->pcm_center_lfe = pcm;
1791 &chip->pci->dev,
1802 err = snd_pcm_new(chip->card, "CS46xx - IEC958", device, 1, 0, &pcm);
1806 pcm->private_data = chip;
1811 pcm->info_flags = 0;
1812 strscpy(pcm->name, "CS46xx - IEC958");
1813 chip->pcm_iec958 = pcm;
1816 &chip->pci->dev,
1828 struct snd_cs46xx *chip = ac97->private_data;
1830 if (snd_BUG_ON(ac97 != chip->ac97[CS46XX_PRIMARY_CODEC_INDEX] &&
1831 ac97 != chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]))
1834 if (ac97 == chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]) {
1835 chip->ac97[CS46XX_PRIMARY_CODEC_INDEX] = NULL;
1836 chip->eapd_switch = NULL;
1839 chip->ac97[CS46XX_SECONDARY_CODEC_INDEX] = NULL;
1845 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1846 uinfo->count = 2;
1847 uinfo->value.integer.min = 0;
1848 uinfo->value.integer.max = 0x7fff;
1855 int reg = kcontrol->private_value;
1857 ucontrol->value.integer.value[0] = 0xffff - (val >> 16);
1858 ucontrol->value.integer.value[1] = 0xffff - (val & 0xffff);
1865 int reg = kcontrol->private_value;
1866 unsigned int val = ((0xffff - ucontrol->value.integer.value[0]) << 16 |
1867 (0xffff - ucontrol->value.integer.value[1]));
1884 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->dac_volume_left;
1885 ucontrol->value.integer.value[1] = chip->dsp_spos_instance->dac_volume_right;
1895 if (chip->dsp_spos_instance->dac_volume_right != ucontrol->value.integer.value[0] ||
1896 chip->dsp_spos_instance->dac_volume_left != ucontrol->value.integer.value[1]) {
1898 ucontrol->value.integer.value[0],
1899 ucontrol->value.integer.value[1]);
1911 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_input_volume_left;
1912 ucontrol->value.integer.value[1] = chip->dsp_spos_instance->spdif_input_volume_right;
1921 if (chip->dsp_spos_instance->spdif_input_volume_left != ucontrol->value.integer.value[0] ||
1922 chip->dsp_spos_instance->spdif_input_volume_right!= ucontrol->value.integer.value[1]) {
1924 ucontrol->value.integer.value[0],
1925 ucontrol->value.integer.value[1]);
1939 int reg = kcontrol->private_value;
1942 ucontrol->value.integer.value[0] = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED);
1944 ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_status_in;
1953 int change, res;
1955 switch (kcontrol->private_value) {
1957 scoped_guard(mutex, &chip->spos_mutex) {
1958 change = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED);
1959 if (ucontrol->value.integer.value[0] && !change)
1961 else if (change && !ucontrol->value.integer.value[0])
1964 res = (change != (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED));
1968 change = chip->dsp_spos_instance->spdif_status_in;
1969 if (ucontrol->value.integer.value[0] && !change) {
1973 else if (change && !ucontrol->value.integer.value[0])
1976 res = (change != chip->dsp_spos_instance->spdif_status_in);
1979 res = -EINVAL;
1983 return res;
1990 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1992 if (ins->adc_input != NULL)
1993 ucontrol->value.integer.value[0] = 1;
1995 ucontrol->value.integer.value[0] = 0;
2004 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2007 if (ucontrol->value.integer.value[0] && !ins->adc_input) {
2010 } else if (!ucontrol->value.integer.value[0] && ins->adc_input) {
2021 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2023 if (ins->pcm_input != NULL)
2024 ucontrol->value.integer.value[0] = 1;
2026 ucontrol->value.integer.value[0] = 0;
2036 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2039 if (ucontrol->value.integer.value[0] && !ins->pcm_input) {
2042 } else if (!ucontrol->value.integer.value[0] && ins->pcm_input) {
2058 ucontrol->value.integer.value[0] = 1;
2060 ucontrol->value.integer.value[0] = 0;
2066 * Game Theatre XP card - EGPIO[0] is used to select SPDIF input optical or coaxial.
2075 if (ucontrol->value.integer.value[0]) {
2080 EGPIOPTR_GPPT0 | val2); /* open-drain on output */
2095 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
2096 uinfo->count = 1;
2104 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2106 guard(mutex)(&chip->spos_mutex);
2107 ucontrol->value.iec958.status[0] = _wrap_all_bits((ins->spdif_csuv_default >> 24) & 0xff);
2108 ucontrol->value.iec958.status[1] = _wrap_all_bits((ins->spdif_csuv_default >> 16) & 0xff);
2109 ucontrol->value.iec958.status[2] = 0;
2110 ucontrol->value.iec958.status[3] = _wrap_all_bits((ins->spdif_csuv_default) & 0xff);
2119 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2123 guard(mutex)(&chip->spos_mutex);
2124 val = ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[0]) << 24) |
2125 ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[2]) << 16) |
2126 ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[3])) |
2131 change = (unsigned int)ins->spdif_csuv_default != val;
2132 ins->spdif_csuv_default = val;
2134 if ( !(ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) )
2143 ucontrol->value.iec958.status[0] = 0xff;
2144 ucontrol->value.iec958.status[1] = 0xff;
2145 ucontrol->value.iec958.status[2] = 0x00;
2146 ucontrol->value.iec958.status[3] = 0xff;
2154 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2156 guard(mutex)(&chip->spos_mutex);
2157 ucontrol->value.iec958.status[0] = _wrap_all_bits((ins->spdif_csuv_stream >> 24) & 0xff);
2158 ucontrol->value.iec958.status[1] = _wrap_all_bits((ins->spdif_csuv_stream >> 16) & 0xff);
2159 ucontrol->value.iec958.status[2] = 0;
2160 ucontrol->value.iec958.status[3] = _wrap_all_bits((ins->spdif_csuv_stream) & 0xff);
2169 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
2173 guard(mutex)(&chip->spos_mutex);
2174 val = ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[0]) << 24) |
2175 ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[1]) << 16) |
2176 ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[3])) |
2181 change = ins->spdif_csuv_stream != val;
2182 ins->spdif_csuv_stream = val;
2184 if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN )
2210 .name = "ADC Volume",
2223 .name = "ADC Capture Switch",
2294 val = snd_ac97_read(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], AC97_CSR_ACMODE);
2295 ucontrol->value.integer.value[0] = (val & 0x200) ? 0 : 1;
2303 return snd_ac97_update_bits(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX],
2305 ucontrol->value.integer.value[0] ? 0 : 0x200);
2339 if (ac97->num == CS46XX_PRIMARY_CODEC_INDEX) {
2340 dev_dbg(ac97->bus->card->dev, "CODEC1 mode %04x\n", 0x0);
2342 } else if (ac97->num == CS46XX_SECONDARY_CODEC_INDEX) {
2343 dev_dbg(ac97->bus->card->dev, "CODEC2 mode %04x\n", 0x3);
2358 /* use preliminary reads to settle the communication */
2376 dev_err(ac97->bus->card->dev,
2390 if (chip->amplifier_ctrl == amp_voyetra)
2397 dev_dbg(chip->card->dev,
2399 return -ENXIO;
2406 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]);
2411 dev_dbg(chip->card->dev, "codec %d detection timeout\n", codec);
2412 return -ENXIO;
2417 struct snd_card *card = chip->card;
2429 chip->nr_ac97_codecs = 0;
2430 dev_dbg(chip->card->dev, "detecting primary codec\n");
2431 err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
2436 return -ENXIO;
2437 chip->nr_ac97_codecs = 1;
2440 dev_dbg(chip->card->dev, "detecting secondary codec\n");
2443 chip->nr_ac97_codecs = 2;
2450 if (kctl && kctl->id.iface == SNDRV_CTL_ELEM_IFACE_PCM)
2451 kctl->id.device = spdif_device;
2458 chip->eapd_switch = snd_ctl_find_id_mixer(chip->card,
2462 if (chip->nr_ac97_codecs == 1) {
2463 unsigned int id2 = chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]->id & 0xffff;
2468 snd_ac97_write_cache(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX],
2473 if (chip->mixer_init) {
2474 dev_dbg(chip->card->dev, "calling chip->mixer_init(chip);\n");
2475 chip->mixer_init(chip);
2480 chip->amplifier_ctrl(chip, 1);
2493 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2498 struct snd_cs46xx *chip = substream->rmidi->private_data;
2500 chip->active_ctrl(chip, 1);
2501 guard(spinlock_irq)(&chip->reg_lock);
2502 chip->uartm |= CS46XX_MODE_INPUT;
2503 chip->midcr |= MIDCR_RXE;
2504 chip->midi_input = substream;
2505 if (!(chip->uartm & CS46XX_MODE_OUTPUT)) {
2508 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2515 struct snd_cs46xx *chip = substream->rmidi->private_data;
2517 scoped_guard(spinlock_irq, &chip->reg_lock) {
2518 chip->midcr &= ~(MIDCR_RXE | MIDCR_RIE);
2519 chip->midi_input = NULL;
2520 if (!(chip->uartm & CS46XX_MODE_OUTPUT)) {
2523 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2525 chip->uartm &= ~CS46XX_MODE_INPUT;
2527 chip->active_ctrl(chip, -1);
2533 struct snd_cs46xx *chip = substream->rmidi->private_data;
2535 chip->active_ctrl(chip, 1);
2537 guard(spinlock_irq)(&chip->reg_lock);
2538 chip->uartm |= CS46XX_MODE_OUTPUT;
2539 chip->midcr |= MIDCR_TXE;
2540 chip->midi_output = substream;
2541 if (!(chip->uartm & CS46XX_MODE_INPUT)) {
2544 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2551 struct snd_cs46xx *chip = substream->rmidi->private_data;
2553 scoped_guard(spinlock_irq, &chip->reg_lock) {
2554 chip->midcr &= ~(MIDCR_TXE | MIDCR_TIE);
2555 chip->midi_output = NULL;
2556 if (!(chip->uartm & CS46XX_MODE_INPUT)) {
2559 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2561 chip->uartm &= ~CS46XX_MODE_OUTPUT;
2563 chip->active_ctrl(chip, -1);
2569 struct snd_cs46xx *chip = substream->rmidi->private_data;
2571 guard(spinlock_irqsave)(&chip->reg_lock);
2573 if ((chip->midcr & MIDCR_RIE) == 0) {
2574 chip->midcr |= MIDCR_RIE;
2575 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2578 if (chip->midcr & MIDCR_RIE) {
2579 chip->midcr &= ~MIDCR_RIE;
2580 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2587 struct snd_cs46xx *chip = substream->rmidi->private_data;
2590 guard(spinlock_irqsave)(&chip->reg_lock);
2592 if ((chip->midcr & MIDCR_TIE) == 0) {
2593 chip->midcr |= MIDCR_TIE;
2595 while ((chip->midcr & MIDCR_TIE) &&
2598 chip->midcr &= ~MIDCR_TIE;
2603 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2606 if (chip->midcr & MIDCR_TIE) {
2607 chip->midcr &= ~MIDCR_TIE;
2608 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr);
2632 err = snd_rawmidi_new(chip->card, "CS46XX", device, 1, 1, &rmidi);
2635 strscpy(rmidi->name, "CS46XX");
2638 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX;
2639 rmidi->private_data = chip;
2640 chip->rmidi = rmidi;
2657 snd_cs46xx_pokeBA0(chip, BA0_JSPT, 0xFF); //outb(gameport->io, 0xFF);
2666 return snd_cs46xx_peekBA0(chip, BA0_JSPT); //inb(gameport->io);
2689 if(axes[jst]==0xFFFF) axes[jst] = -1;
2701 return -1;
2710 chip->gameport = gp = gameport_allocate_port();
2712 dev_err(chip->card->dev,
2714 return -ENOMEM;
2718 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2719 gameport_set_dev_parent(gp, &chip->pci->dev);
2722 gp->open = snd_cs46xx_gameport_open;
2723 gp->read = snd_cs46xx_gameport_read;
2724 gp->trigger = snd_cs46xx_gameport_trigger;
2725 gp->cooked_read = snd_cs46xx_gameport_cooked_read;
2737 if (chip->gameport) {
2738 gameport_unregister_port(chip->gameport);
2739 chip->gameport = NULL;
2743 int snd_cs46xx_gameport(struct snd_cs46xx *chip) { return -ENOSYS; }
2757 struct snd_cs46xx_region *region = entry->private_data;
2759 if (copy_to_user_fromio(buf, region->remap_addr + pos, count))
2760 return -EFAULT;
2774 struct snd_cs46xx_region *region = &chip->region.idx[idx];
2775 if (! snd_card_proc_new(card, region->name, &entry)) {
2776 entry->content = SNDRV_INFO_CONTENT_DATA;
2777 entry->private_data = chip;
2778 entry->c.ops = &snd_cs46xx_proc_io_ops;
2779 entry->size = region->size;
2780 entry->mode = S_IFREG | 0400;
2853 struct snd_cs46xx *chip = card->private_data;
2858 if (chip->active_ctrl)
2859 chip->active_ctrl(chip, 1);
2863 if (chip->amplifier_ctrl)
2864 chip->amplifier_ctrl(chip, -chip->amplifier); /* force to off */
2870 if (chip->active_ctrl)
2871 chip->active_ctrl(chip, -chip->amplifier);
2874 if (chip->dsp_spos_instance) {
2876 chip->dsp_spos_instance = NULL;
2879 free_module_desc(chip->modules[idx]);
2881 vfree(chip->ba1);
2902 * AC-link. Otherwise, we won't be able to bring up the link.
3014 while (timeout-- > 0) {
3025 dev_err(chip->card->dev,
3026 "create - never read codec ready from AC'97\n");
3027 dev_err(chip->card->dev,
3028 "it is not probably bug, try to use CS4236 driver\n");
3029 return -EIO;
3046 dev_dbg(chip->card->dev,
3063 * the codec is pumping ADC data across the AC-link.
3066 while (timeout-- > 0) {
3077 dev_err(chip->card->dev,
3078 "create - never read ISV3 & ISV4 from AC'97\n");
3079 return -EIO;
3085 dev_err(chip->card->dev, "never read ISV3 & ISV4 from AC'97\n");
3086 dev_err(chip->card->dev,
3088 dev_err(chip->card->dev,
3090 dev_err(chip->card->dev,
3091 "this message please report to alsa-devel@alsa-project.org\n");
3093 return -EIO;
3106 * Power down the DAC and ADC. We will power them up (if) when we need
3158 err = load_firmware(chip, &chip->modules[i], module_names[i]);
3160 dev_err(chip->card->dev, "firmware load error [%s]\n",
3164 err = cs46xx_dsp_load_module(chip, chip->modules[i]);
3166 dev_err(chip->card->dev, "image download error [%s]\n",
3173 return -EIO;
3182 dev_err(chip->card->dev, "image download error\n");
3190 chip->play_ctl = tmp & 0xffff0000;
3198 chip->capt.ctl = tmp & 0x0000ffff;
3221 * AMP control - null AMP
3235 dev_dbg(chip->card->dev, "cs46xx_setup_eapd_slot()+\n");
3252 if(chip->nr_ac97_codecs != 2) {
3253 dev_err(chip->card->dev,
3254 "cs46xx_setup_eapd_slot() - no secondary codec configured\n");
3255 return -EINVAL;
3295 dev_dbg(chip->card->dev, "FIFO is busy\n");
3297 return -EINVAL;
3316 dev_dbg(chip->card->dev,
3320 return -EINVAL;
3358 int old = chip->amplifier;
3362 chip->amplifier += change;
3366 if (chip->amplifier) {
3376 if (chip->eapd_switch)
3377 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
3378 &chip->eapd_switch->id);
3382 if (chip->amplifier && !old) {
3397 * Game Theatre XP card - EGPIO[2] is used to enable the external amp.
3401 int old = chip->amplifier;
3405 chip->amplifier += change;
3406 if (chip->amplifier && !old) {
3407 dev_dbg(chip->card->dev, "Hercules amplifier ON\n");
3412 EGPIOPTR_GPPT2 | val2); /* open-drain on output */
3413 } else if (old && !chip->amplifier) {
3414 dev_dbg(chip->card->dev, "Hercules amplifier OFF\n");
3422 dev_dbg(chip->card->dev, "initializing Voyetra mixer\n");
3434 struct snd_card *card = chip->card;
3440 dev_dbg(chip->card->dev, "initializing Hercules mixer\n");
3443 if (chip->in_suspend)
3452 dev_err(card->dev,
3469 chip->amplifier += change;
3471 if (chip->amplifier) {
3501 if (!chip->acpi_port)
3504 chip->amplifier += change;
3507 nval = control = inw(chip->acpi_port + 0x10);
3510 if (! chip->amplifier)
3515 outw(nval, chip->acpi_port + 0x10);
3527 chip->acpi_port = 0;
3536 chip->acpi_port = pp << 8;
3681 struct snd_cs46xx *chip = card->private_data;
3685 chip->in_suspend = 1;
3686 // chip->ac97_powerdown = snd_cs46xx_codec_read(chip, AC97_POWER_CONTROL);
3687 // chip->ac97_general_purpose = snd_cs46xx_codec_read(chip, BA0_AC97_GENERAL_PURPOSE);
3689 snd_ac97_suspend(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]);
3690 snd_ac97_suspend(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]);
3694 chip->saved_regs[i] = snd_cs46xx_peekBA0(chip, saved_regs[i]);
3696 amp_saved = chip->amplifier;
3698 chip->amplifier_ctrl(chip, -chip->amplifier);
3701 chip->active_ctrl(chip, -chip->amplifier);
3702 chip->amplifier = amp_saved; /* restore the status */
3709 struct snd_cs46xx *chip = card->private_data;
3716 amp_saved = chip->amplifier;
3717 chip->amplifier = 0;
3718 chip->active_ctrl(chip, 1); /* force to on */
3727 snd_cs46xx_pokeBA0(chip, saved_regs[i], chip->saved_regs[i]);
3734 chip->ac97_general_purpose);
3736 chip->ac97_powerdown);
3739 chip->ac97_powerdown);
3743 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]);
3744 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]);
3750 chip->capt.ctl = tmp & 0x0000ffff;
3763 chip->amplifier_ctrl(chip, 1); /* turn amp on */
3765 chip->active_ctrl(chip, -1); /* disable CLKRUN */
3766 chip->amplifier = amp_saved;
3767 chip->in_suspend = 0;
3783 struct snd_cs46xx *chip = card->private_data;
3794 spin_lock_init(&chip->reg_lock);
3796 mutex_init(&chip->spos_mutex);
3798 chip->card = card;
3799 chip->pci = pci;
3800 chip->irq = -1;
3805 chip->ba0_addr = pci_resource_start(pci, 0);
3806 chip->ba1_addr = pci_resource_start(pci, 1);
3807 if (chip->ba0_addr == 0 || chip->ba0_addr == (unsigned long)~0 ||
3808 chip->ba1_addr == 0 || chip->ba1_addr == (unsigned long)~0) {
3809 dev_err(chip->card->dev,
3810 "wrong address(es) - ba0 = 0x%lx, ba1 = 0x%lx\n",
3811 chip->ba0_addr, chip->ba1_addr);
3812 return -ENOMEM;
3815 region = &chip->region.name.ba0;
3816 strscpy(region->name, "CS46xx_BA0");
3817 region->base = chip->ba0_addr;
3818 region->size = CS46XX_BA0_SIZE;
3820 region = &chip->region.name.data0;
3821 strscpy(region->name, "CS46xx_BA1_data0");
3822 region->base = chip->ba1_addr + BA1_SP_DMEM0;
3823 region->size = CS46XX_BA1_DATA0_SIZE;
3825 region = &chip->region.name.data1;
3826 strscpy(region->name, "CS46xx_BA1_data1");
3827 region->base = chip->ba1_addr + BA1_SP_DMEM1;
3828 region->size = CS46XX_BA1_DATA1_SIZE;
3830 region = &chip->region.name.pmem;
3831 strscpy(region->name, "CS46xx_BA1_pmem");
3832 region->base = chip->ba1_addr + BA1_SP_PMEM;
3833 region->size = CS46XX_BA1_PRG_SIZE;
3835 region = &chip->region.name.reg;
3836 strscpy(region->name, "CS46xx_BA1_reg");
3837 region->base = chip->ba1_addr + BA1_SP_REG;
3838 region->size = CS46XX_BA1_REG_SIZE;
3844 for (cp = &cards[0]; cp->name; cp++) {
3845 if (cp->vendor == ss_vendor && cp->id == ss_card) {
3846 dev_dbg(chip->card->dev, "hack for %s enabled\n",
3847 cp->name);
3849 chip->amplifier_ctrl = cp->amp;
3850 chip->active_ctrl = cp->active;
3851 chip->mixer_init = cp->mixer_init;
3853 if (cp->init)
3854 cp->init(chip);
3860 dev_info(chip->card->dev,
3862 chip->amplifier_ctrl = amp_voyetra;
3866 dev_info(chip->card->dev,
3868 chip->active_ctrl = clkrun_hack;
3872 if (chip->amplifier_ctrl == NULL)
3873 chip->amplifier_ctrl = amp_none;
3874 if (chip->active_ctrl == NULL)
3875 chip->active_ctrl = amp_none;
3877 chip->active_ctrl(chip, 1); /* enable CLKRUN */
3882 region = &chip->region.idx[idx];
3883 region->remap_addr = devm_ioremap(&pci->dev, region->base,
3884 region->size);
3885 if (region->remap_addr == NULL) {
3886 dev_err(chip->card->dev,
3887 "%s ioremap problem\n", region->name);
3888 return -ENOMEM;
3892 if (devm_request_irq(&pci->dev, pci->irq, snd_cs46xx_interrupt,
3894 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
3895 return -EBUSY;
3897 chip->irq = pci->irq;
3898 card->sync_irq = chip->irq;
3899 card->private_free = snd_cs46xx_free;
3902 chip->dsp_spos_instance = cs46xx_dsp_spos_create(chip);
3903 if (!chip->dsp_spos_instance)
3904 return -ENOMEM;
3914 chip->saved_regs = devm_kmalloc_array(&pci->dev,
3916 sizeof(*chip->saved_regs),
3918 if (!chip->saved_regs)
3919 return -ENOMEM;
3922 chip->active_ctrl(chip, -1); /* disable CLKRUN */