95 #define CM_REG_CHFORMAT		0x08  macro
731 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
734 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
738 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
740 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
825 	val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_pcm_prepare()
837 	snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_pcm_prepare()
1176 		snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1183 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1191 					snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1193 					snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1199 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1206 				snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1209 				snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1213 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1214 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1246 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1248 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1253 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1328 		val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_silence_hack()
1333 		snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_silence_hack()
1386 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
1388 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
2397 DEFINE_BIT_SWITCH_ARG(spdif_in_sel1, CM_REG_CHFORMAT, CM_SPDIF_SELECT1, 0, 0);
2410 DEFINE_BIT_SWITCH_ARG(spdi_phase2, CM_REG_CHFORMAT, CM_SPDIF_INVERSE2, 0, 0);
2780 		detect = snd_cmipci_read(cm, CM_REG_CHFORMAT) & CM_CHIP_MASK1;  in query_chip()
3036 	snd_cmipci_write(cm, CM_REG_CHFORMAT, 0);  in snd_cmipci_create()
3252 	CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,