Lines Matching +full:spdif +full:- +full:2
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
34 * playback periods_min=2, periods_max=8
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
75 #define IPR_SPDIF_IN_USER 0x00004000 /* SPDIF input user data has 16 more bits */
76 #define IPR_SPDIF_OUT_USER 0x00002000 /* SPDIF output user data needs 16 more bits */
77 #define IPR_SPDIF_OUT_FRAME 0x00001000 /* SPDIF frame about to start */
84 #define IPR_SPDIF_STATUS 0x00000020 /* SPDIF status changed */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
95 #define INTE_SPDIF_IN_USER 0x00004000 /* SPDIF input user data has 16 more bits */
96 #define INTE_SPDIF_OUT_USER 0x00002000 /* SPDIF output user data needs 16 more bits */
97 #define INTE_SPDIF_OUT_FRAME 0x00001000 /* SPDIF frame about to start */
104 #define INTE_SPDIF_STATUS 0x00000020 /* SPDIF status changed */
107 #define INTE_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
108 #define INTE_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
117 #define HCFG_CAPTURE_SPDIF_BYPASS 0x04000000 /* 1 = bypass SPDIF input async SRC. */
120 #define HCFG_PLAYBACK_ATTENUATION 0x00006000 /* Playback attenuation mask. 0 = 0dB, 1 = 6dB, 2 = 12…
124 #define HCFG_8_CHANNEL_PLAY 0x00000200 /* 1 = 8 channels, 0 = 2 channels per substream.*/
125 #define HCFG_8_CHANNEL_CAPTURE 0x00000100 /* 1 = 8 channels, 0 = 2 channels per substream.*/
133 #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
136 #define CA0106_GPIO 0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */
137 /* Here pins 0,1,2,3,4,,6 are output. 5,7 are input */
138 /* For the Audigy LS, pin 0 (or bit 8) controls the SPDIF/Analog jack. */
140 * bit 8 0 = SPDIF in and out / 1 = Analog (Mic or Line)-in.
142 * bit 10 0 = Line-in / 1 = Mic-in.
152 * GPO [15:8] Default 0x9. (Default to SPDIF jack enabled for SPDIF)
160 /* CA0106 pointer-offset register set, accessed through the PTR and DATA registers …
171 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
196 /* 0x21 - 0x3f unused */
203 * Playback rate [23:16] (2 bits per channel) (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
208 * The jack has 4 poles. I will call 1 - Tip, 2 - Next to 1, 3 - Next to 2, 4 - Next to 3
209 * For Analogue: 1 -> Center Speaker, 2 -> Sub Woofer, 3 -> Ground, 4 -> Ground
210 * For Digital: 1 -> Front SPDIF, 2 -> Rear SPDIF, 3 -> Center/Subwoofer SPDIF, 4 -> Ground.
211 …andard 4 pole Video A/V cable with RCA outputs: 1 -> White, 2 -> Yellow, 3 -> Shield on all three,…
214 /* The Front SPDIF PCM gets mixed with samples from the AC97 codec, so can only work for Stereo PCM…
215 * The Rear SPDIF can be used for Stereo PCM and also AC3/DTS
216 * The Center/LFE SPDIF cannot be used for AC3/DTS, but can be used for Stereo PCM.
217 * Summary: For ALSA we use the Rear channel for SPDIF Digital AC3/DTS output
219 /* A standard 2 pole mono mini-jack to RCA plug can be used for SPDIF Stereo PCM output from the Fr…
220 …* A standard 3 pole stereo mini-jack to 2 RCA plugs can be used for SPDIF AC3/DTS and Stereo PCM o…
222 #define SPCS0 0x41 /* SPDIF output Channel Status 0 register. For Rear. default=0x02108004, non-…
223 #define SPCS1 0x42 /* SPDIF output Channel Status 1 register. For Front */
224 #define SPCS2 0x43 /* SPDIF output Channel Status 2 register. For Center/LFE */
225 #define SPCS3 0x44 /* SPDIF output Channel Status 3 register. Unknown */
241 #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
242 #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
243 #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
246 #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
247 #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
249 #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
281 #define SPDIF_SELECT1 0x45 /* Enables SPDIF or Analogue outputs 0-SPDIF, 0xf00-Analogue */
282 /* 0x100 - Front, 0x800 - Rear, 0x200 - Center/LFE.
290 * Use register SPDIF_SELECT2(0x72) to switch between SPDIF and Analog.
293 * Wide SPDIF format [3:0] (one bit for each channel) (0=20bit, 1=24bit)
294 * Tristate SPDIF Output [11:8] (one bit for each channel) (0=Not tristate, 1=Tristate)
295 * SPDIF Bypass enable [19:16] (one bit for each channel) (0=Not bypass, 1=Bypass)
298 * SPDIF 0 User data [7:0]
299 * SPDIF 1 User data [15:8]
300 * SPDIF 0 User data [23:16]
301 * SPDIF 0 User data [31:24]
302 …* User data can be sent by using the SPDIF output frame pending and SPDIF output user bit interrup…
305 #define SPDIF_INPUT_STATUS 0x49 /* SPDIF Input status register. Bits the same as SPCS.
308 * When Channel = 2:
309 * SPDIF Input User data [16:0]
310 * SPDIF Input Frame count [21:16]
312 #define CAPTURE_CACHE_DATA 0x50 /* 0x50-0x5f Recorded samples. */
315 #define CAPTURE_SOURCE_CHANNEL1 0x0f000000 /* 0 - SPDIF mixer output. */
316 #define CAPTURE_SOURCE_CHANNEL2 0x00f00000 /* 1 - What you hear or . 2 - ?? */
317 #define CAPTURE_SOURCE_CHANNEL3 0x000f0000 /* 3 - Mic in, Line in, TAD in, Aux in. */
319 …/* Record Map [7:0] (2 bits per channel) 0=mapped to channel 0, 1=mapped to channel 1, 2=mapped to…
322 * Record source select for channel 2 [26:24]
324 * 0 - SPDIF mixer output.
325 * 1 - i2s mixer output.
326 * 2 - SPDIF input.
327 * 3 - i2s input.
328 * 4 - AC97 capture.
329 * 5 - SRC output.
331 #define CAPTURE_VOLUME1 0x61 /* Capture volume per channel 0-3 */
332 #define CAPTURE_VOLUME2 0x62 /* Capture volume per channel 4-7 */
334 #define PLAYBACK_ROUTING1 0x63 /* Playback routing of channels 0-7. Effects AC3 ou…
336 #define ROUTING1_NULL 0x00770000 /* Channel_id 2 sends to 54, Channel_id 3 sends to …
338 #define ROUTING1_FRONT 0x00000077 /* Channel_id 2 to CENTER_LFE, Channel_id 3 to NULL. */
341 /* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
342 * Host channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
343 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
344 * Host channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
345 * Host channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
346 * Host channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
347 * Host channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
348 * Host channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
353 /* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
354 * SRC channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
355 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
356 * SRC channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
357 * SRC channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
358 * SRC channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
359 * SRC channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
360 * SRC channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
364 /* SPDIF Mixer input control:
365 * Invert SRC to SPDIF Mixer [7-0] (One bit per channel)
366 * Invert Host to SPDIF Mixer [15:8] (One bit per channel)
367 * SRC to SPDIF Mixer disable [23:16] (One bit per channel)
368 * Host to SPDIF Mixer disable [31:24] (One bit per channel)
370 #define PLAYBACK_VOLUME1 0x66 /* Playback SPDIF volume per channel. Set to the sa…
371 /* PLAYBACK_VOLUME1 must be set to 30303030 for SPDIF AC3 Playback */
372 /* SPDIF mixer input volume. 0=12dB, 0x30=0dB, 0xFE=-51.5dB, 0xff=Mute */
380 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
382 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
384 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
386 …destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instea…
393 /* unique channel identifier for midi->channel */
409 * SPDIF Locked [21] For SPDIF channel only.
410 * Valid Audio [22] For SPDIF channel only.
413 /* Channel_id 0: 0x40c81000 must be changed to 0x40c80000 for SPDIF AC3 input or output. */
416 * Sample output rate [1:0] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
417 * Sample input rate [3:2] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
419 * Record rate [9:8] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
421 * I2S input rate master mode [15:14] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
422 * I2S output rate [17:16] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
428 * SPDIF output rate [25:24] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
429 * SPDIF output source select [26] (0=host, 1=SRC)
431 * Record Source 0 input [29:28] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
432 * Record Source 1 input [31:30] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
440 /* Sample rate output control register Channel=2
441 * SPDIF Input volume Right [23:16]
442 * SPDIF Input volume Left [31:24]
454 * SPDIF output enable [27:24]
466 * Capture can only do 2 periods.
507 #define ADC_ALC_CTRL2 0x00000011 //ADC ALC Control 2
531 #define SET_CHANNEL 0 /* Testing channel outputs 0=Front, 1=Center/LFE, 2=Unknown, 3=Rear */
534 #define PCM_CENTER_LFE_CHANNEL 2
539 #define CONTROL_UNKNOWN_CHANNEL 2
543 #define SPI_REG_MASK 0x1ff /* 16-bit SPI writes have a 7-bit address */
560 #define SPI_PL_REG 2
563 #define SPI_PL_BIT_L_R (2<<5) /* left channel = right */
564 #define SPI_PL_BIT_L_C (3<<5) /* left channel = (L+R)/2 */
567 #define SPI_PL_BIT_R_R (2<<7) /* right channel = right */
568 #define SPI_PL_BIT_R_C (3<<7) /* right channel = (L+R)/2 */
569 #define SPI_IZD_REG 2
575 #define SPI_FMT_BIT_I2S (2<<0) /* I2S mode */
578 #define SPI_LRP_BIT (1<<2) /* invert LRCLK polarity */
582 #define SPI_IWL_BIT_16 (0<<4) /* 16-bit world length */
583 #define SPI_IWL_BIT_20 (1<<4) /* 20-bit world length */
584 #define SPI_IWL_BIT_24 (2<<4) /* 24-bit world length */
585 #define SPI_IWL_BIT_32 (3<<4) /* 32-bit world length */
592 #define SPI_RATE_BIT_256 (2<<6)
605 #define SPI_DMUTE4_BIT (1<<2)
616 #define SPI_PDWN_REG 2 /* power down all DACs */
617 #define SPI_PDWN_BIT (1<<2)
623 #define SPI_DACD1_BIT (1<<2)
652 int ac97; /* ac97 = 0 -> Select MIC, Line in, TAD in, AUX in.
653 ac97 = 1 -> Default to AC97 in. */
654 int gpio_type; /* gpio_type = 1 -> shared mic-in/line-in
655 gpio_type = 2 -> shared side-out/line-in. */
657 controls, phone, mic, line-in and aux. */
658 u16 spi_dac; /* spi_dac = 0 -> no spi interface for DACs
659 spi_dac = 0x<front><rear><center-lfe><side>
660 -> specifies DAC id for each channel pair. */
663 // definition of the chip-specific record
683 u32 spdif_str_bits[4]; /* s/pdif out per-stream setup */
687 u8 i2c_capture_volume[4][2];