Lines Matching +full:global +full:- +full:reset
1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (c) 2001, 2002, 2003 Ladislav Michl <ladis@linux-mips.org>
18 #define H2_ISR_GLOBAL_RESET_N 0x08 /* chip global reset 0=reset */
19 #define H2_ISR_CODEC_RESET_N 0x10 /* codec/synth reset 0=reset */
40 /* 9=Global DMA Control */
53 /* If IAR_TYPE_M=Global DMA Control: */
99 #define H2I_DMA_END 0x9108 /* global dma endian select */
107 #define H2I_DMA_DRV 0x910C /* global PBUS DMA enable */
120 #define H2I_AESTX_C_CLKID_SHIFT 3 /* Bresenham Clock Gen 1-3 */
136 #define H2I_C1_CLKID_SHIFT 3 /* Bresenham Clock Gen 1-3 */
152 #define H2I_C2_R_ATT_SHIFT 18 /* right d/a output - */
154 #define H2I_C2_L_ATT_SHIFT 23 /* left d/a output - */
177 #define H2I_BRES_C2_MOD_M 0xffff0000 /* modctrl=0xffff&(modinc-1) */