Lines Matching defs:gus
18 #include <sound/gus.h>
96 struct snd_gus_card *gus;
188 struct snd_gus_card *gus, int dev,
201 if (gus->gf1.port == 0x250) {
235 struct snd_gus_card *gus,
245 snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 0); /* reset GF1 */
246 d = snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET);
248 dev_dbg(gus->card->dev, "[0x%lx] check 1 failed - 0x%x\n", gus->gf1.port, d);
252 snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 1); /* release reset */
254 d = snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET);
256 dev_dbg(gus->card->dev, "[0x%lx] check 2 failed - 0x%x\n", gus->gf1.port, d);
259 scoped_guard(spinlock_irqsave, &gus->reg_lock) {
260 rev1 = snd_gf1_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER);
261 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, ~rev1);
262 rev2 = snd_gf1_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER);
263 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, rev1);
265 dev_dbg(gus->card->dev,
267 gus->gf1.port, rev1, rev2);
270 dev_dbg(gus->card->dev,
271 "[0x%lx] InterWave check - passed\n", gus->gf1.port);
272 gus->interwave = 1;
273 strscpy(gus->card->shortname, "AMD InterWave");
274 gus->revision = rev1 >> 4;
278 return snd_interwave_detect_stb(iwcard, gus, dev, rbus);
281 dev_dbg(gus->card->dev, "[0x%lx] InterWave check - failed\n", gus->gf1.port);
295 snd_gus_interrupt(irq, iwcard->gus);
307 static void snd_interwave_reset(struct snd_gus_card *gus)
309 snd_gf1_write8(gus, SNDRV_GF1_GB_RESET, 0x00);
311 snd_gf1_write8(gus, SNDRV_GF1_GB_RESET, 0x01);
315 static void snd_interwave_bank_sizes(struct snd_gus_card *gus, int *sizes)
327 snd_gf1_poke(gus, local, d);
328 snd_gf1_poke(gus, local + 1, d + 1);
330 dev_dbg(gus->card->dev, "d = 0x%x, local = 0x%x, "
333 snd_gf1_peek(gus, local),
334 snd_gf1_peek(gus, local + 1),
335 snd_gf1_peek(gus, idx << 22));
337 if (snd_gf1_peek(gus, local) != d ||
338 snd_gf1_peek(gus, local + 1) != d + 1 ||
339 snd_gf1_peek(gus, idx << 22) != 0x55)
345 dev_dbg(gus->card->dev, "sizes: %i %i %i %i\n",
366 static void snd_interwave_detect_memory(struct snd_gus_card *gus)
382 snd_interwave_reset(gus);
383 snd_gf1_write8(gus, SNDRV_GF1_GB_GLOBAL_MODE, snd_gf1_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE) | 0x01); /* enhanced mode */
384 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x01); /* DRAM I/O cycles selected */
385 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xff10) | 0x004c);
388 snd_gf1_poke(gus, 0, 0x55);
389 snd_gf1_poke(gus, 1, 0xaa);
391 if (snd_gf1_peek(gus, 0) == 0x55 && snd_gf1_peek(gus, 1) == 0xaa)
396 snd_interwave_bank_sizes(gus, psizes);
400 dev_dbg(gus->card->dev, "lmct = 0x%08x\n", lmct);
405 dev_dbg(gus->card->dev, "found !!! %i\n", i);
407 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xfff0) | i);
408 snd_interwave_bank_sizes(gus, psizes);
411 if (i >= ARRAY_SIZE(lmc) && !gus->gf1.enh_mode)
412 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xfff0) | 2);
414 gus->gf1.mem_alloc.banks_8[i].address =
415 gus->gf1.mem_alloc.banks_16[i].address = i << 22;
416 gus->gf1.mem_alloc.banks_8[i].size =
417 gus->gf1.mem_alloc.banks_16[i].size = psizes[i] << 18;
422 gus->gf1.memory = pages;
424 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x03); /* select ROM */
425 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xff1f) | (4 << 5));
426 gus->gf1.rom_banks = 0;
427 gus->gf1.rom_memory = 0;
430 iwave[i] = snd_gf1_peek(gus, bank_pos + i);
435 csum += snd_gf1_peek(gus, bank_pos + i);
438 gus->gf1.rom_banks++;
439 gus->gf1.rom_present |= 1 << (bank_pos >> 22);
440 gus->gf1.rom_memory = snd_gf1_peek(gus, bank_pos + 40) |
441 (snd_gf1_peek(gus, bank_pos + 41) << 8) |
442 (snd_gf1_peek(gus, bank_pos + 42) << 16) |
443 (snd_gf1_peek(gus, bank_pos + 43) << 24);
446 if (gus->gf1.rom_memory > 0) {
447 if (gus->gf1.rom_banks == 1 && gus->gf1.rom_present == 8)
448 gus->card->type = SNDRV_CARD_TYPE_IW_DYNASONIC;
451 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x00); /* select RAM */
453 if (!gus->gf1.enh_mode)
454 snd_interwave_reset(gus);
457 static void snd_interwave_init(int dev, struct snd_gus_card *gus)
460 scoped_guard(spinlock_irqsave, &gus->reg_lock) {
461 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, 0x00);
462 snd_gf1_write8(gus, SNDRV_GF1_GB_COMPATIBILITY, 0x1f);
463 snd_gf1_write8(gus, SNDRV_GF1_GB_DECODE_CONTROL, 0x49);
464 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, 0x11);
465 snd_gf1_write8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A, 0x00);
466 snd_gf1_write8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B, 0x30);
467 snd_gf1_write8(gus, SNDRV_GF1_GB_EMULATION_IRQ, 0x00);
469 gus->equal_irq = 1;
470 gus->codec_flag = 1;
471 gus->interwave = 1;
472 gus->max_flag = 1;
473 gus->joystick_dac = joystick_dac[dev];
631 struct snd_gus_card *gus)
646 err = snd_interwave_detect(iwcard, gus, dev
654 iwcard->gus_status_reg = gus->gf1.reg_irqstat;
655 iwcard->pcm_status_reg = gus->gf1.port + 0x10c + 2;
657 snd_interwave_init(dev, gus);
658 snd_interwave_detect_memory(gus);
659 err = snd_gus_initialize(gus);
672 gus->gf1.port + 0x10c, -1, xirq,
687 gus->revision + 'A');
699 err = snd_gf1_pcm_new(gus, 1, 1);
730 gus->uart_enable = midi[dev];
731 err = snd_gf1_rawmidi_new(gus, 0);
737 if (gus->gf1.rom_banks == 1 && gus->gf1.rom_present == 8)
746 gus->gf1.port,
757 iwcard->gus = gus;
777 struct snd_gus_card *gus;
809 err = snd_interwave_probe_gus(card, dev, &gus);
815 err = snd_interwave_probe_gus(card, dev, &gus);
823 err = snd_interwave_probe(card, dev, gus);
846 struct snd_gus_card *gus;
863 res = snd_interwave_probe_gus(card, dev, &gus);
866 res = snd_interwave_probe(card, dev, gus);