Lines Matching refs:mix_cntrl_reg
265 gus->mix_cntrl_reg &= 0xf8; in snd_gus_init_dma_irq()
266 gus->mix_cntrl_reg |= 0x01; /* disable MIC, LINE IN, enable LINE OUT */ in snd_gus_init_dma_irq()
268 gus->mix_cntrl_reg &= ~1; /* enable LINE IN */ in snd_gus_init_dma_irq()
269 gus->mix_cntrl_reg |= 4; /* enable MIC */ in snd_gus_init_dma_irq()
297 outb(gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()
305 outb(0x00 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()
308 outb(0x40 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()
316 outb(0x00 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()
319 outb(0x40 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()
327 gus->mix_cntrl_reg |= 0x08; /* enable latches */ in snd_gus_init_dma_irq()
329 gus->mix_cntrl_reg &= ~0x08; /* disable latches */ in snd_gus_init_dma_irq()
331 outb(gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG)); in snd_gus_init_dma_irq()