15 static void azx_clear_corbrp(struct hdac_bus *bus)  in azx_clear_corbrp()  argument
20 		if (snd_hdac_chip_readw(bus, CORBRP) & AZX_CORBRP_RST)  in azx_clear_corbrp()
25 		dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n",  in azx_clear_corbrp()
26 			snd_hdac_chip_readw(bus, CORBRP));  in azx_clear_corbrp()
28 	snd_hdac_chip_writew(bus, CORBRP, 0);  in azx_clear_corbrp()
30 		if (snd_hdac_chip_readw(bus, CORBRP) == 0)  in azx_clear_corbrp()
35 		dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n",  in azx_clear_corbrp()
36 			snd_hdac_chip_readw(bus, CORBRP));  in azx_clear_corbrp()
43 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)  in snd_hdac_bus_init_cmd_io()  argument
45 	WARN_ON_ONCE(!bus->rb.area);  in snd_hdac_bus_init_cmd_io()
47 	guard(spinlock_irq)(&bus->reg_lock);  in snd_hdac_bus_init_cmd_io()
49 	bus->corb.addr = bus->rb.addr;  in snd_hdac_bus_init_cmd_io()
50 	bus->corb.buf = (__le32 *)bus->rb.area;  in snd_hdac_bus_init_cmd_io()
51 	snd_hdac_chip_writel(bus, CORBLBASE, (u32)(bus->corb.addr + bus->addr_offset));  in snd_hdac_bus_init_cmd_io()
52 	snd_hdac_chip_writel(bus, CORBUBASE, upper_32_bits(bus->corb.addr + bus->addr_offset));  in snd_hdac_bus_init_cmd_io()
55 	snd_hdac_chip_writeb(bus, CORBSIZE, 0x02);  in snd_hdac_bus_init_cmd_io()
57 	snd_hdac_chip_writew(bus, CORBWP, 0);  in snd_hdac_bus_init_cmd_io()
60 	snd_hdac_chip_writew(bus, CORBRP, AZX_CORBRP_RST);  in snd_hdac_bus_init_cmd_io()
61 	if (!bus->corbrp_self_clear)  in snd_hdac_bus_init_cmd_io()
62 		azx_clear_corbrp(bus);  in snd_hdac_bus_init_cmd_io()
65 	if (!bus->use_pio_for_commands)  in snd_hdac_bus_init_cmd_io()
66 		snd_hdac_chip_writeb(bus, CORBCTL, AZX_CORBCTL_RUN);  in snd_hdac_bus_init_cmd_io()
69 	bus->rirb.addr = bus->rb.addr + 2048;  in snd_hdac_bus_init_cmd_io()
70 	bus->rirb.buf = (__le32 *)(bus->rb.area + 2048);  in snd_hdac_bus_init_cmd_io()
71 	bus->rirb.wp = bus->rirb.rp = 0;  in snd_hdac_bus_init_cmd_io()
72 	memset(bus->rirb.cmds, 0, sizeof(bus->rirb.cmds));  in snd_hdac_bus_init_cmd_io()
73 	snd_hdac_chip_writel(bus, RIRBLBASE, (u32)(bus->rirb.addr + bus->addr_offset));  in snd_hdac_bus_init_cmd_io()
74 	snd_hdac_chip_writel(bus, RIRBUBASE, upper_32_bits(bus->rirb.addr + bus->addr_offset));  in snd_hdac_bus_init_cmd_io()
77 	snd_hdac_chip_writeb(bus, RIRBSIZE, 0x02);  in snd_hdac_bus_init_cmd_io()
79 	snd_hdac_chip_writew(bus, RIRBWP, AZX_RIRBWP_RST);  in snd_hdac_bus_init_cmd_io()
81 	snd_hdac_chip_writew(bus, RINTCNT, 1);  in snd_hdac_bus_init_cmd_io()
83 	if (bus->not_use_interrupts)  in snd_hdac_bus_init_cmd_io()
84 		snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN);  in snd_hdac_bus_init_cmd_io()
86 		snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);  in snd_hdac_bus_init_cmd_io()
88 	snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);  in snd_hdac_bus_init_cmd_io()
93 static void hdac_wait_for_cmd_dmas(struct hdac_bus *bus)  in hdac_wait_for_cmd_dmas()  argument
98 	while ((snd_hdac_chip_readb(bus, RIRBCTL) & AZX_RBCTL_DMA_EN)  in hdac_wait_for_cmd_dmas()
103 	while ((snd_hdac_chip_readb(bus, CORBCTL) & AZX_CORBCTL_RUN)  in hdac_wait_for_cmd_dmas()
112 void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus)  in snd_hdac_bus_stop_cmd_io()  argument
114 	scoped_guard(spinlock_irq, &bus->reg_lock) {  in snd_hdac_bus_stop_cmd_io()
116 		snd_hdac_chip_writeb(bus, RIRBCTL, 0);  in snd_hdac_bus_stop_cmd_io()
117 		snd_hdac_chip_writeb(bus, CORBCTL, 0);  in snd_hdac_bus_stop_cmd_io()
120 	hdac_wait_for_cmd_dmas(bus);  in snd_hdac_bus_stop_cmd_io()
122 	guard(spinlock_irq)(&bus->reg_lock);  in snd_hdac_bus_stop_cmd_io()
124 	snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, 0);  in snd_hdac_bus_stop_cmd_io()
138 static int snd_hdac_bus_wait_for_pio_response(struct hdac_bus *bus,  in snd_hdac_bus_wait_for_pio_response()  argument
145 		if (snd_hdac_chip_readw(bus, IRS) & AZX_IRS_VALID) {  in snd_hdac_bus_wait_for_pio_response()
147 			bus->rirb.res[addr] = snd_hdac_chip_readl(bus, IR);  in snd_hdac_bus_wait_for_pio_response()
153 	dev_dbg_ratelimited(bus->dev, "get_response_pio timeout: IRS=%#x\n",  in snd_hdac_bus_wait_for_pio_response()
154 			    snd_hdac_chip_readw(bus, IRS));  in snd_hdac_bus_wait_for_pio_response()
156 	bus->rirb.res[addr] = -1;  in snd_hdac_bus_wait_for_pio_response()
168 static int snd_hdac_bus_send_cmd_pio(struct hdac_bus *bus, unsigned int val)  in snd_hdac_bus_send_cmd_pio()  argument
173 	guard(spinlock_irq)(&bus->reg_lock);  in snd_hdac_bus_send_cmd_pio()
177 		if (!((snd_hdac_chip_readw(bus, IRS) & AZX_IRS_BUSY))) {  in snd_hdac_bus_send_cmd_pio()
179 			snd_hdac_chip_updatew(bus, IRS, AZX_IRS_VALID, AZX_IRS_VALID);  in snd_hdac_bus_send_cmd_pio()
180 			snd_hdac_chip_writel(bus, IC, val);  in snd_hdac_bus_send_cmd_pio()
182 			snd_hdac_chip_updatew(bus, IRS, AZX_IRS_BUSY, AZX_IRS_BUSY);  in snd_hdac_bus_send_cmd_pio()
184 			return snd_hdac_bus_wait_for_pio_response(bus, addr);  in snd_hdac_bus_send_cmd_pio()
189 	dev_dbg_ratelimited(bus->dev, "send_cmd_pio timeout: IRS=%#x, val=%#x\n",  in snd_hdac_bus_send_cmd_pio()
190 			    snd_hdac_chip_readw(bus, IRS), val);  in snd_hdac_bus_send_cmd_pio()
203 static int snd_hdac_bus_get_response_pio(struct hdac_bus *bus,  in snd_hdac_bus_get_response_pio()  argument
207 		*res = bus->rirb.res[addr];  in snd_hdac_bus_get_response_pio()
219 static int snd_hdac_bus_send_cmd_corb(struct hdac_bus *bus, unsigned int val)  in snd_hdac_bus_send_cmd_corb()  argument
224 	guard(spinlock_irq)(&bus->reg_lock);  in snd_hdac_bus_send_cmd_corb()
226 	bus->last_cmd[azx_command_addr(val)] = val;  in snd_hdac_bus_send_cmd_corb()
229 	wp = snd_hdac_chip_readw(bus, CORBWP);  in snd_hdac_bus_send_cmd_corb()
237 	rp = snd_hdac_chip_readw(bus, CORBRP);  in snd_hdac_bus_send_cmd_corb()
243 	bus->rirb.cmds[addr]++;  in snd_hdac_bus_send_cmd_corb()
244 	bus->corb.buf[wp] = cpu_to_le32(val);  in snd_hdac_bus_send_cmd_corb()
245 	snd_hdac_chip_writew(bus, CORBWP, wp);  in snd_hdac_bus_send_cmd_corb()
259 void snd_hdac_bus_update_rirb(struct hdac_bus *bus)  in snd_hdac_bus_update_rirb()  argument
265 	wp = snd_hdac_chip_readw(bus, RIRBWP);  in snd_hdac_bus_update_rirb()
271 	if (wp == bus->rirb.wp)  in snd_hdac_bus_update_rirb()
273 	bus->rirb.wp = wp;  in snd_hdac_bus_update_rirb()
275 	while (bus->rirb.rp != wp) {  in snd_hdac_bus_update_rirb()
276 		bus->rirb.rp++;  in snd_hdac_bus_update_rirb()
277 		bus->rirb.rp %= AZX_MAX_RIRB_ENTRIES;  in snd_hdac_bus_update_rirb()
279 		rp = bus->rirb.rp << 1; /* an RIRB entry is 8-bytes */  in snd_hdac_bus_update_rirb()
280 		res_ex = le32_to_cpu(bus->rirb.buf[rp + 1]);  in snd_hdac_bus_update_rirb()
281 		res = le32_to_cpu(bus->rirb.buf[rp]);  in snd_hdac_bus_update_rirb()
284 			dev_err(bus->dev,  in snd_hdac_bus_update_rirb()
286 				res, res_ex, bus->rirb.rp, wp);  in snd_hdac_bus_update_rirb()
289 			snd_hdac_bus_queue_event(bus, res, res_ex);  in snd_hdac_bus_update_rirb()
290 		else if (bus->rirb.cmds[addr]) {  in snd_hdac_bus_update_rirb()
291 			bus->rirb.res[addr] = res;  in snd_hdac_bus_update_rirb()
292 			bus->rirb.cmds[addr]--;  in snd_hdac_bus_update_rirb()
293 			if (!bus->rirb.cmds[addr] &&  in snd_hdac_bus_update_rirb()
294 			    waitqueue_active(&bus->rirb_wq))  in snd_hdac_bus_update_rirb()
295 				wake_up(&bus->rirb_wq);  in snd_hdac_bus_update_rirb()
297 			dev_err_ratelimited(bus->dev,  in snd_hdac_bus_update_rirb()
299 				res, res_ex, bus->last_cmd[addr]);  in snd_hdac_bus_update_rirb()
313 static int snd_hdac_bus_get_response_rirb(struct hdac_bus *bus,  in snd_hdac_bus_get_response_rirb()  argument
325 		scoped_guard(spinlock_irq, &bus->reg_lock) {  in snd_hdac_bus_get_response_rirb()
326 			if (!bus->polling_mode)  in snd_hdac_bus_get_response_rirb()
327 				prepare_to_wait(&bus->rirb_wq, &wait,  in snd_hdac_bus_get_response_rirb()
329 			if (bus->polling_mode)  in snd_hdac_bus_get_response_rirb()
330 				snd_hdac_bus_update_rirb(bus);  in snd_hdac_bus_get_response_rirb()
331 			if (!bus->rirb.cmds[addr]) {  in snd_hdac_bus_get_response_rirb()
333 					*res = bus->rirb.res[addr]; /* the last value */  in snd_hdac_bus_get_response_rirb()
334 				if (!bus->polling_mode)  in snd_hdac_bus_get_response_rirb()
335 					finish_wait(&bus->rirb_wq, &wait);  in snd_hdac_bus_get_response_rirb()
342 		if (!bus->polling_mode) {  in snd_hdac_bus_get_response_rirb()
344 		} else if (bus->needs_damn_long_delay ||  in snd_hdac_bus_get_response_rirb()
347 				dev_dbg_ratelimited(bus->dev,  in snd_hdac_bus_get_response_rirb()
349 						    bus->last_cmd[addr]);  in snd_hdac_bus_get_response_rirb()
359 	if (!bus->polling_mode)  in snd_hdac_bus_get_response_rirb()
360 		finish_wait(&bus->rirb_wq, &wait);  in snd_hdac_bus_get_response_rirb()
372 int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val)  in snd_hdac_bus_send_cmd()  argument
374 	if (bus->use_pio_for_commands)  in snd_hdac_bus_send_cmd()
375 		return snd_hdac_bus_send_cmd_pio(bus, val);  in snd_hdac_bus_send_cmd()
377 	return snd_hdac_bus_send_cmd_corb(bus, val);  in snd_hdac_bus_send_cmd()
389 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,  in snd_hdac_bus_get_response()  argument
392 	if (bus->use_pio_for_commands)  in snd_hdac_bus_get_response()
393 		return snd_hdac_bus_get_response_pio(bus, addr, res);  in snd_hdac_bus_get_response()
395 	return snd_hdac_bus_get_response_rirb(bus, addr, res);  in snd_hdac_bus_get_response()
406 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus)  in snd_hdac_bus_parse_capabilities()  argument
412 	offset = snd_hdac_chip_readw(bus, LLCH);  in snd_hdac_bus_parse_capabilities()
416 		cur_cap = _snd_hdac_chip_readl(bus, offset);  in snd_hdac_bus_parse_capabilities()
418 		dev_dbg(bus->dev, "Capability version: 0x%x\n",  in snd_hdac_bus_parse_capabilities()
421 		dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",  in snd_hdac_bus_parse_capabilities()
425 			dev_dbg(bus->dev, "Invalid capability reg read\n");  in snd_hdac_bus_parse_capabilities()
431 			dev_dbg(bus->dev, "Found ML capability\n");  in snd_hdac_bus_parse_capabilities()
432 			bus->mlcap = bus->remap_addr + offset;  in snd_hdac_bus_parse_capabilities()
436 			dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);  in snd_hdac_bus_parse_capabilities()
437 			bus->gtscap = bus->remap_addr + offset;  in snd_hdac_bus_parse_capabilities()
442 			dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);  in snd_hdac_bus_parse_capabilities()
443 			bus->ppcap = bus->remap_addr + offset;  in snd_hdac_bus_parse_capabilities()
448 			dev_dbg(bus->dev, "Found SPB capability\n");  in snd_hdac_bus_parse_capabilities()
449 			bus->spbcap = bus->remap_addr + offset;  in snd_hdac_bus_parse_capabilities()
454 			dev_dbg(bus->dev, "Found DRSM capability\n");  in snd_hdac_bus_parse_capabilities()
455 			bus->drsmcap = bus->remap_addr + offset;  in snd_hdac_bus_parse_capabilities()
459 			dev_err(bus->dev, "Unknown capability %d\n", cur_cap);  in snd_hdac_bus_parse_capabilities()
467 			dev_err(bus->dev, "We exceeded HDAC capabilities!!!\n");  in snd_hdac_bus_parse_capabilities()
490 void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus)  in snd_hdac_bus_enter_link_reset()  argument
495 	snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_RESET, 0);  in snd_hdac_bus_enter_link_reset()
498 	while ((snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) &&  in snd_hdac_bus_enter_link_reset()
510 void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus)  in snd_hdac_bus_exit_link_reset()  argument
514 	snd_hdac_chip_updateb(bus, GCTL, AZX_GCTL_RESET, AZX_GCTL_RESET);  in snd_hdac_bus_exit_link_reset()
517 	while (!snd_hdac_chip_readb(bus, GCTL) && time_before(jiffies, timeout))  in snd_hdac_bus_exit_link_reset()
523 int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset)  in snd_hdac_bus_reset_link()  argument
529 	if (snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)  in snd_hdac_bus_reset_link()
530 		snd_hdac_chip_writew(bus, STATESTS, STATESTS_INT_MASK);  in snd_hdac_bus_reset_link()
533 	snd_hdac_bus_enter_link_reset(bus);  in snd_hdac_bus_reset_link()
541 	snd_hdac_bus_exit_link_reset(bus);  in snd_hdac_bus_reset_link()
548 	if (!snd_hdac_chip_readb(bus, GCTL)) {  in snd_hdac_bus_reset_link()
549 		dev_dbg(bus->dev, "controller not ready!\n");  in snd_hdac_bus_reset_link()
554 	if (!bus->codec_mask) {  in snd_hdac_bus_reset_link()
555 		bus->codec_mask = snd_hdac_chip_readw(bus, STATESTS);  in snd_hdac_bus_reset_link()
556 		dev_dbg(bus->dev, "codec_mask = 0x%lx\n", bus->codec_mask);  in snd_hdac_bus_reset_link()
564 static void azx_int_enable(struct hdac_bus *bus)  in azx_int_enable()  argument
567 	snd_hdac_chip_updatel(bus, INTCTL,  in azx_int_enable()
573 static void azx_int_disable(struct hdac_bus *bus)  in azx_int_disable()  argument
578 	list_for_each_entry(azx_dev, &bus->stream_list, list)  in azx_int_disable()
582 	snd_hdac_chip_writel(bus, INTCTL, 0);  in azx_int_disable()
586 static void azx_int_clear(struct hdac_bus *bus)  in azx_int_clear()  argument
591 	list_for_each_entry(azx_dev, &bus->stream_list, list)  in azx_int_clear()
595 	snd_hdac_chip_writew(bus, STATESTS, STATESTS_INT_MASK);  in azx_int_clear()
598 	snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);  in azx_int_clear()
601 	snd_hdac_chip_writel(bus, INTSTS, AZX_INT_CTRL_EN | AZX_INT_ALL_STREAM);  in azx_int_clear()
609 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)  in snd_hdac_bus_init_chip()  argument
611 	if (bus->chip_init)  in snd_hdac_bus_init_chip()
615 	snd_hdac_bus_reset_link(bus, full_reset);  in snd_hdac_bus_init_chip()
618 	azx_int_clear(bus);  in snd_hdac_bus_init_chip()
621 	snd_hdac_bus_init_cmd_io(bus);  in snd_hdac_bus_init_chip()
624 	azx_int_enable(bus);  in snd_hdac_bus_init_chip()
627 	if (bus->use_posbuf && bus->posbuf.addr) {  in snd_hdac_bus_init_chip()
628 		snd_hdac_chip_writel(bus, DPLBASE, (u32)(bus->posbuf.addr + bus->addr_offset));  in snd_hdac_bus_init_chip()
629 		snd_hdac_chip_writel(bus, DPUBASE, upper_32_bits(bus->posbuf.addr + bus->addr_offset));  in snd_hdac_bus_init_chip()
632 	bus->chip_init = true;  in snd_hdac_bus_init_chip()
642 void snd_hdac_bus_stop_chip(struct hdac_bus *bus)  in snd_hdac_bus_stop_chip()  argument
644 	if (!bus->chip_init)  in snd_hdac_bus_stop_chip()
648 	azx_int_disable(bus);  in snd_hdac_bus_stop_chip()
649 	azx_int_clear(bus);  in snd_hdac_bus_stop_chip()
652 	snd_hdac_bus_stop_cmd_io(bus);  in snd_hdac_bus_stop_chip()
655 	if (bus->posbuf.addr) {  in snd_hdac_bus_stop_chip()
656 		snd_hdac_chip_writel(bus, DPLBASE, 0);  in snd_hdac_bus_stop_chip()
657 		snd_hdac_chip_writel(bus, DPUBASE, 0);  in snd_hdac_bus_stop_chip()
660 	bus->chip_init = false;  in snd_hdac_bus_stop_chip()
672 int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,  in snd_hdac_bus_handle_stream_irq()  argument
680 	list_for_each_entry(azx_dev, &bus->stream_list, list) {  in snd_hdac_bus_handle_stream_irq()
689 				ack(bus, azx_dev);  in snd_hdac_bus_handle_stream_irq()
703 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus)  in snd_hdac_bus_alloc_stream_pages()  argument
707 	int dma_type = bus->dma_type ? bus->dma_type : SNDRV_DMA_TYPE_DEV;  in snd_hdac_bus_alloc_stream_pages()
710 	list_for_each_entry(s, &bus->stream_list, list) {  in snd_hdac_bus_alloc_stream_pages()
712 		err = snd_dma_alloc_pages(dma_type, bus->dev,  in snd_hdac_bus_alloc_stream_pages()
722 	err = snd_dma_alloc_pages(dma_type, bus->dev,  in snd_hdac_bus_alloc_stream_pages()
723 				  num_streams * 8, &bus->posbuf);  in snd_hdac_bus_alloc_stream_pages()
726 	list_for_each_entry(s, &bus->stream_list, list)  in snd_hdac_bus_alloc_stream_pages()
727 		s->posbuf = (__le32 *)(bus->posbuf.area + s->index * 8);  in snd_hdac_bus_alloc_stream_pages()
730 	return snd_dma_alloc_pages(dma_type, bus->dev, PAGE_SIZE, &bus->rb);  in snd_hdac_bus_alloc_stream_pages()
738 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus)  in snd_hdac_bus_free_stream_pages()  argument
742 	list_for_each_entry(s, &bus->stream_list, list) {  in snd_hdac_bus_free_stream_pages()
747 	if (bus->rb.area)  in snd_hdac_bus_free_stream_pages()
748 		snd_dma_free_pages(&bus->rb);  in snd_hdac_bus_free_stream_pages()
749 	if (bus->posbuf.area)  in snd_hdac_bus_free_stream_pages()
750 		snd_dma_free_pages(&bus->posbuf);  in snd_hdac_bus_free_stream_pages()
762 		set_bit(codec->addr, &codec->bus->codec_powered);  in snd_hdac_bus_link_power()
764 		clear_bit(codec->addr, &codec->bus->codec_powered);  in snd_hdac_bus_link_power()