4  * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
33 /* Defines for Nvidia Tegra HDA support */
104 static void hda_tegra_init(struct hda_tegra *hda)  in hda_tegra_init()  argument
109 	v = readl(hda->regs + HDA_IPFS_CONFIG);  in hda_tegra_init()
111 	writel(v, hda->regs + HDA_IPFS_CONFIG);  in hda_tegra_init()
114 	v = readl(hda->regs + HDA_CFG_CMD);  in hda_tegra_init()
118 	writel(v, hda->regs + HDA_CFG_CMD);  in hda_tegra_init()
120 	writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);  in hda_tegra_init()
121 	writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);  in hda_tegra_init()
122 	writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);  in hda_tegra_init()
124 	v = readl(hda->regs + HDA_IPFS_INTR_MASK);  in hda_tegra_init()
126 	writel(v, hda->regs + HDA_IPFS_INTR_MASK);  in hda_tegra_init()
162 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);  in hda_tegra_runtime_suspend()  local
172 	clk_bulk_disable_unprepare(hda->nclocks, hda->clocks);  in hda_tegra_runtime_suspend()
181 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);  in hda_tegra_runtime_resume()  local
185 		rc = reset_control_bulk_assert(hda->nresets, hda->resets);  in hda_tegra_runtime_resume()
190 	rc = clk_bulk_prepare_enable(hda->nclocks, hda->clocks);  in hda_tegra_runtime_resume()
194 		if (hda->soc->requires_init)  in hda_tegra_runtime_resume()
195 			hda_tegra_init(hda);  in hda_tegra_runtime_resume()
204 		rc = reset_control_bulk_deassert(hda->nresets, hda->resets);  in hda_tegra_runtime_resume()
231 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);  in hda_tegra_dev_free()  local
233 	cancel_work_sync(&hda->probe_work);  in hda_tegra_dev_free()
248 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);  in hda_tegra_init_chip()  local
252 	hda->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in hda_tegra_init_chip()
253 	if (IS_ERR(hda->regs))  in hda_tegra_init_chip()
254 		return PTR_ERR(hda->regs);  in hda_tegra_init_chip()
256 	bus->remap_addr = hda->regs + HDA_BAR0;  in hda_tegra_init_chip()
259 	if (hda->soc->requires_init)  in hda_tegra_init_chip()
260 		hda_tegra_init(hda);  in hda_tegra_init_chip()
267 	struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);  in hda_tegra_first_init()  local
273 	const char *sname, *drv_name = "tegra-hda";  in hda_tegra_first_init()
304 	if (of_device_is_compatible(np, "nvidia,tegra194-hda")) {  in hda_tegra_first_init()
310 		val = readl(hda->regs + FPCI_DBG_CFG_2) & ~FPCI_GCAP_NSDO_MASK;  in hda_tegra_first_init()
312 		writel(val, hda->regs + FPCI_DBG_CFG_2);  in hda_tegra_first_init()
333 	if (!hda->soc->input_stream)  in hda_tegra_first_init()
377 	if (of_device_is_compatible(np, "nvidia,tegra30-hda"))  in hda_tegra_first_init()
412 			    struct hda_tegra *hda)  in hda_tegra_create()  argument
421 	chip = &hda->chip;  in hda_tegra_create()
436 	INIT_WORK(&hda->probe_work, hda_tegra_probe_work);  in hda_tegra_create()
447 	 * HDA power domain and clocks are always on for Tegra264 and  in hda_tegra_create()
451 	if (!hda->soc->always_on) {  in hda_tegra_create()
502 	{ .compatible = "nvidia,tegra30-hda", .data = &tegra30_data },
503 	{ .compatible = "nvidia,tegra194-hda", .data = &tegra194_data },
504 	{ .compatible = "nvidia,tegra234-hda", .data = &tegra234_data },
505 	{ .compatible = "nvidia,tegra264-hda", .data = &tegra264_data },
517 	struct hda_tegra *hda;  in hda_tegra_probe()  local
520 	hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);  in hda_tegra_probe()
521 	if (!hda)  in hda_tegra_probe()
523 	hda->dev = &pdev->dev;  in hda_tegra_probe()
524 	chip = &hda->chip;  in hda_tegra_probe()
526 	hda->soc = of_device_get_match_data(&pdev->dev);  in hda_tegra_probe()
535 	hda->resets[hda->nresets++].id = "hda";  in hda_tegra_probe()
541 	if (hda->soc->has_hda2hdmi)  in hda_tegra_probe()
542 		hda->resets[hda->nresets++].id = "hda2hdmi";  in hda_tegra_probe()
549 	if (hda->soc->has_hda2codec_2x_reset)  in hda_tegra_probe()
550 		hda->resets[hda->nresets++].id = "hda2codec_2x";  in hda_tegra_probe()
552 	err = devm_reset_control_bulk_get_exclusive(&pdev->dev, hda->nresets,  in hda_tegra_probe()
553 						    hda->resets);  in hda_tegra_probe()
557 	hda->clocks[hda->nclocks++].id = "hda";  in hda_tegra_probe()
558 	if (hda->soc->has_hda2hdmi)  in hda_tegra_probe()
559 		hda->clocks[hda->nclocks++].id = "hda2hdmi";  in hda_tegra_probe()
561 	if (hda->soc->has_hda2codec_2x)  in hda_tegra_probe()
562 		hda->clocks[hda->nclocks++].id = "hda2codec_2x";  in hda_tegra_probe()
564 	err = devm_clk_bulk_get(&pdev->dev, hda->nclocks, hda->clocks);  in hda_tegra_probe()
568 	err = hda_tegra_create(card, driver_flags, hda);  in hda_tegra_probe()
575 	pm_runtime_enable(hda->dev);  in hda_tegra_probe()
577 		pm_runtime_forbid(hda->dev);  in hda_tegra_probe()
579 	schedule_work(&hda->probe_work);  in hda_tegra_probe()
590 	struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);  in hda_tegra_probe_work()  local
591 	struct azx *chip = &hda->chip;  in hda_tegra_probe_work()
592 	struct platform_device *pdev = to_platform_device(hda->dev);  in hda_tegra_probe_work()
595 	pm_runtime_get_sync(hda->dev);  in hda_tegra_probe_work()
617 	pm_runtime_put(hda->dev);  in hda_tegra_probe_work()
641 		.name = "tegra-hda",
651 MODULE_DESCRIPTION("Tegra HDA bus driver");