Lines Matching +full:0 +full:x57
15 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx);
16 val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0);
31 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx);
32 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val);
63 /* a special bypass for COEF 0; read the cached value at the second time */
69 spec->coef0 = alc_read_coef_idx(codec, 0);
106 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
133 snd_hda_codec_write(codec, codec->core.afg, 0,
135 snd_hda_codec_write(codec, codec->core.afg, 0,
153 alc_fixup_gpio(codec, action, 0x01);
160 alc_fixup_gpio(codec, action, 0x02);
167 alc_fixup_gpio(codec, action, 0x03);
174 alc_fixup_gpio(codec, action, 0x04);
197 1 << spec->pll_coef_bit, 0);
226 val = snd_hda_codec_read(codec, jack->nid, 0,
227 AC_VERB_GET_VOLUME_KNOB_CONTROL, 0);
229 uctl->value.integer.value[0] = val;
243 case 0x10ec0262:
244 alc_update_coef_idx(codec, 0x7, 0, 1<<5);
246 case 0x10ec0267:
247 case 0x10ec0268:
248 alc_update_coef_idx(codec, 0x7, 0, 1<<13);
250 case 0x10ec0269:
251 if ((coef & 0x00f0) == 0x0010)
252 alc_update_coef_idx(codec, 0xd, 0, 1<<14);
253 if ((coef & 0x00f0) == 0x0020)
254 alc_update_coef_idx(codec, 0x4, 1<<15, 0);
255 if ((coef & 0x00f0) == 0x0030)
256 alc_update_coef_idx(codec, 0x10, 1<<9, 0);
258 case 0x10ec0280:
259 case 0x10ec0284:
260 case 0x10ec0290:
261 case 0x10ec0292:
262 alc_update_coef_idx(codec, 0x4, 1<<15, 0);
264 case 0x10ec0225:
265 case 0x10ec0295:
266 case 0x10ec0299:
267 alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
269 case 0x10ec0215:
270 case 0x10ec0236:
271 case 0x10ec0245:
272 case 0x10ec0256:
273 case 0x10ec0257:
274 case 0x10ec0285:
275 case 0x10ec0289:
276 alc_update_coef_idx(codec, 0x36, 1<<13, 0);
278 case 0x10ec0230:
279 case 0x10ec0233:
280 case 0x10ec0235:
281 case 0x10ec0255:
282 case 0x19e58326:
283 case 0x10ec0282:
284 case 0x10ec0283:
285 case 0x10ec0286:
286 case 0x10ec0288:
287 case 0x10ec0298:
288 case 0x10ec0300:
289 alc_update_coef_idx(codec, 0x10, 1<<9, 0);
291 case 0x10ec0275:
292 alc_update_coef_idx(codec, 0xe, 0, 1<<0);
294 case 0x10ec0287:
295 alc_update_coef_idx(codec, 0x10, 1<<9, 0);
296 alc_write_coef_idx(codec, 0x8, 0x4ab7);
298 case 0x10ec0293:
299 alc_update_coef_idx(codec, 0xa, 1<<13, 0);
301 case 0x10ec0234:
302 case 0x10ec0274:
303 alc_write_coef_idx(codec, 0x6e, 0x0c25);
305 case 0x10ec0294:
306 case 0x10ec0700:
307 case 0x10ec0701:
308 case 0x10ec0703:
309 case 0x10ec0711:
310 alc_update_coef_idx(codec, 0x10, 1<<15, 0);
312 case 0x10ec0662:
313 if ((coef & 0x00f0) == 0x0030)
314 alc_update_coef_idx(codec, 0x4, 1<<10, 0); /* EAPD Ctrl */
316 case 0x10ec0272:
317 case 0x10ec0273:
318 case 0x10ec0663:
319 case 0x10ec0665:
320 case 0x10ec0670:
321 case 0x10ec0671:
322 case 0x10ec0672:
323 alc_update_coef_idx(codec, 0xd, 0, 1<<14); /* EAPD Ctrl */
325 case 0x10ec0222:
326 case 0x10ec0623:
327 alc_update_coef_idx(codec, 0x19, 1<<13, 0);
329 case 0x10ec0668:
330 alc_update_coef_idx(codec, 0x7, 3<<13, 0);
332 case 0x10ec0867:
333 alc_update_coef_idx(codec, 0x4, 1<<10, 0);
335 case 0x10ec0888:
336 if ((coef & 0x00f0) == 0x0020 || (coef & 0x00f0) == 0x0030)
337 alc_update_coef_idx(codec, 0x7, 1<<5, 0);
339 case 0x10ec0892:
340 case 0x10ec0897:
341 alc_update_coef_idx(codec, 0x7, 1<<5, 0);
343 case 0x10ec0899:
344 case 0x10ec0900:
345 case 0x10ec0b00:
346 case 0x10ec1168:
347 case 0x10ec1220:
348 alc_update_coef_idx(codec, 0x7, 1<<1, 0);
360 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
361 on ? 2 : 0);
369 0x0f, 0x10, 0x14, 0x15, 0x17, 0
377 /* Returns the nid of the external mic input pin, or 0 if it cannot be found. */
386 for (i = 0; i < cfg->num_inputs; i++) {
396 return 0;
415 snd_hda_codec_read(codec, pin->nid, 0,
416 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
431 case 0x10ec0236:
432 case 0x10ec0256:
433 case 0x10ec0257:
434 case 0x19e58326:
435 case 0x10ec0283:
436 case 0x10ec0285:
437 case 0x10ec0286:
438 case 0x10ec0287:
439 case 0x10ec0288:
440 case 0x10ec0295:
441 case 0x10ec0298:
468 switch (alc_get_coef0(codec) & 0x00f0) {
470 case 0x00:
472 case 0x10:
473 alc_update_coef_idx(codec, 7, 0, 0x2030); /* Turn EAPD to High */
486 case 0x10ec0260:
487 alc_update_coefex_idx(codec, 0x1a, 7, 0, 0x2010);
489 case 0x10ec0880:
490 case 0x10ec0882:
491 case 0x10ec0883:
492 case 0x10ec0885:
493 alc_update_coef_idx(codec, 7, 0, 0x2030);
495 case 0x10ec0888:
507 if (spec->gen.autocfg.hp_pins[0])
508 return spec->gen.autocfg.hp_pins[0];
510 return spec->gen.autocfg.line_out_pins[0];
511 return 0;
542 codec->depop_delay = 0;
550 unsigned nid = 0;
564 ass = codec->core.subsystem_id & 0xffff;
568 nid = 0x1d;
569 if (codec->core.vendor_id == 0x10ec0260)
570 nid = 0x17;
574 codec_info(codec, "%s: SKU not ready 0x%08x\n",
580 tmp = 0;
585 if (((ass >> 16) & 0xf) != tmp)
589 spec->cdefine.enable_pcbeep = (ass & 0x100000) >> 20;
590 spec->cdefine.check_sum = (ass >> 16) & 0xf;
594 spec->cdefine.external_amp = (ass & 0x38) >> 3;
595 spec->cdefine.platform_type = (ass & 0x4) >> 2;
596 spec->cdefine.swap = (ass & 0x2) >> 1;
597 spec->cdefine.override = ass & 0x1;
599 codec_dbg(codec, "SKU: Nid=0x%x sku_cfg=0x%08x\n",
601 codec_dbg(codec, "SKU: port_connectivity=0x%x\n",
603 codec_dbg(codec, "SKU: enable_pcbeep=0x%x\n", spec->cdefine.enable_pcbeep);
604 codec_dbg(codec, "SKU: check_sum=0x%08x\n", spec->cdefine.check_sum);
605 codec_dbg(codec, "SKU: customization=0x%08x\n", spec->cdefine.customization);
606 codec_dbg(codec, "SKU: external_amp=0x%x\n", spec->cdefine.external_amp);
607 codec_dbg(codec, "SKU: platform_type=0x%x\n", spec->cdefine.platform_type);
608 codec_dbg(codec, "SKU: swap=0x%x\n", spec->cdefine.swap);
609 codec_dbg(codec, "SKU: override=0x%x\n", spec->cdefine.override);
611 return 0;
619 for (i = 0; i < nums; i++)
627 return find_idx_in_nid_list(nid, list, nums) >= 0;
631 * return 1 if initialized, 0 if invalid SSID
636 * 7 ~ 0 : Assembly ID
648 return 0;
652 ass = codec->core.subsystem_id & 0xffff;
664 * 0 : override
666 nid = 0x1d;
667 if (codec->core.vendor_id == 0x10ec0260)
668 nid = 0x17;
671 "realtek: No valid SSID, checking pincfg 0x%08x for NID 0x%x\n",
674 return 0;
676 return 0;
679 tmp = 0;
684 if (((ass >> 16) & 0xf) != tmp)
685 return 0;
687 codec_dbg(codec, "realtek: Enabling init ASM_ID=0x%04x CODEC_ID=%08x\n",
688 ass & 0xffff, codec->core.vendor_id);
690 * 0 : override
692 * 2 : 0 --> Desktop, 1 --> Laptop
696 tmp = (ass & 0x38) >> 3; /* external Amp control */
700 alc_setup_gpio(codec, 0x01);
703 alc_setup_gpio(codec, 0x02);
706 alc_setup_gpio(codec, 0x04);
718 if (!(ass & 0x8000))
729 tmp = (ass >> 11) & 0x3; /* HP to chassis */
734 spec->gen.autocfg.hp_pins[0] = nid;
770 if (err < 0)
774 return 0;
797 return 0;
827 return 0;
839 hda_call_check_power_status(codec, 0x01);
840 return 0;
862 { 0x10ec0221, 0xf00f, 0x1003, "ALC231" },
863 { 0x10ec0269, 0xfff0, 0x3010, "ALC277" },
864 { 0x10ec0269, 0xf0f0, 0x2010, "ALC259" },
865 { 0x10ec0269, 0xf0f0, 0x3010, "ALC258" },
866 { 0x10ec0269, 0x00f0, 0x0010, "ALC269VB" },
867 { 0x10ec0269, 0xffff, 0xa023, "ALC259" },
868 { 0x10ec0269, 0xffff, 0x6023, "ALC281X" },
869 { 0x10ec0269, 0x00f0, 0x0020, "ALC269VC" },
870 { 0x10ec0269, 0x00f0, 0x0030, "ALC269VD" },
871 { 0x10ec0662, 0xffff, 0x4020, "ALC656" },
872 { 0x10ec0887, 0x00f0, 0x0030, "ALC887-VD" },
873 { 0x10ec0888, 0x00f0, 0x0030, "ALC888-VD" },
874 { 0x10ec0888, 0xf0f0, 0x3020, "ALC886" },
875 { 0x10ec0899, 0x2000, 0x2000, "ALC899" },
876 { 0x10ec0892, 0xffff, 0x8020, "ALC661" },
877 { 0x10ec0892, 0xffff, 0x8011, "ALC661" },
878 { 0x10ec0892, 0xffff, 0x4011, "ALC656" },
883 { 0x10ec0280, 0x1028, 0, "ALC3220" },
884 { 0x10ec0282, 0x1028, 0, "ALC3221" },
885 { 0x10ec0283, 0x1028, 0, "ALC3223" },
886 { 0x10ec0288, 0x1028, 0, "ALC3263" },
887 { 0x10ec0292, 0x1028, 0, "ALC3226" },
888 { 0x10ec0293, 0x1028, 0, "ALC3235" },
889 { 0x10ec0255, 0x1028, 0, "ALC3234" },
890 { 0x10ec0668, 0x1028, 0, "ALC3661" },
891 { 0x10ec0275, 0x1028, 0, "ALC3260" },
892 { 0x10ec0899, 0x1028, 0, "ALC3861" },
893 { 0x10ec0298, 0x1028, 0, "ALC3266" },
894 { 0x10ec0236, 0x1028, 0, "ALC3204" },
895 { 0x10ec0256, 0x1028, 0, "ALC3246" },
896 { 0x10ec0225, 0x1028, 0, "ALC3253" },
897 { 0x10ec0295, 0x1028, 0, "ALC3254" },
898 { 0x10ec0299, 0x1028, 0, "ALC3271" },
899 { 0x10ec0670, 0x1025, 0, "ALC669X" },
900 { 0x10ec0676, 0x1025, 0, "ALC679X" },
901 { 0x10ec0282, 0x1043, 0, "ALC3229" },
902 { 0x10ec0233, 0x1043, 0, "ALC3236" },
903 { 0x10ec0280, 0x103c, 0, "ALC3228" },
904 { 0x10ec0282, 0x103c, 0, "ALC3227" },
905 { 0x10ec0286, 0x103c, 0, "ALC3242" },
906 { 0x10ec0290, 0x103c, 0, "ALC3241" },
907 { 0x10ec0668, 0x103c, 0, "ALC3662" },
908 { 0x10ec0283, 0x17aa, 0, "ALC3239" },
909 { 0x10ec0292, 0x17aa, 0, "ALC3232" },
910 { 0x10ec0257, 0x12f0, 0, "ALC3328" },
927 return 0;
938 return 0;
948 HDA_CODEC_VOLUME("Beep Playback Volume", 0, 0, HDA_INPUT),
949 HDA_CODEC_MUTE_BEEP("Beep Playback Switch", 0, 0, HDA_INPUT),
959 for (i = 0; i < ARRAY_SIZE(alc_beep_mixer); i++) {
966 return 0;
971 SND_PCI_QUIRK(0x1043, 0x103c, "ASUS", 1),
972 SND_PCI_QUIRK(0x1043, 0x115d, "ASUS", 1),
973 SND_PCI_QUIRK(0x1043, 0x829f, "ASUS", 1),
974 SND_PCI_QUIRK(0x1043, 0x8376, "EeePC", 1),
975 SND_PCI_QUIRK(0x1043, 0x83ce, "EeePC", 1),
976 SND_PCI_QUIRK(0x1043, 0x831a, "EeePC", 1),
977 SND_PCI_QUIRK(0x1043, 0x834a, "EeePC", 1),
978 SND_PCI_QUIRK(0x1458, 0xa002, "GA-MA790X", 1),
979 SND_PCI_QUIRK(0x8086, 0xd613, "Intel", 1),
981 SND_PCI_QUIRK(0x17aa, 0x309e, "Lenovo ThinkCentre M73", 0),
982 SND_PCI_QUIRK(0x17aa, 0x30a3, "Lenovo ThinkCentre M93", 0),
1000 /* return 1 if successful, 0 if the proper config is not found,
1013 if (err < 0)
1020 if (err < 0)
1046 if (err < 0) {
1050 return 0;
1070 spec->gen.mixer_nid = 0;
1091 spec->gen.pcm_rec[0]->stream[0].chmap = asus_pcm_2_1_chmaps;
1110 codec->addr == 0 ?
1114 codec->addr == 0 ?
1135 codec->addr == 0 ?
1139 codec->addr == 0 ?
1153 snd_hda_codec_write(codec, hp_pin, 0,
1167 /* mic pin 0x19 must be initialized with Vref Hi-Z, otherwise
1170 snd_hda_codec_set_pin_target(codec, 0x19, PIN_VREFHIZ);
1175 for (i = 0; i < imux->num_items; i++) {
1176 if (spec->gen.imux_pins[i] == 0x12) {
1177 spec->gen.cur_mux[0] = i;
1192 if (delay <= 0)
1194 snd_hda_codec_write(codec, 0x21, 0,
1197 snd_hda_codec_write(codec, 0x21, 0,
1198 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
1204 if (delay <= 0)
1206 snd_hda_codec_write(codec, 0x21, 0,
1209 snd_hda_codec_write(codec, 0x21, 0,
1215 UPDATE_COEF(0x4a, 1<<8, 0),
1216 UPDATE_COEFEX(0x57, 0x05, 1<<14, 0),
1217 UPDATE_COEF(0x63, 3<<14, 3<<14),
1218 UPDATE_COEF(0x4a, 3<<4, 2<<4),
1219 UPDATE_COEF(0x4a, 3<<10, 3<<10),
1220 UPDATE_COEF(0x45, 0x3f<<10, 0x34<<10),
1221 UPDATE_COEF(0x4a, 3<<10, 0),
1229 WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
1230 WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
1231 UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
1232 WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
1233 WRITE_COEFEX(0x57, 0x03, 0x8aa6), /* Direct Drive HP Amp control */
1237 WRITE_COEF(0x1b, 0x0c4b), /* LDO and MISC control */
1238 WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
1239 WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
1240 WRITE_COEFEX(0x57, 0x03, 0x09a3), /* Direct Drive HP Amp control */
1241 UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
1245 WRITE_COEF(0x1b, 0x0c0b),
1246 WRITE_COEF(0x45, 0xc429),
1247 UPDATE_COEF(0x35, 0x4000, 0),
1248 WRITE_COEF(0x06, 0x2104),
1249 WRITE_COEF(0x1a, 0x0001),
1250 WRITE_COEF(0x26, 0x0004),
1251 WRITE_COEF(0x32, 0x42a3),
1255 UPDATE_COEF(0x4f, 0xfcc0, 0xc400),
1256 UPDATE_COEF(0x50, 0x2000, 0x2000),
1257 UPDATE_COEF(0x56, 0x0006, 0x0006),
1258 UPDATE_COEF(0x66, 0x0008, 0),
1259 UPDATE_COEF(0x67, 0x2000, 0),
1263 UPDATE_COEF(0x19, 0x1300, 0x0300),
1267 WRITE_COEF(0x76, 0x000e),
1268 WRITE_COEF(0x6c, 0x2400),
1269 WRITE_COEF(0x18, 0x7308),
1270 WRITE_COEF(0x6b, 0xc429),
1274 UPDATE_COEF(0x10, 7<<8, 6<<8), /* SET Line1 JD to 0 */
1275 UPDATE_COEFEX(0x57, 0x05, 1<<15|1<<13, 0x0), /* SET charge pump by verb */
1276 UPDATE_COEFEX(0x57, 0x03, 1<<10, 1<<10), /* SET EN_OSW to 1 */
1277 UPDATE_COEF(0x1a, 1<<3, 1<<3), /* Combo JD gating with LINE1-VREFO */
1278 WRITE_COEF(0x45, 0xc429), /* Set to TRS type */
1279 UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
1283 WRITE_COEF(0x15, 0x0d40),
1284 WRITE_COEF(0xb7, 0x802b),
1288 UPDATE_COEF(0x63, 3<<14, 0),
1292 UPDATE_COEF(0x4a, 0x0100, 0),
1293 UPDATE_COEFEX(0x57, 0x05, 0x4000, 0),
1294 UPDATE_COEF(0x6b, 0xf000, 0x5000),
1295 UPDATE_COEF(0x4a, 0x0010, 0),
1296 UPDATE_COEF(0x4a, 0x0c00, 0x0c00),
1297 WRITE_COEF(0x45, 0x5289),
1298 UPDATE_COEF(0x4a, 0x0c00, 0),
1303 alc_update_coef_idx(codec, 0x45, 0xf<<12 | 1<<10, 5<<12);
1308 case 0x10ec0255:
1311 case 0x10ec0230:
1312 case 0x10ec0236:
1313 case 0x10ec0256:
1314 case 0x19e58326:
1318 case 0x10ec0234:
1319 case 0x10ec0274:
1320 case 0x10ec0294:
1323 case 0x10ec0233:
1324 case 0x10ec0283:
1327 case 0x10ec0286:
1328 case 0x10ec0288:
1331 case 0x10ec0298:
1335 case 0x10ec0292:
1338 case 0x10ec0293:
1341 case 0x10ec0668:
1344 case 0x10ec0215:
1345 case 0x10ec0225:
1346 case 0x10ec0285:
1347 case 0x10ec0295:
1348 case 0x10ec0289:
1349 case 0x10ec0299:
1354 case 0x10ec0867:
1355 alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
1366 WRITE_COEFEX(0x57, 0x03, 0x8aa6),
1367 WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
1371 UPDATE_COEFEX(0x57, 0x05, 1<<14, 1<<14), /* Direct Drive HP Amp control(Set to verb control)*/
1372 WRITE_COEFEX(0x57, 0x03, 0x09a3),
1373 WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
1377 UPDATE_COEF(0x35, 0, 1<<14),
1378 WRITE_COEF(0x06, 0x2100),
1379 WRITE_COEF(0x1a, 0x0021),
1380 WRITE_COEF(0x26, 0x008c),
1384 UPDATE_COEF(0x4f, 0x00c0, 0),
1385 UPDATE_COEF(0x50, 0x2000, 0),
1386 UPDATE_COEF(0x56, 0x0006, 0),
1387 UPDATE_COEF(0x4f, 0xfcc0, 0xc400),
1388 UPDATE_COEF(0x66, 0x0008, 0x0008),
1389 UPDATE_COEF(0x67, 0x2000, 0x2000),
1393 WRITE_COEF(0x19, 0xa208),
1394 WRITE_COEF(0x2e, 0xacf0),
1398 UPDATE_COEFEX(0x57, 0x05, 0, 1<<15|1<<13), /* SET charge pump by verb */
1399 UPDATE_COEFEX(0x57, 0x03, 1<<10, 0), /* SET EN_OSW to 0 */
1400 UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
1404 WRITE_COEF(0xb7, 0x802b),
1405 WRITE_COEF(0xb5, 0x1040),
1406 UPDATE_COEF(0xc3, 0, 1<<12),
1410 UPDATE_COEFEX(0x57, 0x05, 1<<14, 1<<14),
1411 UPDATE_COEF(0x4a, 3<<4, 2<<4),
1412 UPDATE_COEF(0x63, 3<<14, 0),
1416 UPDATE_COEFEX(0x57, 0x05, 0x4000, 0x4000),
1417 UPDATE_COEF(0x4a, 0x0010, 0),
1418 UPDATE_COEF(0x6b, 0xf000, 0),
1423 case 0x10ec0255:
1424 alc_write_coef_idx(codec, 0x45, 0xc489);
1425 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1429 case 0x10ec0230:
1430 case 0x10ec0236:
1431 case 0x10ec0256:
1432 case 0x19e58326:
1433 alc_write_coef_idx(codec, 0x45, 0xc489);
1434 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1438 case 0x10ec0234:
1439 case 0x10ec0274:
1440 case 0x10ec0294:
1441 alc_write_coef_idx(codec, 0x45, 0x4689);
1442 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1446 case 0x10ec0233:
1447 case 0x10ec0283:
1448 alc_write_coef_idx(codec, 0x45, 0xc429);
1449 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1453 case 0x10ec0286:
1454 case 0x10ec0288:
1455 case 0x10ec0298:
1456 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1460 case 0x10ec0292:
1461 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1464 case 0x10ec0293:
1466 alc_write_coef_idx(codec, 0x45, 0xc429);
1467 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1471 case 0x10ec0867:
1472 alc_update_coefex_idx(codec, 0x57, 0x5, 0, 1<<14);
1474 case 0x10ec0221:
1475 case 0x10ec0662:
1476 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1479 case 0x10ec0668:
1480 alc_write_coef_idx(codec, 0x11, 0x0001);
1481 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1485 case 0x10ec0215:
1486 case 0x10ec0225:
1487 case 0x10ec0285:
1488 case 0x10ec0295:
1489 case 0x10ec0289:
1490 case 0x10ec0299:
1492 alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x31<<10);
1493 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
1504 UPDATE_COEF(0x45, 0x3f<<10, 0x30<<10),
1505 UPDATE_COEF(0x45, 0x3f<<10, 0x31<<10),
1506 UPDATE_COEF(0x49, 3<<8, 0<<8),
1507 UPDATE_COEF(0x4a, 3<<4, 3<<4),
1508 UPDATE_COEF(0x63, 3<<14, 0),
1509 UPDATE_COEF(0x67, 0xf000, 0x3000),
1513 WRITE_COEF(0x45, 0xc089),
1514 WRITE_COEF(0x45, 0xc489),
1515 WRITE_COEFEX(0x57, 0x03, 0x8ea6),
1516 WRITE_COEF(0x49, 0x0049),
1520 WRITE_COEF(0x45, 0xc489),
1521 WRITE_COEFEX(0x57, 0x03, 0x0da3),
1522 WRITE_COEF(0x49, 0x0049),
1523 UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
1524 WRITE_COEF(0x06, 0x6100),
1528 WRITE_COEF(0x06, 0x2100),
1529 WRITE_COEF(0x32, 0x4ea3),
1533 UPDATE_COEF(0x4f, 0xfcc0, 0xc400), /* Set to TRS type */
1534 UPDATE_COEF(0x50, 0x2000, 0x2000),
1535 UPDATE_COEF(0x56, 0x0006, 0x0006),
1536 UPDATE_COEF(0x66, 0x0008, 0),
1537 UPDATE_COEF(0x67, 0x2000, 0),
1541 WRITE_COEF(0x76, 0x000e),
1542 WRITE_COEF(0x6c, 0x2400),
1543 WRITE_COEF(0x6b, 0xc429),
1544 WRITE_COEF(0x18, 0x7308),
1548 UPDATE_COEF(0x4a, 0x000f, 0x000e), /* Combo Jack auto detect */
1549 WRITE_COEF(0x45, 0xC429), /* Set to TRS type */
1550 UPDATE_COEF(0x1a, 1<<3, 0), /* Combo JD gating without LINE1-VREFO */
1554 WRITE_COEF(0x11, 0x0041),
1555 WRITE_COEF(0x15, 0x0d40),
1556 WRITE_COEF(0xb7, 0x802b),
1560 WRITE_COEF(0x45, 0x4289),
1561 UPDATE_COEF(0x4a, 0x0010, 0x0010),
1562 UPDATE_COEF(0x6b, 0x0f00, 0),
1563 UPDATE_COEF(0x49, 0x0300, 0x0300),
1568 case 0x10ec0215:
1569 case 0x10ec0225:
1570 case 0x10ec0285:
1571 case 0x10ec0295:
1572 case 0x10ec0289:
1573 case 0x10ec0299:
1578 case 0x10ec0255:
1581 case 0x10ec0230:
1582 case 0x10ec0236:
1583 case 0x10ec0256:
1584 case 0x19e58326:
1585 alc_write_coef_idx(codec, 0x1b, 0x0e4b);
1586 alc_write_coef_idx(codec, 0x45, 0xc089);
1591 case 0x10ec0234:
1592 case 0x10ec0274:
1593 case 0x10ec0294:
1596 case 0x10ec0233:
1597 case 0x10ec0283:
1600 case 0x10ec0286:
1601 case 0x10ec0288:
1602 case 0x10ec0298:
1605 case 0x10ec0292:
1608 case 0x10ec0293:
1611 case 0x10ec0668:
1614 case 0x10ec0867:
1615 alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
1627 WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
1628 WRITE_COEF(0x1b, 0x0c2b),
1629 WRITE_COEFEX(0x57, 0x03, 0x8ea6),
1633 WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
1634 WRITE_COEF(0x1b, 0x0e6b),
1638 WRITE_COEF(0x45, 0xd429),
1639 WRITE_COEF(0x1b, 0x0c2b),
1640 WRITE_COEF(0x32, 0x4ea3),
1644 UPDATE_COEF(0x50, 0x2000, 0x2000),
1645 UPDATE_COEF(0x56, 0x0006, 0x0006),
1646 UPDATE_COEF(0x66, 0x0008, 0),
1647 UPDATE_COEF(0x67, 0x2000, 0),
1651 WRITE_COEF(0x6b, 0xd429),
1652 WRITE_COEF(0x76, 0x0008),
1653 WRITE_COEF(0x18, 0x7388),
1657 WRITE_COEF(0x45, 0xd429), /* Set to ctia type */
1658 UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
1662 WRITE_COEF(0x11, 0x0001),
1663 WRITE_COEF(0x15, 0x0d60),
1664 WRITE_COEF(0xc3, 0x0000),
1668 UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10),
1669 UPDATE_COEF(0x63, 3<<14, 2<<14),
1673 UPDATE_COEF(0x45, 0x3f<<10, 0x35<<10),
1674 UPDATE_COEF(0x63, 3<<14, 1<<14),
1679 case 0x10ec0255:
1682 case 0x10ec0230:
1683 case 0x10ec0236:
1684 case 0x10ec0256:
1685 case 0x19e58326:
1689 case 0x10ec0234:
1690 case 0x10ec0274:
1691 case 0x10ec0294:
1692 alc_write_coef_idx(codec, 0x45, 0xd689);
1694 case 0x10ec0233:
1695 case 0x10ec0283:
1698 case 0x10ec0298:
1699 val = alc_read_coef_idx(codec, 0x50);
1701 alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020);
1702 alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
1705 alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);
1706 alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
1710 case 0x10ec0286:
1711 case 0x10ec0288:
1712 alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xd400);
1716 case 0x10ec0292:
1719 case 0x10ec0293:
1722 case 0x10ec0668:
1725 case 0x10ec0215:
1726 case 0x10ec0225:
1727 case 0x10ec0285:
1728 case 0x10ec0295:
1729 case 0x10ec0289:
1730 case 0x10ec0299:
1731 val = alc_read_coef_idx(codec, 0x45);
1738 case 0x10ec0867:
1739 alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
1749 WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
1750 WRITE_COEF(0x1b, 0x0c2b),
1751 WRITE_COEFEX(0x57, 0x03, 0x8ea6),
1755 WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
1756 WRITE_COEF(0x1b, 0x0e6b),
1760 WRITE_COEF(0x45, 0xe429),
1761 WRITE_COEF(0x1b, 0x0c2b),
1762 WRITE_COEF(0x32, 0x4ea3),
1766 UPDATE_COEF(0x50, 0x2000, 0x2000),
1767 UPDATE_COEF(0x56, 0x0006, 0x0006),
1768 UPDATE_COEF(0x66, 0x0008, 0),
1769 UPDATE_COEF(0x67, 0x2000, 0),
1773 WRITE_COEF(0x6b, 0xe429),
1774 WRITE_COEF(0x76, 0x0008),
1775 WRITE_COEF(0x18, 0x7388),
1779 WRITE_COEF(0x45, 0xe429), /* Set to omtp type */
1780 UPDATE_COEF(0x10, 7<<8, 7<<8), /* SET Line1 JD to 1 */
1784 WRITE_COEF(0x11, 0x0001),
1785 WRITE_COEF(0x15, 0x0d50),
1786 WRITE_COEF(0xc3, 0x0000),
1790 UPDATE_COEF(0x45, 0x3f<<10, 0x39<<10),
1791 UPDATE_COEF(0x63, 3<<14, 2<<14),
1796 case 0x10ec0255:
1799 case 0x10ec0230:
1800 case 0x10ec0236:
1801 case 0x10ec0256:
1802 case 0x19e58326:
1806 case 0x10ec0234:
1807 case 0x10ec0274:
1808 case 0x10ec0294:
1809 alc_write_coef_idx(codec, 0x45, 0xe689);
1811 case 0x10ec0233:
1812 case 0x10ec0283:
1815 case 0x10ec0298:
1816 alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);/* Headset output enable */
1817 alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400);
1820 case 0x10ec0286:
1821 case 0x10ec0288:
1822 alc_update_coef_idx(codec, 0x4f, 0xfcc0, 0xe400);
1826 case 0x10ec0292:
1829 case 0x10ec0293:
1832 case 0x10ec0668:
1835 case 0x10ec0215:
1836 case 0x10ec0225:
1837 case 0x10ec0285:
1838 case 0x10ec0295:
1839 case 0x10ec0289:
1840 case 0x10ec0299:
1854 WRITE_COEF(0x45, 0xd089), /* combo jack auto switch control(Check type)*/
1855 WRITE_COEF(0x49, 0x0149), /* combo jack auto switch control(Vref
1860 UPDATE_COEF(0x4f, 0xfcc0, 0xd400), /* Check Type */
1864 UPDATE_COEF(0x50, 0x2000, 0x2000),
1865 UPDATE_COEF(0x56, 0x0006, 0x0006),
1866 UPDATE_COEF(0x66, 0x0008, 0),
1867 UPDATE_COEF(0x67, 0x2000, 0),
1868 UPDATE_COEF(0x19, 0x1300, 0x1300),
1872 UPDATE_COEF(0x4a, 0x000f, 0x0008), /* Combo Jack auto detect */
1873 WRITE_COEF(0x45, 0xD429), /* Set to ctia type */
1877 WRITE_COEF(0x11, 0x0001),
1878 WRITE_COEF(0xb7, 0x802b),
1879 WRITE_COEF(0x15, 0x0d60),
1880 WRITE_COEF(0xc3, 0x0c00),
1884 UPDATE_COEF(0x4a, 0x0010, 0),
1885 UPDATE_COEF(0x4a, 0x8000, 0),
1886 WRITE_COEF(0x45, 0xd289),
1887 UPDATE_COEF(0x49, 0x0300, 0x0300),
1892 alc_update_coef_idx(codec, 0x45, 0xf<<12 | 1<<10, 5<<12);
1897 case 0x10ec0255:
1900 val = alc_read_coef_idx(codec, 0x46);
1901 is_ctia = (val & 0x0070) == 0x0070;
1903 case 0x10ec0230:
1904 case 0x10ec0236:
1905 case 0x10ec0256:
1906 case 0x19e58326:
1907 alc_write_coef_idx(codec, 0x1b, 0x0e4b);
1908 alc_write_coef_idx(codec, 0x06, 0x6104);
1909 alc_write_coefex_idx(codec, 0x57, 0x3, 0x09a3);
1913 val = alc_read_coef_idx(codec, 0x46);
1914 is_ctia = (val & 0x0070) == 0x0070;
1916 alc_write_coef_idx(codec, 0x45, 0xe089);
1918 val = alc_read_coef_idx(codec, 0x46);
1919 if ((val & 0x0070) == 0x0070)
1924 alc_write_coefex_idx(codec, 0x57, 0x3, 0x0da3);
1925 alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
1927 case 0x10ec0234:
1928 case 0x10ec0274:
1929 case 0x10ec0294:
1932 val = alc_read_coef_idx(codec, 0x46);
1933 is_ctia = (val & 0x00f0) == 0x00f0;
1935 case 0x10ec0233:
1936 case 0x10ec0283:
1937 alc_write_coef_idx(codec, 0x45, 0xd029);
1939 val = alc_read_coef_idx(codec, 0x46);
1940 is_ctia = (val & 0x0070) == 0x0070;
1942 case 0x10ec0298:
1943 snd_hda_codec_write(codec, 0x21, 0,
1946 snd_hda_codec_write(codec, 0x21, 0,
1947 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
1950 val = alc_read_coef_idx(codec, 0x50);
1952 alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0020);
1955 val = alc_read_coef_idx(codec, 0x50);
1956 is_ctia = (val & 0x0070) == 0x0070;
1958 alc_update_coef_idx(codec, 0x8e, 0x0070, 0x0010);
1961 val = alc_read_coef_idx(codec, 0x50);
1962 is_ctia = (val & 0x0070) == 0x0070;
1965 snd_hda_codec_write(codec, 0x21, 0,
1968 snd_hda_codec_write(codec, 0x21, 0,
1971 case 0x10ec0286:
1972 case 0x10ec0288:
1975 val = alc_read_coef_idx(codec, 0x50);
1976 is_ctia = (val & 0x0070) == 0x0070;
1978 case 0x10ec0292:
1979 alc_write_coef_idx(codec, 0x6b, 0xd429);
1981 val = alc_read_coef_idx(codec, 0x6c);
1982 is_ctia = (val & 0x001c) == 0x001c;
1984 case 0x10ec0293:
1987 val = alc_read_coef_idx(codec, 0x46);
1988 is_ctia = (val & 0x0070) == 0x0070;
1990 case 0x10ec0668:
1993 val = alc_read_coef_idx(codec, 0xbe);
1994 is_ctia = (val & 0x1c02) == 0x1c02;
1996 case 0x10ec0215:
1997 case 0x10ec0225:
1998 case 0x10ec0285:
1999 case 0x10ec0295:
2000 case 0x10ec0289:
2001 case 0x10ec0299:
2003 alc_update_coef_idx(codec, 0x67, 0xf000, 0x1000);
2004 val = alc_read_coef_idx(codec, 0x45);
2006 alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10);
2007 alc_update_coef_idx(codec, 0x49, 3<<8, 2<<8);
2009 val = alc_read_coef_idx(codec, 0x46);
2010 is_ctia = (val & 0x00f0) == 0x00f0;
2012 alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x34<<10);
2013 alc_update_coef_idx(codec, 0x49, 3<<8, 1<<8);
2015 val = alc_read_coef_idx(codec, 0x46);
2016 is_ctia = (val & 0x00f0) == 0x00f0;
2019 alc_update_coef_idx(codec, 0x45, 0x3f<<10, 0x38<<10);
2020 alc_update_coef_idx(codec, 0x49, 3<<8, 1<<8);
2022 val = alc_read_coef_idx(codec, 0x46);
2023 if ((val & 0x00f0) == 0x00f0)
2028 alc_update_coef_idx(codec, 0x4a, 7<<6, 7<<6);
2029 alc_update_coef_idx(codec, 0x4a, 3<<4, 3<<4);
2030 alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
2032 case 0x10ec0867:
2046 hda_nid_t mux_pin = spec->gen.imux_pins[spec->gen.cur_mux[0]];
2124 for (i = 0; i < cfg->num_inputs; i++) {
2201 return 0;
2213 return 0;
2254 spec->gen.mixer_nid = 0;