46 #define CS_DIG_OUT1_PIN_NID	0x10
47 #define CS_DIG_OUT2_PIN_NID	0x15
48 #define CS_DMIC1_PIN_NID	0x0e
49 #define CS_DMIC2_PIN_NID	0x12
52 #define IDX_SPDIF_STAT		0x0000
53 #define IDX_SPDIF_CTL		0x0001
54 #define IDX_ADC_CFG		0x0002
56  * 0 = immediate,
61 #define   CS_COEF_ADC_SZC_MASK		(3 << 0)
62 #define   CS_COEF_ADC_MIC_SZC_MODE	(3 << 0) /* SZC setup for mic */
63 #define   CS_COEF_ADC_LI_SZC_MODE	(3 << 0) /* SZC setup for line-in */
64 /* PGA mode: 0 = differential, 1 = signle-ended */
67 #define IDX_DAC_CFG		0x0003
69  * 0 = Immediate
74 #define   CS_COEF_DAC_HP_SZC_MODE	(3 << 0) /* nid 0x02 */
75 #define   CS_COEF_DAC_LO_SZC_MODE	(3 << 2) /* nid 0x03 */
76 #define   CS_COEF_DAC_SPK_SZC_MODE	(3 << 4) /* nid 0x04 */
78 #define IDX_BEEP_CFG		0x0004
79 /* 0x0008 - test reg key */
80 /* 0x0009 - 0x0014 -> 12 test regs */
81 /* 0x0015 - visibility reg */
90 #define CS4210_DAC_NID		0x02
91 #define CS4210_ADC_NID		0x03
92 #define CS4210_VENDOR_NID	0x0B
93 #define CS421X_DMIC_PIN_NID	0x09 /* Port E */
94 #define CS421X_SPDIF_PIN_NID	0x0A /* Port H */
96 #define CS421X_IDX_DEV_CFG	0x01
97 #define CS421X_IDX_ADC_CFG	0x02
98 #define CS421X_IDX_DAC_CFG	0x03
99 #define CS421X_IDX_SPK_CTL	0x04
102 #define CS4213_VENDOR_NID	0x09
109 	snd_hda_codec_write(codec, spec->vendor_nid, 0,  in cs_vendor_coef_get()
111 	return snd_hda_codec_read(codec, spec->vendor_nid, 0,  in cs_vendor_coef_get()
112 				  AC_VERB_GET_PROC_COEF, 0);  in cs_vendor_coef_get()
120 	snd_hda_codec_write(codec, spec->vendor_nid, 0,  in cs_vendor_coef_set()
122 	snd_hda_codec_write(codec, spec->vendor_nid, 0,  in cs_vendor_coef_set()
148 		snd_hda_codec_write(codec, 0x01, 0,  in cs_automute()
193 	SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
200 	{ 0x05, 0x0321401f },
201 	{ 0x06, 0x90170010 },
202 	{ 0x07, 0x03813031 },
203 	{ 0x08, 0xb7a70037 },
204 	{ 0x09, 0xb7a6003e },
205 	{ 0x0a, 0x034510f0 },
211 	{ 0x05, 0x022120f0 },
212 	{ 0x06, 0x901700f0 },
213 	{ 0x07, 0x02a120f0 },
214 	{ 0x08, 0x77a70037 },
215 	{ 0x09, 0x77a6003e },
216 	{ 0x0a, 0x434510f0 },
248 	{0x0B, AC_VERB_SET_PROC_STATE, 1},
249 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
252 	 *  PDREF=0
254 	{0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
256 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
258 	{0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
260 	{0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
261 	{0x0B, AC_VERB_SET_PROC_COEF,
262 	 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
263 	  | 0x0004 /* Mute DAC on FIFO error */
264 	  | 0x0008 /* Enable DAC High Pass Filter */
285 	{0x0B, AC_VERB_SET_PROC_STATE, 0x01},  /* VPW: processing on */
287 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
288 	{0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
290 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
291 	{0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
293 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
294 	{0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
296 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
297 	{0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
299 	{0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
300 	{0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
306 static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
313 	uinfo->value.integer.min = 0;  in cs421x_boost_vol_info()
315 	return 0;  in cs421x_boost_vol_info()
323 	ucontrol->value.integer.value[0] =  in cs421x_boost_vol_get()
324 		cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;  in cs421x_boost_vol_get()
325 	return 0;  in cs421x_boost_vol_get()
333 	unsigned int vol = ucontrol->value.integer.value[0];  in cs421x_boost_vol_put()
338 	coef &= ~0x0003;  in cs421x_boost_vol_put()
339 	coef |= (vol & 0x0003);  in cs421x_boost_vol_put()
345 	return 0;  in cs421x_boost_vol_put()
369 		coef |= 0x0008; /* B1,B2 are GPIOs */  in cs4210_pinmux_init()
371 		coef &= ~0x0008;  in cs4210_pinmux_init()
374 		coef |= 0x0010; /* B2 is SENSE_B, not inverted  */  in cs4210_pinmux_init()
376 		coef &= ~0x0010;  in cs4210_pinmux_init()
398 	hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];  in cs4210_spdif_automute()
411 	snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);  in cs4210_spdif_automute()
422 	for (i = 0; i < cfg->dig_outs; i++) {  in parse_cs421x_digital()
446 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,  in cs421x_init()
448 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,  in cs421x_init()
450 		snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,  in cs421x_init()
456 	return 0;  in cs421x_init()
463 	/* set the upper-limit for mixer amp to 0dB */  in fix_volume_caps()
465 	caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);  in fix_volume_caps()
466 	caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)  in fix_volume_caps()
479 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);  in cs421x_parse_auto_config()
480 	if (err < 0)  in cs421x_parse_auto_config()
484 	if (err < 0)  in cs421x_parse_auto_config()
496 	return 0;  in cs421x_parse_auto_config()
510 	snd_hda_codec_write(codec, CS4210_DAC_NID, 0,  in cs421x_suspend()
512 	snd_hda_codec_write(codec, CS4210_ADC_NID, 0,  in cs421x_suspend()
517 		coef |= 0x0004; /* PDREF */  in cs421x_suspend()
521 	return 0;  in cs421x_suspend()
549 	if (err < 0)  in cs421x_probe()
554 	return 0;  in cs421x_probe()
576 	HDA_CODEC_ID_MODEL(0x10134210, "CS4210", CS4210_VENDOR_NID),
577 	HDA_CODEC_ID_MODEL(0x10134213, "CS4213", CS4213_VENDOR_NID),