Lines Matching +full:0 +full:x0314
103 #define TSCM_ADDR_BASE 0xffff00000000ull
105 #define TSCM_OFFSET_FIRMWARE_REGISTER 0x0000
106 #define TSCM_OFFSET_FIRMWARE_FPGA 0x0004
107 #define TSCM_OFFSET_FIRMWARE_ARM 0x0008
108 #define TSCM_OFFSET_FIRMWARE_HW 0x000c
110 #define TSCM_OFFSET_ISOC_TX_CH 0x0200
111 #define TSCM_OFFSET_UNKNOWN 0x0204
112 #define TSCM_OFFSET_START_STREAMING 0x0208
113 #define TSCM_OFFSET_ISOC_RX_CH 0x020c
114 #define TSCM_OFFSET_ISOC_RX_ON 0x0210 /* Little conviction. */
115 #define TSCM_OFFSET_TX_PCM_CHANNELS 0x0214
116 #define TSCM_OFFSET_RX_PCM_CHANNELS 0x0218
117 #define TSCM_OFFSET_MULTIPLEX_MODE 0x021c
118 #define TSCM_OFFSET_ISOC_TX_ON 0x0220
119 /* Unknown 0x0224 */
120 #define TSCM_OFFSET_CLOCK_STATUS 0x0228
121 #define TSCM_OFFSET_SET_OPTION 0x022c
123 #define TSCM_OFFSET_MIDI_TX_ON 0x0300
124 #define TSCM_OFFSET_MIDI_TX_ADDR_HI 0x0304
125 #define TSCM_OFFSET_MIDI_TX_ADDR_LO 0x0308
127 #define TSCM_OFFSET_LED_POWER 0x0404
129 #define TSCM_OFFSET_MIDI_RX_QUAD 0x4000
135 // is fixed to 0x40. The second byte is between 0x00 to 0x1f and represent each
137 // fader: 0x00-0x07
138 // button: 0x0d, 0x0e
139 // knob: 0x14-0x1b
140 // sensing: 0x0b
144 // Just after turning on, 32 quadlets messages with 0x00-0x1f are immediately
147 // TSCM_OFFSET_FE8_CTL_TX_ON 0x0310
148 // TSCM_OFFSET_FE8_CTL_TX_ADDR_HI 0x0314
149 // TSCM_OFFSET_FE8_CTL_TX_ADDR_LO 0x0318
152 SND_TSCM_CLOCK_INTERNAL = 0,