Lines Matching +full:clock +full:- +full:error +full:- +full:detect

1 // SPDX-License-Identifier: GPL-2.0-only
3 * digi00x-stream.c - a part of driver for Digidesign Digi 002/003 family
5 * Copyright (c) 2014-2015 Takashi Sakamoto
36 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
46 err = -EIO;
61 return -EINVAL;
64 return snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
70 enum snd_dg00x_clock *clock)
75 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
81 *clock = be32_to_cpu(reg) & 0x0f;
82 if (*clock >= SND_DG00X_CLOCK_COUNT)
83 err = -EIO;
88 int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x, bool *detect)
93 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
97 *detect = be32_to_cpu(reg) > 0;
109 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
120 err = -EBUSY;
130 snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
136 snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
152 data = cpu_to_be32((dg00x->tx_resources.channel << 16) |
153 dg00x->rx_resources.channel);
154 err = snd_fw_transaction(dg00x->unit, TCODE_WRITE_QUADLET_REQUEST,
160 err = snd_fw_transaction(dg00x->unit, TCODE_READ_QUADLET_REQUEST,
170 curr--;
173 err = snd_fw_transaction(dg00x->unit,
182 curr--;
201 return -EINVAL;
203 if (stream == &dg00x->tx_stream)
204 resources = &dg00x->tx_resources;
206 resources = &dg00x->rx_resources;
215 fw_parent_device(dg00x->unit)->max_speed);
224 if (s == &dg00x->tx_stream) {
225 resources = &dg00x->tx_resources;
228 resources = &dg00x->rx_resources;
232 err = fw_iso_resources_init(resources, dg00x->unit);
236 err = amdtp_dot_init(s, dg00x->unit, dir);
247 if (s == &dg00x->tx_stream)
248 fw_iso_resources_destroy(&dg00x->tx_resources);
250 fw_iso_resources_destroy(&dg00x->rx_resources);
257 err = init_stream(dg00x, &dg00x->rx_stream);
261 err = init_stream(dg00x, &dg00x->tx_stream);
263 destroy_stream(dg00x, &dg00x->rx_stream);
267 err = amdtp_domain_init(&dg00x->domain);
269 destroy_stream(dg00x, &dg00x->rx_stream);
270 destroy_stream(dg00x, &dg00x->tx_stream);
282 amdtp_domain_destroy(&dg00x->domain);
284 destroy_stream(dg00x, &dg00x->rx_stream);
285 destroy_stream(dg00x, &dg00x->tx_stream);
301 if (dg00x->substreams_counter == 0 || curr_rate != rate) {
302 amdtp_domain_stop(&dg00x->domain);
306 fw_iso_resources_free(&dg00x->tx_resources);
307 fw_iso_resources_free(&dg00x->rx_resources);
313 err = keep_resources(dg00x, &dg00x->rx_stream, rate);
317 err = keep_resources(dg00x, &dg00x->tx_stream, rate);
319 fw_iso_resources_free(&dg00x->rx_resources);
323 err = amdtp_domain_set_events_per_period(&dg00x->domain,
326 fw_iso_resources_free(&dg00x->rx_resources);
327 fw_iso_resources_free(&dg00x->tx_resources);
337 unsigned int generation = dg00x->rx_resources.generation;
340 if (dg00x->substreams_counter == 0)
343 if (amdtp_streaming_error(&dg00x->tx_stream) ||
344 amdtp_streaming_error(&dg00x->rx_stream)) {
345 amdtp_domain_stop(&dg00x->domain);
349 if (generation != fw_parent_device(dg00x->unit)->card->generation) {
350 err = fw_iso_resources_update(&dg00x->tx_resources);
352 goto error;
354 err = fw_iso_resources_update(&dg00x->rx_resources);
356 goto error;
361 * which source of clock is used.
363 if (!amdtp_stream_running(&dg00x->rx_stream)) {
364 int spd = fw_parent_device(dg00x->unit)->max_speed;
368 goto error;
370 err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->rx_stream,
371 dg00x->rx_resources.channel, spd);
373 goto error;
375 err = amdtp_domain_add_stream(&dg00x->domain, &dg00x->tx_stream,
376 dg00x->tx_resources.channel, spd);
378 goto error;
383 // important for media clock recovery.
384 err = amdtp_domain_start(&dg00x->domain, 0, true, true);
386 goto error;
388 if (!amdtp_domain_wait_ready(&dg00x->domain, READY_TIMEOUT_MS)) {
389 err = -ETIMEDOUT;
390 goto error;
395 error:
396 amdtp_domain_stop(&dg00x->domain);
404 if (dg00x->substreams_counter == 0) {
405 amdtp_domain_stop(&dg00x->domain);
408 fw_iso_resources_free(&dg00x->tx_resources);
409 fw_iso_resources_free(&dg00x->rx_resources);
415 fw_iso_resources_update(&dg00x->tx_resources);
416 fw_iso_resources_update(&dg00x->rx_resources);
418 amdtp_stream_update(&dg00x->tx_stream);
419 amdtp_stream_update(&dg00x->rx_stream);
424 dg00x->dev_lock_changed = true;
425 wake_up(&dg00x->hwdep_wait);
430 guard(spinlock_irq)(&dg00x->lock);
433 if (dg00x->dev_lock_count < 0)
434 return -EBUSY;
437 if (dg00x->dev_lock_count++ == 0)
444 guard(spinlock_irq)(&dg00x->lock);
446 if (WARN_ON(dg00x->dev_lock_count <= 0))
448 if (--dg00x->dev_lock_count == 0)