Lines Matching defs:opl3
12 #include <sound/opl3.h>
26 static void snd_opl2_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
35 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
37 guard(spinlock_irqsave)(&opl3->reg_lock);
46 static void snd_opl3_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
55 port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
57 guard(spinlock_irqsave)(&opl3->reg_lock);
60 inb(opl3->l_port);
61 inb(opl3->l_port);
64 inb(opl3->l_port);
65 inb(opl3->l_port);
68 static int snd_opl3_detect(struct snd_opl3 * opl3)
84 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
86 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
87 signature = stat1 = inb(opl3->l_port); /* Status register */
89 dev_dbg(opl3->card->dev, "OPL3: stat1 = 0x%x\n", stat1);
93 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
95 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
99 stat2 = inb(opl3->l_port);
101 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
103 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
105 dev_dbg(opl3->card->dev, "OPL3: stat2 = 0x%x\n", stat2);
111 if (opl3->hardware != OPL3_HW_AUTO)
116 opl3->hardware = OPL3_HW_OPL2;
119 * If we had an OPL4 chip, opl3->hardware would have been set
122 if (snd_BUG_ON(!opl3->r_port))
124 opl3->hardware = OPL3_HW_OPL3;
141 struct snd_opl3 *opl3;
143 opl3 = snd_timer_chip(timer);
144 guard(spinlock_irqsave)(&opl3->timer_lock);
146 tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
147 opl3->timer_enable = tmp;
148 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
149 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
156 struct snd_opl3 *opl3;
158 opl3 = snd_timer_chip(timer);
159 guard(spinlock_irqsave)(&opl3->timer_lock);
160 tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
161 opl3->timer_enable = tmp;
162 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
174 struct snd_opl3 *opl3;
176 opl3 = snd_timer_chip(timer);
177 guard(spinlock_irqsave)(&opl3->timer_lock);
179 tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
180 opl3->timer_enable = tmp;
181 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
182 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
189 struct snd_opl3 *opl3;
191 opl3 = snd_timer_chip(timer);
192 guard(spinlock_irqsave)(&opl3->timer_lock);
193 tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
194 opl3->timer_enable = tmp;
195 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
221 static int snd_opl3_timer1_init(struct snd_opl3 * opl3, int timer_no)
229 tid.card = opl3->card->number;
232 err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer);
235 timer->private_data = opl3;
238 opl3->timer1 = timer;
242 static int snd_opl3_timer2_init(struct snd_opl3 * opl3, int timer_no)
250 tid.card = opl3->card->number;
253 err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer);
256 timer->private_data = opl3;
259 opl3->timer2 = timer;
270 struct snd_opl3 *opl3;
276 opl3 = hw->private_data;
277 status = inb(opl3->l_port);
282 timer = opl3->timer1;
286 timer = opl3->timer2;
297 static int snd_opl3_free(struct snd_opl3 *opl3)
299 if (snd_BUG_ON(!opl3))
301 if (opl3->private_free)
302 opl3->private_free(opl3);
303 snd_opl3_clear_patches(opl3);
304 release_and_free_resource(opl3->res_l_port);
305 release_and_free_resource(opl3->res_r_port);
306 kfree(opl3);
312 struct snd_opl3 *opl3 = device->device_data;
313 return snd_opl3_free(opl3);
323 struct snd_opl3 *opl3;
327 opl3 = kzalloc(sizeof(*opl3), GFP_KERNEL);
328 if (!opl3)
331 opl3->card = card;
332 opl3->hardware = hardware;
333 spin_lock_init(&opl3->reg_lock);
334 spin_lock_init(&opl3->timer_lock);
336 err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops);
338 snd_opl3_free(opl3);
342 *ropl3 = opl3;
348 int snd_opl3_init(struct snd_opl3 *opl3)
350 if (! opl3->command) {
351 dev_err(opl3->card->dev,
356 opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
358 opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);
360 switch (opl3->hardware & OPL3_HW_MASK) {
362 opl3->max_voices = MAX_OPL2_VOICES;
366 opl3->max_voices = MAX_OPL3_VOICES;
368 opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);
382 struct snd_opl3 *opl3;
386 err = snd_opl3_new(card, hardware, &opl3);
390 opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)");
391 if (!opl3->res_l_port) {
392 dev_err(card->dev, "opl3: can't grab left port 0x%lx\n", l_port);
393 snd_device_free(card, opl3);
397 opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)");
398 if (!opl3->res_r_port) {
399 dev_err(card->dev, "opl3: can't grab right port 0x%lx\n", r_port);
400 snd_device_free(card, opl3);
405 opl3->l_port = l_port;
406 opl3->r_port = r_port;
408 switch (opl3->hardware) {
413 opl3->command = &snd_opl3_command;
416 opl3->command = &snd_opl2_command;
417 err = snd_opl3_detect(opl3);
420 opl3->l_port, opl3->r_port);
421 snd_device_free(card, opl3);
425 switch (opl3->hardware & OPL3_HW_MASK) {
428 opl3->command = &snd_opl3_command;
432 snd_opl3_init(opl3);
434 *ropl3 = opl3;
440 int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev)
445 err = snd_opl3_timer1_init(opl3, timer1_dev);
450 err = snd_opl3_timer2_init(opl3, timer2_dev);
452 snd_device_free(opl3->card, opl3->timer1);
453 opl3->timer1 = NULL;
462 int snd_opl3_hwdep_new(struct snd_opl3 * opl3,
467 struct snd_card *card = opl3->card;
477 snd_device_free(card, opl3);
480 hw->private_data = opl3;
487 switch (opl3->hardware & OPL3_HW_MASK) {
508 opl3->hwdep = hw;
509 opl3->seq_dev_num = seq_device;
512 sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {
513 strscpy(opl3->seq_dev->name, hw->name);
514 *(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;