Lines Matching refs:R4
43 #define R4 BPF_REG_4 macro
653 i += __bpf_ld_imm64(&insn[i], R4, val); in __bpf_fill_alu_shift()
654 insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1); in __bpf_fill_alu_shift()
1622 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic64()
1632 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic64()
1669 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic32()
1679 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic32()
3782 BPF_ALU64_IMM(BPF_MOV, R4, 4),
3792 BPF_ALU64_IMM(BPF_ADD, R4, 20),
3802 BPF_ALU64_IMM(BPF_SUB, R4, 10),
3812 BPF_ALU64_REG(BPF_ADD, R0, R4),
3824 BPF_ALU64_REG(BPF_ADD, R1, R4),
3836 BPF_ALU64_REG(BPF_ADD, R2, R4),
3848 BPF_ALU64_REG(BPF_ADD, R3, R4),
3856 BPF_ALU64_REG(BPF_ADD, R4, R0),
3857 BPF_ALU64_REG(BPF_ADD, R4, R1),
3858 BPF_ALU64_REG(BPF_ADD, R4, R2),
3859 BPF_ALU64_REG(BPF_ADD, R4, R3),
3860 BPF_ALU64_REG(BPF_ADD, R4, R4),
3861 BPF_ALU64_REG(BPF_ADD, R4, R5),
3862 BPF_ALU64_REG(BPF_ADD, R4, R6),
3863 BPF_ALU64_REG(BPF_ADD, R4, R7),
3864 BPF_ALU64_REG(BPF_ADD, R4, R8),
3865 BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
3866 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
3872 BPF_ALU64_REG(BPF_ADD, R5, R4),
3884 BPF_ALU64_REG(BPF_ADD, R6, R4),
3896 BPF_ALU64_REG(BPF_ADD, R7, R4),
3908 BPF_ALU64_REG(BPF_ADD, R8, R4),
3920 BPF_ALU64_REG(BPF_ADD, R9, R4),
3940 BPF_ALU32_IMM(BPF_MOV, R4, 4),
3949 BPF_ALU64_IMM(BPF_ADD, R4, 10),
3958 BPF_ALU32_REG(BPF_ADD, R0, R4),
3970 BPF_ALU32_REG(BPF_ADD, R1, R4),
3982 BPF_ALU32_REG(BPF_ADD, R2, R4),
3994 BPF_ALU32_REG(BPF_ADD, R3, R4),
4002 BPF_ALU32_REG(BPF_ADD, R4, R0),
4003 BPF_ALU32_REG(BPF_ADD, R4, R1),
4004 BPF_ALU32_REG(BPF_ADD, R4, R2),
4005 BPF_ALU32_REG(BPF_ADD, R4, R3),
4006 BPF_ALU32_REG(BPF_ADD, R4, R4),
4007 BPF_ALU32_REG(BPF_ADD, R4, R5),
4008 BPF_ALU32_REG(BPF_ADD, R4, R6),
4009 BPF_ALU32_REG(BPF_ADD, R4, R7),
4010 BPF_ALU32_REG(BPF_ADD, R4, R8),
4011 BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
4012 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
4018 BPF_ALU32_REG(BPF_ADD, R5, R4),
4030 BPF_ALU32_REG(BPF_ADD, R6, R4),
4042 BPF_ALU32_REG(BPF_ADD, R7, R4),
4054 BPF_ALU32_REG(BPF_ADD, R8, R4),
4066 BPF_ALU32_REG(BPF_ADD, R9, R4),
4086 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4096 BPF_ALU64_REG(BPF_SUB, R0, R4),
4108 BPF_ALU64_REG(BPF_SUB, R1, R4),
4118 BPF_ALU64_REG(BPF_SUB, R2, R4),
4128 BPF_ALU64_REG(BPF_SUB, R3, R4),
4135 BPF_ALU64_REG(BPF_SUB, R4, R0),
4136 BPF_ALU64_REG(BPF_SUB, R4, R1),
4137 BPF_ALU64_REG(BPF_SUB, R4, R2),
4138 BPF_ALU64_REG(BPF_SUB, R4, R3),
4139 BPF_ALU64_REG(BPF_SUB, R4, R5),
4140 BPF_ALU64_REG(BPF_SUB, R4, R6),
4141 BPF_ALU64_REG(BPF_SUB, R4, R7),
4142 BPF_ALU64_REG(BPF_SUB, R4, R8),
4143 BPF_ALU64_REG(BPF_SUB, R4, R9),
4144 BPF_ALU64_IMM(BPF_SUB, R4, 10),
4149 BPF_ALU64_REG(BPF_SUB, R5, R4),
4159 BPF_ALU64_REG(BPF_SUB, R6, R4),
4169 BPF_ALU64_REG(BPF_SUB, R7, R4),
4179 BPF_ALU64_REG(BPF_SUB, R8, R4),
4189 BPF_ALU64_REG(BPF_SUB, R9, R4),
4200 BPF_ALU64_REG(BPF_SUB, R0, R4),
4232 BPF_ALU64_REG(BPF_XOR, R4, R4),
4235 BPF_JMP_REG(BPF_JEQ, R3, R4, 1),
4237 BPF_ALU64_REG(BPF_SUB, R4, R4),
4241 BPF_JMP_REG(BPF_JEQ, R5, R4, 1),
4285 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4295 BPF_ALU64_REG(BPF_MUL, R0, R4),
4307 BPF_ALU64_REG(BPF_MUL, R1, R4),
4325 BPF_ALU64_REG(BPF_MUL, R2, R4),
4347 BPF_MOV64_REG(R4, R3),
4348 BPF_MOV64_REG(R5, R4),
4357 BPF_ALU64_IMM(BPF_MOV, R4, 0),
4367 BPF_ALU64_REG(BPF_ADD, R0, R4),
4387 BPF_MOV64_REG(R4, R3),
4388 BPF_MOV64_REG(R5, R4),
4397 BPF_ALU32_IMM(BPF_MOV, R4, 0),
4407 BPF_ALU64_REG(BPF_ADD, R0, R4),
4427 BPF_MOV64_REG(R4, R3),
4428 BPF_MOV64_REG(R5, R4),
4437 BPF_LD_IMM64(R4, 0x0LL),
4447 BPF_ALU64_REG(BPF_ADD, R0, R4),
4490 BPF_MOV32_IMM(R4, -1234),
4491 BPF_JMP_REG(BPF_JEQ, R0, R4, 1),
4493 BPF_ALU64_IMM(BPF_AND, R4, 63),
4494 BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */
4500 BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */
4501 BPF_JMP_IMM(BPF_JEQ, R4, 92, 1),
4503 BPF_MOV64_IMM(R4, 4),
4504 BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */
4505 BPF_JMP_IMM(BPF_JEQ, R4, 64, 1),
4507 BPF_MOV64_IMM(R4, 5),
4508 BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */
4509 BPF_JMP_IMM(BPF_JEQ, R4, 160, 1),
5962 BPF_LD_IMM64(R4, 0xffffffffffffffffLL),
5964 BPF_ALU64_REG(BPF_DIV, R2, R4),
11778 BPF_ALU32_IMM(BPF_MOV, R4, 0xfefb0000),
11782 BPF_JMP_REG(BPF_JNE, R2, R4, 1),
11922 BPF_ALU64_IMM(BPF_MOV, R4, R4), \
11934 BPF_JMP_IMM(BPF_JNE, R4, R4, 6), \
12048 BPF_ALU64_IMM(BPF_MOV, R4, 4), \
12062 BPF_JMP_IMM(BPF_JNE, R4, 4, 6), \