Lines Matching +full:1 +full:- +full:15
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
11 # 1. a += b; d ^= a; d <<<= 16;
40 #include <asm/asm-offsets.h>
41 #include <asm/asm-compat.h>
77 std 0, 16(1)
78 stdu 1,-752(1)
80 SAVE_GPR 14, 112, 1
81 SAVE_GPR 15, 120, 1
82 SAVE_GPR 16, 128, 1
83 SAVE_GPR 17, 136, 1
84 SAVE_GPR 18, 144, 1
85 SAVE_GPR 19, 152, 1
86 SAVE_GPR 20, 160, 1
87 SAVE_GPR 21, 168, 1
88 SAVE_GPR 22, 176, 1
89 SAVE_GPR 23, 184, 1
90 SAVE_GPR 24, 192, 1
91 SAVE_GPR 25, 200, 1
92 SAVE_GPR 26, 208, 1
93 SAVE_GPR 27, 216, 1
94 SAVE_GPR 28, 224, 1
95 SAVE_GPR 29, 232, 1
96 SAVE_GPR 30, 240, 1
97 SAVE_GPR 31, 248, 1
99 addi 9, 1, 256
114 SAVE_VSX 15, 208, 9
134 addi 9, 1, 256
149 RESTORE_VSX 15, 208, 9
167 RESTORE_GPR 14, 112, 1
168 RESTORE_GPR 15, 120, 1
169 RESTORE_GPR 16, 128, 1
170 RESTORE_GPR 17, 136, 1
171 RESTORE_GPR 18, 144, 1
172 RESTORE_GPR 19, 152, 1
173 RESTORE_GPR 20, 160, 1
174 RESTORE_GPR 21, 168, 1
175 RESTORE_GPR 22, 176, 1
176 RESTORE_GPR 23, 184, 1
177 RESTORE_GPR 24, 192, 1
178 RESTORE_GPR 25, 200, 1
179 RESTORE_GPR 26, 208, 1
180 RESTORE_GPR 27, 216, 1
181 RESTORE_GPR 28, 224, 1
182 RESTORE_GPR 29, 232, 1
183 RESTORE_GPR 30, 240, 1
184 RESTORE_GPR 31, 248, 1
186 addi 1, 1, 752
187 ld 0, 16(1)
196 vadduwm 1, 1, 5
205 vpermxor 13, 13, 1, 25
207 vpermxor 15, 15, 3, 25
216 vadduwm 11, 11, 15
242 vadduwm 1, 1, 5
253 vpermxor 13, 13, 1, 25
255 vpermxor 15, 15, 3, 25
264 vadduwm 11, 11, 15
293 vadduwm 1, 1, 6
301 vpermxor 15, 15, 0, 25
302 vpermxor 12, 12, 1, 25
311 vadduwm 10, 10, 15
341 vadduwm 1, 1, 6
351 vpermxor 15, 15, 0, 25
352 vpermxor 12, 12, 1, 25
361 vadduwm 10, 10, 15
394 vadduwm 1, 1, 5
398 vpermxor 13, 13, 1, 20
400 vpermxor 15, 15, 3, 20
404 vadduwm 11, 11, 15
414 vadduwm 1, 1, 5
418 vpermxor 13, 13, 1, 22
420 vpermxor 15, 15, 3, 22
424 vadduwm 11, 11, 15
436 vadduwm 1, 1, 6
439 vpermxor 15, 15, 0, 20
440 vpermxor 12, 12, 1, 20
443 vadduwm 10, 10, 15
456 vadduwm 1, 1, 6
459 vpermxor 15, 15, 0, 22
460 vpermxor 12, 12, 1, 22
463 vadduwm 10, 10, 15
491 vadduwm \S+0, \S+0, 16-\S
492 vadduwm \S+4, \S+4, 17-\S
493 vadduwm \S+8, \S+8, 18-\S
494 vadduwm \S+12, \S+12, 19-\S
496 vadduwm \S+1, \S+1, 16-\S
497 vadduwm \S+5, \S+5, 17-\S
498 vadduwm \S+9, \S+9, 18-\S
499 vadduwm \S+13, \S+13, 19-\S
501 vadduwm \S+2, \S+2, 16-\S
502 vadduwm \S+6, \S+6, 17-\S
503 vadduwm \S+10, \S+10, 18-\S
504 vadduwm \S+14, \S+14, 19-\S
506 vadduwm \S+3, \S+3, 16-\S
507 vadduwm \S+7, \S+7, 17-\S
508 vadduwm \S+11, \S+11, 18-\S
509 vadduwm \S+15, \S+15, 19-\S
519 lxvw4x 1, 17, 9
533 lxvw4x 15, 31, 9
536 xxlxor \S+36, \S+36, 1
550 xxlxor \S+47, \S+47, 15
585 # r17 - r31 mainly for Write_256 macro.
602 mr 15, 6 # len
606 lxvw4x 49, 17, 3 # vr17, key 1
610 # create (0, 1, 2, 3) counters
612 vspltisw 1, 1
615 vmrghw 4, 0, 1
617 vsldoi 30, 4, 5, 8 # vr30 counter, 4 (0, 1, 2, 3)
627 sradi 8, 7, 1
643 vadduwm 31, 30, 25 # counter = (0, 1, 2, 3) + (4, 4, 4, 4)
657 xxspltw 32+1, 16, 1
662 xxspltw 32+5, 17, 1
666 xxspltw 32+9, 18, 1
670 xxspltw 32+13, 19, 1
672 xxspltw 32+15, 19, 3
676 xxspltw 32+17, 16, 1
681 xxspltw 32+21, 17, 1
685 xxspltw 32+25, 18, 1
689 xxspltw 32+29, 19, 1
704 TP_4x 0, 1, 2, 3
707 TP_4x 12, 13, 14, 15
710 xxlor 1, 49, 49
719 xxlor 49, 1, 1
724 addi 15, 15, -256 # len -=256
730 TP_4x 16+0, 16+1, 16+2, 16+3
733 TP_4x 16+12, 16+13, 16+14, 16+15
742 addi 15, 15, -256 # len +=256
752 cmpdi 15, 0
755 cmpdi 15, 512
763 lxvw4x 49, 17, 3 # vr17, key 1
774 sradi 8, 7, 1
779 vspltw 1, 16, 1
784 vspltw 5, 17, 1
788 vspltw 9, 18, 1
793 vspltw 13, 19, 1
795 vspltw 15, 19, 3
804 TP_4x 0, 1, 2, 3
807 TP_4x 12, 13, 14, 15
812 addi 15, 15, -256 # len += 256
818 cmpdi 15, 0
820 cmpdi 15, 256