Lines Matching +full:1 +full:v2

51 	add		v2.4s, v2.4s, v3.4s
52 	eor		v4.16b, v1.16b, v2.16b
62 	add		v2.4s, v2.4s, v3.4s
63 	eor		v4.16b, v1.16b, v2.16b
67 	// x1 = shuffle32(x1, MASK(0, 3, 2, 1))
69 	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))
70 	ext		v2.16b, v2.16b, v2.16b, #8
71 	// x3 = shuffle32(x3, MASK(2, 1, 0, 3))
80 	add		v2.4s, v2.4s, v3.4s
81 	eor		v4.16b, v1.16b, v2.16b
91 	add		v2.4s, v2.4s, v3.4s
92 	eor		v4.16b, v1.16b, v2.16b
96 	// x1 = shuffle32(x1, MASK(2, 1, 0, 3))
98 	// x2 = shuffle32(x2, MASK(1, 0, 3, 2))
99 	ext		v2.16b, v2.16b, v2.16b, #8
100 	// x3 = shuffle32(x3, MASK(0, 3, 2, 1))
111 	// x1: 1 data block output, o
112 	// x2: 1 data block input, i
135 	add		v2.4s, v2.4s, v10.4s
136 	eor		v2.16b, v2.16b, v6.16b
222 	mov		a2, v2.s[0]
237 	// x12 += counter values 1-4
249 	add		v2.4s, v2.4s, v6.4s
258 	eor		v14.16b, v14.16b, v2.16b
316 	add		v2.4s, v2.4s, v6.4s
325 	eor		v14.16b, v14.16b, v2.16b
383 	add		v2.4s, v2.4s, v7.4s
392 	eor		v13.16b, v13.16b, v2.16b
450 	add		v2.4s, v2.4s, v7.4s
459 	eor		v13.16b, v13.16b, v2.16b
519 	// x1[0-3] += s0[1]
528 	add		v2.4s, v2.4s, v18.4s
543 	// x5[0-3] += s1[1]
564 	// x9[0-3] += s2[1]
585 	// x13[0-3] += s3[1]
605 	// interleave 32-bit words in state n, n+1
612 	zip1		v18.4s, v2.4s, v3.4s
614 	zip2		v19.4s, v2.4s, v3.4s
676 	zip1		v2.2d, v24.2d, v26.2d
700 	eor		v18.16b, v18.16b, v2.16b
733 .Lt192:	cbz		x5, 1f				// exactly 128 bytes?
746 1:	st1		{v16.16b-v19.16b}, [x1]
766 	tbl		v2.16b, {v8.16b-v11.16b}, v6.16b
771 	eor		v30.16b, v30.16b, v2.16b
783 	tbl		v2.16b, {v12.16b-v15.16b}, v6.16b
788 	eor		v30.16b, v30.16b, v2.16b
801 	.set		.Li, .Li + 1
804 CTRINC:	.word		1, 2, 3, 4