Lines Matching +full:a +full:- +full:9
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 // load the words on-demand.
27 .macro __ldrd a, b, src, offset
29 ldrd \a, \b, [\src, #\offset]
31 ldr \a, [\src, #\offset]
36 .macro __strd a, b, dst, offset
38 strd \a, \b, [\dst, #\offset]
40 str \a, [\dst, #\offset]
45 .macro _le32_bswap a, tmp
47 rev_l \a, \tmp
51 .macro _le32_bswap_8x a, b, c, d, e, f, g, h, tmp
52 _le32_bswap \a, \tmp
62 // Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
64 // columns/diagonals. s0-s1 are the word offsets to the message words the first
65 // column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
76 // a += b + m[blake2s_sigma[r][2*i + 0]];
82 // d = ror32(d ^ a, 16);
97 // a += b + m[blake2s_sigma[r][2*i + 1]];
103 // d = ror32(d ^ a, 8);
116 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
118 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
119 // r14 are free to use. The macro arguments s0-s15 give the order in which the
135 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
164 // (v[2], v[7], v[8], v[13]) and (v[3], v[4], v[9], v[14]).
165 __ldrd r8, r9, sp, 0 // load v[8] and v[9]
183 push {r0-r2,r4-r11,lr} // keep this an even number
197 // to the stack to save a register during the rounds. This also has the
203 ldmia r1!, {r2-r9}
205 stmia r12!, {r2-r9}
206 ldmia r1!, {r2-r9}
208 stmia r12, {r2-r9}
212 // Calculate v[8..15]. Push v[9..15] onto the stack, and leave space
213 // for spilling v[8..9]. Leave v[8..9] in r8-r9.
216 ldmia r12!, {r8-r9} // load IV[0..1]
218 ldm r12, {r2-r7} // load IV[3..7]
223 push {r2-r7} // push v[9..15]
224 sub sp, sp, #8 // leave space for v[8..9]
227 ldm r14, {r0-r7}
233 _blake2s_round 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
234 _blake2s_round 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3
235 _blake2s_round 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4
236 _blake2s_round 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8
237 _blake2s_round 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13
238 _blake2s_round 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9
239 _blake2s_round 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11
240 _blake2s_round 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10
241 _blake2s_round 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5
242 _blake2s_round 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0
250 add sp, sp, #8 // v[8..9] are already loaded.
251 pop {r10-r11} // load v[10..11]
256 ldm r14, {r8-r11} // load h[0..3]
261 stmia r14!, {r0-r3} // store new h[0..3]
262 ldm r14, {r0-r3} // load old h[4..7]
263 pop {r8-r11} // load v[12..15]
273 stm r14, {r0-r3} // store new h[4..7]
277 // 64. So we can simply set it to 64 without re-loading it.
280 subs r2, r2, #1 // nblocks--
284 pop {r0-r2,r4-r11,pc}
286 // The next message block (pointed to by r1) isn't 4-byte aligned, so it
288 // by r12) using an alternative method. r2-r9 are free to use.