Lines Matching defs:insn
19 static bool is_cmpxchg_insn(const struct bpf_insn *insn)
21 return BPF_CLASS(insn->code) == BPF_STX &&
22 (BPF_MODE(insn->code) == BPF_ATOMIC ||
23 BPF_MODE(insn->code) == BPF_PROBE_ATOMIC) &&
24 insn->imm == BPF_CMPXCHG;
27 /* Returns true if 'insn' is an address space cast instruction translated as BPF_ALU op */
28 static bool is_addr_space_cast32(struct bpf_prog *prog, const struct bpf_insn *insn)
32 if (insn->code != (BPF_ALU64 | BPF_MOV | BPF_X) || insn->off != BPF_ADDR_SPACE_CAST)
36 if (insn->imm == 1)
40 if (insn->imm == 1 << 16)
47 /* Return the regno defined by the insn, or -1. */
48 static int insn_def_regno(const struct bpf_insn *insn)
50 switch (BPF_CLASS(insn->code)) {
56 return bpf_atomic_load_reg(insn);
58 return insn->dst_reg;
67 static bool bpf_is_reg64(struct bpf_prog *prog, struct bpf_insn *insn)
69 u8 class = BPF_CLASS(insn->code);
70 u8 mode = BPF_MODE(insn->code);
71 u8 size = BPF_SIZE(insn->code);
72 u8 op = BPF_OP(insn->code);
76 if ((class == BPF_ALU || class == BPF_ALU64) && op == BPF_END && insn->imm != 64)
84 if (is_addr_space_cast32(prog, insn))
108 int bpf_insn_def32(struct bpf_prog *prog, struct bpf_insn *insn)
110 int dst_reg = insn_def_regno(insn);
112 if (dst_reg < 0 || bpf_is_reg64(prog, insn))
120 const struct bpf_insn *insn)
126 if (insn->off < 0 || insn->off >= tab->nr_descs)
129 res = &tab->descs[insn->off];
131 if (res->func_id != insn->imm)
133 } else if ((s32)BPF_CALL_IMM(res->addr) != insn->imm) {
141 struct bpf_insn *insn, int cnt)
145 for (i = 0; i < cnt; i++, insn++) {
146 if (bpf_pseudo_kfunc_call(insn)) {
147 ret = bpf_add_kfunc_call(env, insn->imm, insn->off);
157 const struct bpf_insn *insn, int idx)
159 int start = idx + insn->imm + 1, subprog;
162 if (verifier_bug_if(subprog < 0, env, "get stack depth: no program at insn %d", start))
169 BPF_PATCH_KEEP_TARGET, /* targets of 'off' keep naming 'off', the first new insn */
170 BPF_PATCH_MOVE_TARGET, /* targets of 'off' follow the original insn to 'off + len - 1' */
183 struct bpf_insn *insn = new_prog->insnsi;
190 * original insn at old prog.
192 data[off].zext_dst = bpf_insn_def32(new_prog, insn + off + cnt - 1) >= 0;
196 * A non-memory accessing insn could have been replaced by a
197 * memory accessing insn, systematically mark it for non-stack
200 data[off].non_stack_access = bpf_is_mem_insn(insn + off);
212 data[i].zext_dst = bpf_insn_def32(new_prog, insn + i) >= 0;
214 * In BPF_PATCH_MOVE_TARGET mode the original insn is the last
218 !memcmp(insn + i, original_insn, sizeof(struct bpf_insn))) {
222 } else if (bpf_is_mem_insn(insn + i)) {
233 if (bpf_is_mem_insn(insn + off + cnt - 1) &&
234 memcmp(insn + off + cnt - 1, original_insn, sizeof(struct bpf_insn)))
340 "insn %d cannot be patched due to 16-bit range\n",
359 * insn was moved down by delta insns inside its own patch. Operands relative
362 static int bpf_adj_moved_insn(struct bpf_insn *insn, u32 delta)
364 u8 class = BPF_CLASS(insn->code), op = BPF_OP(insn->code);
365 s64 off = insn->imm, off_min = S32_MIN;
368 if (bpf_pseudo_func(insn) || bpf_pseudo_call(insn)) {
374 if (insn->code != (BPF_JMP32 | BPF_JA)) {
375 off = insn->off;
390 insn->imm = off;
392 insn->off = off;
397 * For all jmp insns in a given 'prog' that point to 'tgt_idx' insn adjust the
402 struct bpf_insn *insn = prog->insnsi;
407 for (i = 0; i < insn_cnt; i++, insn++) {
408 u8 code = insn->code;
417 if (insn->code == (BPF_JMP32 | BPF_JA)) {
418 if (i + 1 + insn->imm != tgt_idx)
420 if (check_add_overflow(insn->imm, delta, &imm))
422 insn->imm = imm;
424 if (i + 1 + insn->off != tgt_idx)
426 if (check_add_overflow(insn->off, delta, &off))
428 insn->off = off;
523 /* First live insn doesn't match first live linfo, it needs to "inherit"
637 struct bpf_insn *insn = env->prog->insnsi;
641 for (i = 0; i < insn_cnt; i++, insn++) {
642 if (!bpf_insn_is_cond_jump(insn->code))
645 if (bpf_is_unwind_goto(insn) && aux_data[i + 1 + insn->off].seen) {
653 memcpy(insn + 1, &trap, sizeof(trap));
660 ja.off = insn->off;
661 else if (!aux_data[i + 1 + insn->off].seen)
669 memcpy(insn, &ja, sizeof(ja));
684 struct bpf_insn *insn = env->prog->insnsi;
689 if (!aux_data[i].seen || !bpf_pseudo_func(insn + i))
691 t = i + insn[i].imm + 1;
694 memcpy(insn + t, &trap, sizeof(trap));
729 struct bpf_insn *insn = env->prog->insnsi;
735 is_may_goto_0 = !memcmp(&insn[i], &MAY_GOTO_0, sizeof(MAY_GOTO_0));
736 is_ja = !memcmp(&insn[i], &NOP, sizeof(NOP));
747 /* Go back one insn to catch may_goto +1; may_goto +0 sequence */
774 struct bpf_insn insn;
777 insn = insns[adj_idx];
778 load_reg = insn_def_regno(&insn);
786 code = insn.code;
791 if (bpf_is_reg64(env->prog, &insn)) {
804 rnd_hi32_patch[0] = insn;
822 if (!bpf_jit_needs_zext() && !is_cmpxchg_insn(&insn))
826 if (bpf_pseudo_kfunc_call(&insn))
833 zext_patch[0] = insn;
881 * faults. Returns the number of insns in @buf, 0 when the insn loads no such
884 static int arena_member_fixup(struct bpf_verifier_env *env, int idx, struct bpf_insn *insn,
894 verbose(env, "an insn loads an arena pointer member on one path and something else on another\n");
899 buf[cnt++] = *insn;
900 if (aux->arena_member_nullable || BPF_MODE(insn->code) == BPF_PROBE_MEM)
901 buf[cnt++] = BPF_JMP_IMM(BPF_JEQ, insn->dst_reg, 0, 1);
902 buf[cnt++] = BPF_ALU32_IMM(BPF_SUB, insn->dst_reg, (s32)base);
914 struct bpf_insn *insn;
990 insn = env->prog->insnsi + delta;
992 for (i = 0; i < insn_cnt; i++, insn++) {
1002 *patch = *insn;
1005 verbose(env, "insn %d cannot be patched due to 16-bit range\n",
1016 insn = new_prog->insnsi + i + delta;
1018 * nospec_result-case, because an insn may require a
1021 * patching to insn. *insn should equal patch[1] now.
1025 if (insn->code == (BPF_LDX | BPF_MEM | BPF_B) ||
1026 insn->code == (BPF_LDX | BPF_MEM | BPF_H) ||
1027 insn->code == (BPF_LDX | BPF_MEM | BPF_W) ||
1028 insn->code == (BPF_LDX | BPF_MEM | BPF_DW) ||
1029 insn->code == (BPF_LDX | BPF_MEMSX | BPF_B) ||
1030 insn->code == (BPF_LDX | BPF_MEMSX | BPF_H) ||
1031 insn->code == (BPF_LDX | BPF_MEMSX | BPF_W)) {
1033 } else if (insn->code == (BPF_STX | BPF_MEM | BPF_B) ||
1034 insn->code == (BPF_STX | BPF_MEM | BPF_H) ||
1035 insn->code == (BPF_STX | BPF_MEM | BPF_W) ||
1036 insn->code == (BPF_STX | BPF_MEM | BPF_DW) ||
1037 insn->code == (BPF_ST | BPF_MEM | BPF_B) ||
1038 insn->code == (BPF_ST | BPF_MEM | BPF_H) ||
1039 insn->code == (BPF_ST | BPF_MEM | BPF_W) ||
1040 insn->code == (BPF_ST | BPF_MEM | BPF_DW)) {
1042 } else if ((insn->code == (BPF_STX | BPF_ATOMIC | BPF_B) ||
1043 insn->code == (BPF_STX | BPF_ATOMIC | BPF_H) ||
1044 insn->code == (BPF_STX | BPF_ATOMIC | BPF_W) ||
1045 insn->code == (BPF_STX | BPF_ATOMIC | BPF_DW)) &&
1047 insn->code = BPF_STX | BPF_PROBE_ATOMIC | BPF_SIZE(insn->code);
1050 } else if (insn->code == (BPF_STX | BPF_ATOMIC | BPF_DW) &&
1051 insn->imm == BPF_LOAD_ACQ &&
1054 cnt = arena_member_fixup(env, i + delta, insn, insn_buf);
1063 insn = new_prog->insnsi + i + delta;
1065 } else if (insn->code == (BPF_JMP | BPF_EXIT) &&
1078 * least one ctx ptr saving insn before the
1095 *patch++ = *insn;
1104 insn = new_prog->insnsi + i + delta;
1126 if (BPF_MODE(insn->code) == BPF_MEMSX) {
1127 if (!bpf_jit_supports_insn(insn, true)) {
1131 insn->code = BPF_CLASS(insn->code) | BPF_PROBE_MEM32SX | BPF_SIZE(insn->code);
1133 insn->code = BPF_CLASS(insn->code) | BPF_PROBE_MEM32 | BPF_SIZE(insn->code);
1149 if (BPF_MODE(insn->code) == BPF_MEM)
1150 insn->code = BPF_LDX | BPF_PROBE_MEM |
1151 BPF_SIZE(insn->code);
1153 insn->code = BPF_LDX | BPF_PROBE_MEMSX |
1154 BPF_SIZE(insn->code);
1161 cnt = arena_member_fixup(env, i + delta, insn, insn_buf);
1172 insn = new_prog->insnsi + i + delta;
1177 size = BPF_LDST_BYTES(insn);
1178 mode = BPF_MODE(insn->code);
1187 off = insn->off;
1202 insn->off = off & ~(size_default - 1);
1203 insn->code = BPF_LDX | BPF_MEM | size_code;
1207 cnt = convert_ctx_access(type, insn, insn_buf, env->prog,
1225 insn->dst_reg,
1227 insn_buf[cnt++] = BPF_ALU32_IMM(BPF_AND, insn->dst_reg,
1232 insn->dst_reg,
1234 insn_buf[cnt++] = BPF_ALU32_IMM(BPF_AND, insn->dst_reg,
1240 insn->dst_reg, insn->dst_reg,
1252 insn = new_prog->insnsi + i + delta;
1316 if (verifier_bug_if(!func || subprog <= 0, env, "no function at insn %u",
1336 struct bpf_insn *insn;
1340 for (i = 0, insn = prog->insnsi; i < prog->len; i++, insn++) {
1341 if (!bpf_pseudo_func(insn) && !bpf_pseudo_call(insn))
1348 subprog = bpf_find_subprog(env, i + insn->imm + 1);
1349 if (verifier_bug_if(subprog < 0, env, "No program to jit at insn %d",
1350 i + insn->imm + 1))
1352 /* temporarily remember subprog id inside insn instead of
1355 insn->off = subprog;
1359 env->insn_aux_data[i].call_imm = insn->imm;
1361 insn->imm = 1;
1362 if (bpf_pseudo_func(insn)) {
1372 insn[0].imm = (u32)addr;
1373 insn[1].imm = addr >> 32;
1445 insn = func[i]->insnsi;
1446 for (j = 0; j < func[i]->len; j++, insn++) {
1447 if (BPF_CLASS(insn->code) == BPF_LDX &&
1448 (BPF_MODE(insn->code) == BPF_PROBE_MEM ||
1449 BPF_MODE(insn->code) == BPF_PROBE_MEM32 ||
1450 BPF_MODE(insn->code) == BPF_PROBE_MEM32SX ||
1451 BPF_MODE(insn->code) == BPF_PROBE_MEMSX))
1453 if ((BPF_CLASS(insn->code) == BPF_STX ||
1454 BPF_CLASS(insn->code) == BPF_ST) &&
1455 BPF_MODE(insn->code) == BPF_PROBE_MEM32)
1457 if (BPF_CLASS(insn->code) == BPF_STX &&
1458 BPF_MODE(insn->code) == BPF_PROBE_ATOMIC)
1460 if (bpf_is_unwind_goto(insn))
1485 insn = func[i]->insnsi;
1486 for (j = 0; j < func[i]->len; j++, insn++) {
1487 if (bpf_pseudo_func(insn)) {
1488 subprog = insn->off;
1489 insn[0].imm = (u32)(long)func[subprog]->bpf_func;
1490 insn[1].imm = ((u64)(long)func[subprog]->bpf_func) >> 32;
1493 if (!bpf_pseudo_call(insn))
1495 subprog = insn->off;
1496 insn->imm = BPF_CALL_IMM(func[subprog]->bpf_func);
1556 for (i = 0, insn = prog->insnsi; i < prog->len; i++, insn++) {
1557 if (bpf_pseudo_func(insn)) {
1558 insn[0].imm = env->insn_aux_data[i].call_imm;
1559 insn[1].imm = insn->off;
1560 insn->off = 0;
1563 if (!bpf_pseudo_call(insn))
1565 insn->imm = env->insn_aux_data[i].call_imm;
1566 subprog = bpf_find_subprog(env, i + insn->imm + 1);
1567 insn->off = subprog;
1612 struct bpf_insn *insn;
1657 * that, insn->off and insn->imm should be restored to their original
1660 for (i = 0, insn = prog->insnsi; i < prog->len; i++, insn++) {
1661 if (!bpf_pseudo_call(insn))
1663 insn->off = 0;
1664 insn->imm = env->insn_aux_data[i].call_imm;
1684 struct bpf_insn *insn = prog->insnsi;
1727 for (i = 0; i < prog->len; i++, insn++) {
1728 if (bpf_pseudo_func(insn)) {
1736 if (!bpf_pseudo_call(insn))
1738 depth = get_callee_stack_depth(env, insn, i);
1741 err = bpf_patch_call_args(insn, depth);
1858 struct bpf_insn *insn = prog->insnsi;
1884 insn = prog->insnsi;
1892 if (is_addr_space_cast32(env->prog, insn)) {
1894 insn->code = BPF_ALU | BPF_MOV | BPF_X;
1896 insn->off = 0;
1897 insn->imm = 0;
1902 /* Convert BPF_CLASS(insn->code) == BPF_ALU64 to 32-bit ALU */
1903 insn->code = BPF_ALU | BPF_OP(insn->code) | BPF_SRC(insn->code);
1906 if ((insn->code == (BPF_ALU64 | BPF_MOD | BPF_K) ||
1907 insn->code == (BPF_ALU64 | BPF_DIV | BPF_K) ||
1908 insn->code == (BPF_ALU | BPF_MOD | BPF_K) ||
1909 insn->code == (BPF_ALU | BPF_DIV | BPF_K)) &&
1910 insn->off == 1 && insn->imm == -1) {
1911 bool is64 = BPF_CLASS(insn->code) == BPF_ALU64;
1912 bool isdiv = BPF_OP(insn->code) == BPF_DIV;
1917 BPF_NEG | BPF_K, insn->dst_reg,
1920 *patch++ = BPF_MOV32_IMM(insn->dst_reg, 0);
1930 insn = new_prog->insnsi + i + delta;
1935 if (insn->code == (BPF_ALU64 | BPF_MOD | BPF_X) ||
1936 insn->code == (BPF_ALU64 | BPF_DIV | BPF_X) ||
1937 insn->code == (BPF_ALU | BPF_MOD | BPF_X) ||
1938 insn->code == (BPF_ALU | BPF_DIV | BPF_X)) {
1939 bool is64 = BPF_CLASS(insn->code) == BPF_ALU64;
1940 bool isdiv = BPF_OP(insn->code) == BPF_DIV;
1941 bool is_sdiv = isdiv && insn->off == 1;
1942 bool is_smod = !isdiv && insn->off == 1;
1950 *patch++ = BPF_MOV64_REG(BPF_REG_AX, insn->src_reg);
1961 BPF_MOV | BPF_K, insn->dst_reg,
1965 BPF_NEG | BPF_K, insn->dst_reg,
1968 *patch++ = *insn;
1973 *patch++ = BPF_MOV64_REG(BPF_REG_AX, insn->src_reg);
1983 *patch++ = BPF_MOV32_IMM(insn->dst_reg, 0);
1985 *patch++ = *insn;
1989 *patch++ = BPF_MOV32_REG(insn->dst_reg, insn->dst_reg);
1995 BPF_JNE | BPF_K, insn->src_reg,
1997 *patch++ = BPF_ALU32_REG(BPF_XOR, insn->dst_reg, insn->dst_reg);
1999 *patch++ = *insn;
2004 BPF_JEQ | BPF_K, insn->src_reg,
2006 *patch++ = *insn;
2010 *patch++ = BPF_MOV32_REG(insn->dst_reg, insn->dst_reg);
2021 insn = new_prog->insnsi + i + delta;
2026 if (BPF_CLASS(insn->code) == BPF_LDX &&
2027 (BPF_MODE(insn->code) == BPF_PROBE_MEM ||
2028 BPF_MODE(insn->code) == BPF_PROBE_MEMSX)) {
2035 *patch++ = BPF_MOV64_REG(BPF_REG_AX, insn->src_reg);
2036 if (insn->off)
2037 *patch++ = BPF_ALU64_IMM(BPF_ADD, BPF_REG_AX, insn->off);
2040 *patch++ = *insn;
2042 *patch++ = BPF_MOV64_IMM(insn->dst_reg, 0);
2051 insn = new_prog->insnsi + i + delta;
2056 if (BPF_CLASS(insn->code) == BPF_LD &&
2057 (BPF_MODE(insn->code) == BPF_ABS ||
2058 BPF_MODE(insn->code) == BPF_IND)) {
2059 cnt = env->ops->gen_ld_abs(insn, insn_buf);
2071 insn = new_prog->insnsi + i + delta;
2076 if (insn->code == (BPF_ALU64 | BPF_ADD | BPF_X) ||
2077 insn->code == (BPF_ALU64 | BPF_SUB | BPF_X)) {
2094 off_reg = issrc ? insn->src_reg : insn->dst_reg;
2108 *patch++ = BPF_MOV64_REG(insn->dst_reg, insn->src_reg);
2109 insn->src_reg = BPF_REG_AX;
2111 insn->code = insn->code == code_add ?
2113 *patch++ = *insn;
2124 insn = new_prog->insnsi + i + delta;
2128 if (bpf_is_may_goto_insn(insn) && timed_may_goto) {
2149 cnt = may_goto_expand_timed(insn_buf, insn->off, tmg, reg, save_off);
2157 insn = new_prog->insnsi + i + delta;
2159 } else if (bpf_is_may_goto_insn(insn)) {
2167 cnt = may_goto_expand(insn_buf, insn->off, stack_off,
2176 insn = new_prog->insnsi + i + delta;
2181 insn->code == (BPF_LD | BPF_IMM | BPF_DW) &&
2182 (insn->src_reg == BPF_PSEUDO_MAP_VALUE ||
2183 insn->src_reg == BPF_PSEUDO_MAP_IDX_VALUE)) {
2194 * We are *skipping* first half of ld_imm64 insn
2196 * with that same half + mov64_percpu_reg insn.
2198 * replace one 8-byte insn, which does not work
2199 * well for ld_imm64 insn.
2202 insn_buf[0] = insn[1];
2203 insn_buf[1] = BPF_MOV64_PERCPU_REG(insn->dst_reg, insn->dst_reg);
2213 insn = new_prog->insnsi + i + delta;
2217 if (insn->code != (BPF_JMP | BPF_CALL))
2219 if (insn->src_reg == BPF_PSEUDO_CALL)
2221 if (insn->src_reg == BPF_PSEUDO_KFUNC_CALL) {
2222 ret = bpf_fixup_kfunc_call(env, insn, insn_buf, i + delta, &cnt);
2234 insn = new_prog->insnsi + i + delta;
2239 if (bpf_jit_inlines_helper_call(insn->imm)) {
2244 if (insn->imm == BPF_FUNC_get_route_realm)
2246 if (insn->imm == BPF_FUNC_get_prandom_u32)
2248 if (insn->imm == BPF_FUNC_override_return)
2250 if (insn->imm == BPF_FUNC_tail_call) {
2270 insn->imm = 0;
2271 insn->code = BPF_JMP | BPF_TAIL_CALL;
2292 insn->imm = ret + 1;
2317 insn_buf[2] = *insn;
2325 insn = new_prog->insnsi + i + delta;
2350 insn_buf[2] = *insn;
2359 insn = new_prog->insnsi + i + delta;
2369 insn_buf[1] = *insn;
2378 insn = new_prog->insnsi + i + delta;
2387 (insn->imm == BPF_FUNC_map_lookup_elem ||
2388 insn->imm == BPF_FUNC_map_update_elem ||
2389 insn->imm == BPF_FUNC_map_delete_elem ||
2390 insn->imm == BPF_FUNC_map_push_elem ||
2391 insn->imm == BPF_FUNC_map_pop_elem ||
2392 insn->imm == BPF_FUNC_map_peek_elem ||
2393 insn->imm == BPF_FUNC_redirect_map ||
2394 insn->imm == BPF_FUNC_for_each_map_elem ||
2395 insn->imm == BPF_FUNC_map_lookup_percpu_elem)) {
2402 if (insn->imm == BPF_FUNC_map_lookup_elem &&
2422 insn = new_prog->insnsi + i + delta;
2451 switch (insn->imm) {
2453 insn->imm = BPF_CALL_IMM(ops->map_lookup_elem);
2456 insn->imm = BPF_CALL_IMM(ops->map_update_elem);
2459 insn->imm = BPF_CALL_IMM(ops->map_delete_elem);
2462 insn->imm = BPF_CALL_IMM(ops->map_push_elem);
2465 insn->imm = BPF_CALL_IMM(ops->map_pop_elem);
2468 insn->imm = BPF_CALL_IMM(ops->map_peek_elem);
2471 insn->imm = BPF_CALL_IMM(ops->map_redirect);
2474 insn->imm = BPF_CALL_IMM(ops->map_for_each_callback);
2477 insn->imm = BPF_CALL_IMM(ops->map_lookup_percpu_elem);
2486 insn->imm == BPF_FUNC_jiffies64) {
2505 insn = new_prog->insnsi + i + delta;
2511 if (insn->imm == BPF_FUNC_get_smp_processor_id &&
2512 bpf_verifier_inlines_helper_call(env, insn->imm)) {
2534 insn = new_prog->insnsi + i + delta;
2539 if ((insn->imm == BPF_FUNC_get_current_task || insn->imm == BPF_FUNC_get_current_task_btf) &&
2540 bpf_verifier_inlines_helper_call(env, insn->imm)) {
2553 insn = new_prog->insnsi + i + delta;
2559 insn->imm == BPF_FUNC_get_func_arg) {
2587 insn = new_prog->insnsi + i + delta;
2593 insn->imm == BPF_FUNC_get_func_ret) {
2619 insn = new_prog->insnsi + i + delta;
2625 insn->imm == BPF_FUNC_get_func_arg_cnt) {
2645 insn = new_prog->insnsi + i + delta;
2651 insn->imm == BPF_FUNC_get_func_ip) {
2660 insn = new_prog->insnsi + i + delta;
2667 insn->imm == BPF_FUNC_get_branch_snapshot) {
2716 insn = new_prog->insnsi + i + delta;
2722 insn->imm == BPF_FUNC_kptr_xchg &&
2734 insn = new_prog->insnsi + i + delta;
2738 fn = env->ops->get_func_proto(insn->imm, env->prog);
2745 func_id_name(insn->imm), insn->imm);
2748 insn->imm = BPF_CALL_IMM(fn->func);
2765 insn++;
2817 /* Add ST insn to subprog prologue to init extra stack */
2821 /* Copy first actual insn to preserve it */
2825 verbose(env, "insn %d cannot be patched due to 16-bit range\n",
2837 * If may_goto is a first insn of a prog there could be a jmp
2838 * insn that points to it, hence adjust all such jmps to point
2839 * to insn after BPF_ST that inits may_goto count.
2941 static bool is_bpf_loop_call(struct bpf_insn *insn)
2943 return insn->code == (BPF_JMP | BPF_CALL) &&
2944 insn->src_reg == 0 &&
2945 insn->imm == BPF_FUNC_loop;
2961 struct bpf_insn *insn = env->prog->insnsi;
2967 for (i = 0; i < insn_cnt; i++, insn++) {
2971 if (is_bpf_loop_call(insn) && inline_state->fit_for_inline) {
2985 insn = new_prog->insnsi + i + delta;
3009 struct bpf_insn *insn = env->prog->insnsi;
3015 for (i = 0; i < insn_cnt; i++, insn++) {
3020 *(insn - j) = NOP;
3021 *(insn + j) = NOP;