Lines Matching defs:SRC
60 #define SRC regs[insn->src_reg]
1770 DST = DST OP (SRC & 63); \
1773 DST = (u32) DST OP ((u32) SRC & 31); \
1784 DST = DST OP SRC; \
1787 DST = (u32) DST OP (u32) SRC; \
1814 DST = (u32) SRC;
1817 DST = (u32)(s8) SRC;
1820 DST = (u32)(s16) SRC;
1830 DST = SRC;
1833 DST = (s8) SRC;
1836 DST = (s16) SRC;
1839 DST = (s32) SRC;
1851 DST = (u64) (u32) (((s32) DST) >> (SRC & 31));
1857 (*(s64 *) &DST) >>= (SRC & 63);
1865 div64_u64_rem(DST, SRC, &AX);
1869 AX = div64_s64(DST, SRC);
1870 DST = DST - AX * SRC;
1878 DST = do_div(AX, (u32) SRC);
1882 AX = do_div(AX, abs((s32)SRC));
1921 DST = div64_u64(DST, SRC);
1924 DST = div64_s64(DST, SRC);
1932 do_div(AX, (u32) SRC);
1937 do_div(AX, abs((s32)SRC));
1938 if (((s32)DST < 0) == ((s32)SRC < 0))
2068 if ((SIGN##64) DST CMP_OP (SIGN##64) SRC) { \
2074 if ((SIGN##32) DST CMP_OP (SIGN##32) SRC) { \
2118 *(SIZE *)(unsigned long) (DST + insn->off) = SRC; \
2124 DST = *(SIZE *)(unsigned long) (SRC + insn->off); \
2128 (const void *)(long) (SRC + insn->off)); \
2140 DST = *(SIZE *)(unsigned long) (SRC + insn->off); \
2144 (const void *)(long) (SRC + insn->off)); \
2156 atomic_##KOP((u32) SRC, (atomic_t *)(unsigned long) \
2159 atomic64_##KOP((u64) SRC, (atomic64_t *)(unsigned long) \
2166 SRC = (u32) atomic_fetch_##KOP( \
2167 (u32) SRC, \
2170 SRC = (u64) atomic64_fetch_##KOP( \
2171 (u64) SRC, \
2193 SRC = (u32) atomic_xchg(
2195 (u32) SRC);
2197 SRC = (u64) atomic64_xchg(
2199 (u64) SRC);
2207 (u32) BPF_R0, (u32) SRC);
2211 (u64) BPF_R0, (u64) SRC);
2223 (SIZE *)(unsigned long)(SRC + insn->off)); \
2241 (SIZE *)(unsigned long)(DST + insn->off), (SIZE)SRC); \