Lines Matching +full:gpu +full:- +full:id
1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
78 * %AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible.
81 * %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
82 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
83 * pages of system memory, allows GPU access system memory in a linearized
89 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
153 * May depend on GPU instructions to flush caches to system scope explicitly.
159 /* Flag that BO should not be cached by GPU. Coherent without having to flush
160 * GPU caches explicitly
166 /* Flag that BO should be coherent across devices when using device-level
167 * atomics. May depend on GPU instructions to flush caches to device scope
174 /* Set PTE.D and recompress during GTT->VRAM moves according to TILING flags. */
245 /* GPU reset status */
254 /* indicate gpu reset occurred after ctx created */
258 /* indicate some job from this context once cause gpu hang */
267 #define AMDGPU_CTX_PRIORITY_UNSET -2048
268 #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023
269 #define AMDGPU_CTX_PRIORITY_LOW -512
378 /* SI-CI-VI: */
397 /* GFX9 - GFX11: */
473 /** BO status: 0 - BO is idle, 1 - BO is busy */
499 /** CS status: 0 - CS completed, 1 - CS still busy */
566 /* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */
605 * From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support
633 /** Rendering context id */
668 * This will reset wave ID counters for the IB.
751 * Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU
761 /* get the crtc_id from the mode object id? */
771 /* Subquery id: Query VCE firmware version */
773 /* Subquery id: Query UVD firmware version */
775 /* Subquery id: Query GMC firmware version */
777 /* Subquery id: Query GFX ME firmware version */
779 /* Subquery id: Query GFX PFP firmware version */
781 /* Subquery id: Query GFX CE firmware version */
783 /* Subquery id: Query GFX RLC firmware version */
785 /* Subquery id: Query GFX MEC firmware version */
787 /* Subquery id: Query SMC firmware version */
789 /* Subquery id: Query SDMA firmware version */
791 /* Subquery id: Query PSP SOS firmware version */
793 /* Subquery id: Query PSP ASD firmware version */
795 /* Subquery id: Query VCN firmware version */
797 /* Subquery id: Query GFX RLC SRLC firmware version */
799 /* Subquery id: Query GFX RLC SRLG firmware version */
801 /* Subquery id: Query GFX RLC SRLS firmware version */
803 /* Subquery id: Query DMCU firmware version */
806 /* Subquery id: Query DMCUB firmware version */
808 /* Subquery id: Query TOC firmware version */
810 /* Subquery id: Query CAP firmware version */
812 /* Subquery id: Query GFX RLCP firmware version */
814 /* Subquery id: Query GFX RLCV firmware version */
816 /* Subquery id: Query MES_KIQ firmware version */
818 /* Subquery id: Query MES firmware version */
820 /* Subquery id: Query IMU firmware version */
822 /* Subquery id: Query VPE firmware version */
837 /* Query information about device: rev id, family, etc. */
849 /* Subquery id: Query vbios size */
851 /* Subquery id: Query vbios image */
853 /* Subquery id: Query vbios info */
859 /* Subquery id: Query GPU shader clock */
861 /* Subquery id: Query GPU memory clock */
863 /* Subquery id: Query GPU temperature */
865 /* Subquery id: Query GPU load */
867 /* Subquery id: Query average GPU power */
869 /* Subquery id: Query northbridge voltage */
871 /* Subquery id: Query graphics voltage */
873 /* Subquery id: Query GPU stable pstate shader clock */
875 /* Subquery id: Query GPU stable pstate memory clock */
877 /* Subquery id: Query GPU peak pstate shader clock */
879 /* Subquery id: Query GPU peak pstate memory clock */
881 /* Subquery id: Query input GPU power */
918 /* Subquery id: Decode */
920 /* Subquery id: Encode */
955 /* The query request id. */
960 __u32 id; member
1081 /** PCI Device ID */
1086 /** Revision id in PCI Config space */
1104 /* PCIe version (the smaller of the GPU and the CPU/motherboard) */
1113 /** Page table entry - fragment size */
1152 /* PCIe number of lanes (the smaller of the GPU and the CPU/motherboard) */
1266 * Supported GPU families
1289 * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude