Lines Matching +full:gfx +full:- +full:mem
1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
90 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
97 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
178 /* Flag that BO should be coherent across devices when using device-level
186 /* Set PTE.D and recompress during GTT->VRAM moves according to TILING flags. */
279 #define AMDGPU_CTX_PRIORITY_UNSET -2048
280 #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023
281 #define AMDGPU_CTX_PRIORITY_LOW -512
370 * @doorbell_offset: 32-bit offset of the doorbell in the doorbell bo.
385 * @queue_size: Size of the queue in bytes, this needs to be 256-byte
391 * This object must be at least 8 byte in size and aligned to 8-byte offset.
396 * This object must be at least 8 byte in size and aligned to 8-byte offset.
435 /* GFX V11 IP specific MQD parameters */
449 /* GFX V11 SDMA IP specific MQD parameters */
459 /* GFX V11 Compute IP specific MQD parameters */
644 /* SI-CI-VI: */
663 /* GFX9 - GFX11: */
746 /** BO status: 0 - BO is idle, 1 - BO is busy */
772 /** CS status: 0 - CS completed, 1 - CS still busy */
864 /* GEM_CREATE flags for re-creation of buffer */
890 /* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */
942 * From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support
1125 /* Subquery id: Query GFX ME firmware version */
1127 /* Subquery id: Query GFX PFP firmware version */
1129 /* Subquery id: Query GFX CE firmware version */
1131 /* Subquery id: Query GFX RLC firmware version */
1133 /* Subquery id: Query GFX MEC firmware version */
1145 /* Subquery id: Query GFX RLC SRLC firmware version */
1147 /* Subquery id: Query GFX RLC SRLG firmware version */
1149 /* Subquery id: Query GFX RLC SRLS firmware version */
1160 /* Subquery id: Query GFX RLCP firmware version */
1162 /* Subquery id: Query GFX RLCV firmware version */
1240 /* RAS MASK: GFX */
1351 /** GDS GFX partition size */
1357 /** GWS size per GFX partition */
1361 /** OA size per GFX partition */
1464 /** Page table entry - fragment size */
1475 /* gfx double offchip LDS buffers */
1558 /* GFX metadata BO sizes and alignment info (in bytes) */
1562 /* shadow area base virtual mem alignment */
1566 /* context save area base virtual mem alignment */
1575 struct drm_amdgpu_info_uq_fw_areas_gfx gfx;
1655 struct drm_amdgpu_info_uq_metadata_gfx gfx;
1683 * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude