Lines Matching +full:reserved +full:- +full:channels
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
58 /* DMIC max. four controllers for eight microphone channels */
61 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
93 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
98 uint32_t channels; member
101 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
106 uint32_t channels; member
108 /* reserved for future use */
109 uint32_t reserved[13]; member
112 /* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */
144 uint16_t reserved[3]; /**< Make sure the total size is 4 bytes aligned */ member
155 * range 1.0 - 3.2 MHz is usually supported microphones. Some microphones are
156 * multi-mode capable and there may be denied mic clock frequencies between
160 * The duty cycle could be set to 48-52% if not known. Generally these
164 * The microphone clock needs to be usually about 50-80 times the used audio
184 uint32_t reserved_1; /**< Reserved */
198 /* reserved for future use */
199 uint32_t reserved[5]; member