Lines Matching refs:CS42L42_PAGE_12
23 #define CS42L42_PAGE_12 0x1200 macro
283 #define CS42L42_MCLK_SRC_SEL (CS42L42_PAGE_12 + 0x01)
289 #define CS42L42_SPDIF_CLK_CFG (CS42L42_PAGE_12 + 0x02)
290 #define CS42L42_FSYNC_PW_LOWER (CS42L42_PAGE_12 + 0x03)
292 #define CS42L42_FSYNC_PW_UPPER (CS42L42_PAGE_12 + 0x04)
297 #define CS42L42_FSYNC_P_LOWER (CS42L42_PAGE_12 + 0x05)
299 #define CS42L42_FSYNC_P_UPPER (CS42L42_PAGE_12 + 0x06)
303 #define CS42L42_ASP_CLK_CFG (CS42L42_PAGE_12 + 0x07)
317 #define CS42L42_ASP_FRM_CFG (CS42L42_PAGE_12 + 0x08)
329 #define CS42L42_FS_RATE_EN (CS42L42_PAGE_12 + 0x09)
335 #define CS42L42_IN_ASRC_CLK (CS42L42_PAGE_12 + 0x0A)
341 #define CS42L42_OUT_ASRC_CLK (CS42L42_PAGE_12 + 0x0B)
346 #define CS42L42_PLL_DIV_CFG1 (CS42L42_PAGE_12 + 0x0C)