Lines Matching +full:trigger +full:- +full:external
17 * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
18 * three general-purpose 16-bit timers. These timers share one register bank.
22 * These TC blocks may have up to nine external pins: TCLK0..2 signals for
23 * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
37 * struct atmel_tcb_config - SoC data for a Timer/Counter Block
50 * struct atmel_tc - information about a Timer/Counter Block
80 /* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
85 * Two registers have block-wide controls. These are: configuring the three
86 * "external" clocks (or event sources) used by the timer channels; and
89 * "External" can mean "external to chip" using the TCLK0, TCLK1, or TCLK2
90 * signals. Or, it can mean "external to timer", using the TIOA output from
98 #define ATMEL_TC_TC0XC0S (3 << 0) /* external clock 0 source */
103 #define ATMEL_TC_TC1XC1S (3 << 2) /* external clock 1 source */
108 #define ATMEL_TC_TC2XC2S (3 << 4) /* external clock 2 source */
119 * when it's not "external") is silicon-specific. AT91 platforms use one
120 * set of definitions; AVR32 platforms use a different set. Don't hard-wire
130 * PWM output, and TIOB as either another PWM or as a trigger. Capture mode
139 #define ATMEL_TC_SWTRG (1 << 2) /* software trigger */
164 #define ATMEL_TC_ETRGEDG (3 << 8) /* external trigger edge */
169 #define ATMEL_TC_ABETRG (1 << 10) /* external trigger is TIOA? */
170 #define ATMEL_TC_CPCTRG (1 << 14) /* RC compare trigger enable */
185 #define ATMEL_TC_EEVTEDG (3 << 8) /* external event edge */
190 #define ATMEL_TC_EEVT (3 << 10) /* external event source */
195 #define ATMEL_TC_ENETRG (1 << 12) /* external event is trigger */
211 #define ATMEL_TC_AEEVT (3 << 20) /* external event changes TIOA */
216 #define ATMEL_TC_ASWTRG (3 << 22) /* software trigger changes TIOA */
231 #define ATMEL_TC_BEEVT (3 << 28) /* external event changes TIOB */
236 #define ATMEL_TC_BSWTRG (3 << 30) /* software trigger changes TIOB */
247 #define ATMEL_TC_SR 0x20 /* status (read-only) */
248 /* Status-only flags */
253 #define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */
254 #define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */
255 #define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */
265 #define ATMEL_TC_ETRGS (1 << 7) /* external trigger */