Lines Matching +full:irq +full:- +full:signals
17 * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds
18 * three general-purpose 16-bit timers. These timers share one register bank.
19 * Depending on the SOC, each timer may have its own clock and IRQ, or those
22 * These TC blocks may have up to nine external pins: TCLK0..2 signals for
23 * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM
31 * IRQ resources.
37 * struct atmel_tcb_config - SoC data for a Timer/Counter Block
50 * struct atmel_tc - information about a Timer/Counter Block
55 * @irq: irq for each of the three channels
61 * while on others, all TC channels share the same clock and IRQ.
66 * in @irq are actually the same IRQ.
73 int irq[3]; member
80 /* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */
85 * Two registers have block-wide controls. These are: configuring the three
90 * signals. Or, it can mean "external to timer", using the TIOA output from
119 * when it's not "external") is silicon-specific. AT91 platforms use one
120 * set of definitions; AVR32 platforms use a different set. Don't hard-wire
247 #define ATMEL_TC_SR 0x20 /* status (read-only) */
248 /* Status-only flags */
253 #define ATMEL_TC_IER 0x24 /* interrupt enable (write-only) */
254 #define ATMEL_TC_IDR 0x28 /* interrupt disable (write-only) */
255 #define ATMEL_TC_IMR 0x2c /* interrupt mask (read-only) */
257 /* Status and IRQ flags */