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1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Internal header file for Samsung S3C2410 serial ports (UART0-2)
11 * Internal header file for MX1ADS serial ports (UART1 & 2)
44 #define S3C2410_LCON_STOPB (1<<2)
47 #define S3C2440_UCON_CLKMASK (3<<10)
48 #define S3C2440_UCON_CLKSHIFT (10)
49 #define S3C2440_UCON_PCLK (0<<10)
50 #define S3C2440_UCON_UCLK (1<<10)
51 #define S3C2440_UCON_PCLK2 (2<<10)
52 #define S3C2440_UCON_FCLK (3<<10)
53 #define S3C2443_UCON_EPLL (3<<10)
55 #define S3C6400_UCON_CLKMASK (3<<10)
56 #define S3C6400_UCON_CLKSHIFT (10)
57 #define S3C6400_UCON_PCLK (0<<10)
58 #define S3C6400_UCON_PCLK2 (2<<10)
59 #define S3C6400_UCON_UCLK0 (1<<10)
60 #define S3C6400_UCON_UCLK1 (3<<10)
68 #define S3C2412_UCON_CLKMASK (3<<10)
69 #define S3C2412_UCON_CLKSHIFT (10)
70 #define S3C2412_UCON_UCLK (1<<10)
71 #define S3C2412_UCON_USYSCLK (3<<10)
72 #define S3C2412_UCON_PCLK (0<<10)
73 #define S3C2412_UCON_PCLK2 (2<<10)
75 #define S3C2410_UCON_CLKMASK (1 << 10)
76 #define S3C2410_UCON_CLKSHIFT (10)
77 #define S3C2410_UCON_UCLK (1<<10)
82 #define S3C2410_UCON_TXIRQMODE (1<<2)
96 #define S3C64XX_UCON_TXBURST_8 (2<<20)
101 #define S3C64XX_UCON_RXBURST_8 (2<<16)
107 #define S3C64XX_UCON_DMASUS_EN (1<<10)
112 #define S3C64XX_UCON_TXMODE_DMA (2<<2)
113 #define S3C64XX_UCON_TXMODE_CPU (1<<2)
114 #define S3C64XX_UCON_TXMODE_MASK (3<<2)
115 #define S3C64XX_UCON_RXMODE_DMA (2<<0)
122 #define S3C2410_UFCON_RXTRIG12 (2<<4)
127 #define S3C2440_UFCON_RXTRIG16 (2<<4)
132 #define S3C2440_UFCON_TXTRIG32 (2<<6)
136 #define S3C2410_UFCON_RESETTX (1<<2)
148 #define S3C2412_UMCON_AFC_48 (2<<5)
171 #define S3C2410_UTRSTAT_TXE (1<<2)
176 #define S3C2410_UERSTAT_FRAME (1<<2)
185 #define S3C2410_UMSTAT_DeltaCTS (1<<2)
196 #define S3C64XX_UINTM_TXD (2)
202 #define S5PV210_UCON_CLKMASK (1<<10)
203 #define S5PV210_UCON_CLKSHIFT (10)
204 #define S5PV210_UCON_PCLK (0<<10)
205 #define S5PV210_UCON_UCLK (1<<10)
209 #define S5PV210_UFCON_TXTRIG8 (2<<8)
218 #define S5PV210_UFCON_RXTRIG8 (2<<4)
234 #define S3C2410_UCON_CLKSEL2 (1 << 2)
276 /* configuration structure for per-machine configurations for the
280 * arch/arm/mach-s3c/ directory.