Lines Matching +full:shadow +full:- +full:interrupts

1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* All Broadcom Ethernet switches have a pseudo-PHY at address 30 which is used
94 #define MII_BCM54XX_EXP_SEL_WOL	0x0e00	/* Wake-on-LAN expansion select register */
111 #define MII_BCM54XX_INT_ANPR	0x0400	/* Auto-negotiation page received */
117 #define MII_BCM54XX_SHD		0x1c	/* 0x1c shadow registers */
131  * AUXILIARY CONTROL SHADOW ACCESS REGISTERS.  (PHY REG 0x18)
193  * BCM5482: Shadow registers
194  * Shadow values go into bits [14:10] of register 0x1c to select a shadow
212 /* 01010: Auto Power-Down */
231 /* 10011: SerDes 100-FX Control Register */
233 #define	BCM54616S_100FX_MODE		BIT(0)	/* 100-FX SerDes Enable */
241 #define BCM54XX_SHD_MODE_1000BX		BIT(0)	/* Enable 1000-X registers */
244  * EXPANSION SHADOW ACCESS REGISTERS.  (PHY REG 0x15, 0x16, and 0x17)
263 /* Top-MISC expansion registers */
275 #define BCM5482_SSD_1000BX_CTL		0x00	/* 1000BASE-X Control */
276 #define BCM5482_SSD_1000BX_CTL_PWRDOWN	0x0800	/* Power-down SSD */
279 #define BCM5482_SSD_SGMII_SLAVE_AD	0x0001	/* Slave auto-detection */
281 /* BroadR-Reach LRE Registers. */
286 #define MII_BCM54XX_LREANAA		0x04	/* LDS Auto-Negotiation Advertised Ability */
287 #define MII_BCM54XX_LREANAC		0x05	/* LDS Auto-Negotiation Advertised Control */
319 #define LRESR_LDSCOMPLETE		0x0020	/* LDS Auto-negotiation complete */
321 #define LRESR_LDSABILITY		0x0008	/* LDS auto-negotiation capable */
324 #define LRESR_ERCAP			0x0001	/* Ext-reg capability          */
326 /* LDS Auto-Negotiation Advertised Ability. */
380 /* Wake-on-LAN registers */
444 #define MII_BRCM_FET_IR_MASK		0x0100	/* Mask all interrupts */
451 #define MII_BRCM_FET_BT_SRE		0x0080	/* Shadow register enable */
454 /*** Shadow register definitions ***/
456 #define MII_BRCM_FET_SHDW_MISCCTRL	0x10	/* Shadow misc ctrl */
496 #define BCM54XX_ECD_CTRL_CROSS_SHORT_DIS	BIT(13)	/* disable inter-pair