7 #define PDO_TYPE_BATT		1
20 #define PDO_FIXED_DUAL_ROLE	(1 << 29) /* Power role swap supported */
21 #define PDO_FIXED_SUSPEND	(1 << 28) /* USB Suspend supported (Source) */
22 #define PDO_FIXED_HIGHER_CAP	(1 << 28) /* Requires more than vSafe5V (Sink) */
23 #define PDO_FIXED_EXTPOWER	(1 << 27) /* Externally powered */
24 #define PDO_FIXED_USB_COMM	(1 << 26) /* USB communications capable */
25 #define PDO_FIXED_DATA_SWAP	(1 << 25) /* Data role swap supported */
26 #define PDO_FIXED_VOLT_SHIFT	10	/* 50mV units */
29 #define PDO_FIXED_VOLT(mv)	((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)  argument
32 #define PDO_FIXED(mv, ma, flags)			\  argument
34 	 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
36 #define VSAFE5V 5000 /* mv units */
38 #define PDO_BATT_MAX_VOLT_SHIFT	20	/* 50mV units */
39 #define PDO_BATT_MIN_VOLT_SHIFT	10	/* 50mV units */
42 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)  argument
43 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)  argument
50 #define PDO_VAR_MAX_VOLT_SHIFT	20	/* 50mV units */
51 #define PDO_VAR_MIN_VOLT_SHIFT	10	/* 50mV units */
54 #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)  argument
55 #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)  argument
69 #define PDO_PPS_APDO_MAX_VOLT_SHIFT	17	/* 100mV units */
70 #define PDO_PPS_APDO_MIN_VOLT_SHIFT	8	/* 100mV units */
76 #define PDO_PPS_APDO_MIN_VOLT(mv)	\  argument
77 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
78 #define PDO_PPS_APDO_MAX_VOLT(mv)	\  argument
79 	((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
93 #define FRS_DEFAULT_POWER      1
103  * <26>     :: modal operation supported (1b == yes)
115 #define IDH_PTYPE_HUB           1
128 #define IDH_PTYPE_DFP_HUB       1
161  * <7>     :: Vconn required (AMA only, 0b == no, 1b == yes)
162  * <6>     :: Vbus required (AMA only, 0b == yes, 1b == no)
170 #define DEV_USB2_CAPABLE	(1 << 0)
171 #define DEV_USB2_BILLBOARD	(1 << 1)
172 #define DEV_USB3_CAPABLE	(1 << 2)
173 #define DEV_USB4_CAPABLE	(1 << 3)
181 #define AMA_VCONN_PWR_1W5	1
190 #define AMA_VCONN_REQ		1
194 #define AMA_VBUS_NOT_REQ	1
198 #define UFP_ALTMODE_TBT3	(1 << 0)
199 #define UFP_ALTMODE_RECFG	(1 << 1)
200 #define UFP_ALTMODE_NO_RECFG	(1 << 2)
204 #define UFP_USB32_GEN1		1
223 #define DFP_VDO_VER1_1		1
224 #define HOST_USB2_CAPABLE	(1 << 0)
225 #define HOST_USB3_CAPABLE	(1 << 1)
226 #define HOST_USB4_CAPABLE	(1 << 2)
242  * <16:13> :: cable latency (0001 == <10ns(~1m length))
244  * <10>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
249  * <4>     :: Vbus through cable (0b == no, 1b == yes)
250  * <3>     :: SOP" controller present? (0b == no, 1b == yes)
261  * <16:13> :: cable latency (0001 == <10ns(~1m length))
269  * Active Cable VDO 1 (PD Rev3.0+)
277  * <16:13> :: cable latency (0001 == <10ns(~1m length))
280  * <8>     :: SBU supported (0b == supported, 1b == not supported)
281  * <7>     :: SBU type (0b == passive, 1b == active)
283  * <4>     :: Vbus through cable (0b == no, 1b == yes)
284  * <3>     :: SOP" controller present? (0b == no, 1b == yes)
293 #define CABLE_BTYPE		1
298 #define CABLE_LATENCY_1M	1
309 #define PCABLE_VCONN_REQ	1
315 #define CABLE_MAX_VBUS_30V	1
321 #define ACABLE_SBU_NOT_SUPP	1
323 #define ACABLE_SBU_ACTIVE	1
327 #define CABLE_CURR_3A		1
332 #define CABLE_USBSS_U31_GEN1	1
337 #define CABLE_USB32_GEN1	1
363  * <11>    :: U3 to U0 transition mode (0b == direct, 1b == through U3S)
364  * <10>    :: Physical connection (0b == copper, 1b == optical)
365  * <9>     :: Active element (0b == redriver, 1b == retimer)
366  * <8>     :: USB4 supported (0b == yes, 1b == no)
368  * <5>     :: USB2 supported (0b == yes, 1b == no)
369  * <4>     :: USB3.2 supported (0b == yes, 1b == no)
370  * <3>     :: USB lanes supported (0b == one lane, 1b == two lanes)
371  * <2>     :: Optically isolated active cable (0b == no, 1b == yes)
372  * <1>     :: Reserved, Shall be set to zero
373  * <0>     :: USB gen (0b == gen1, 1b == gen2+)
377 #define ACAB2_U3_CLD_10MW	1
386 #define ACAB2_U3U0_U3S		1
388 #define ACAB2_PHY_OPTICAL	1
390 #define ACAB2_RETIMER		1
392 #define ACAB2_USB4_NOT_SUPP	1
394 #define ACAB2_USB2_NOT_SUPP	1
396 #define ACAB2_USB32_NOT_SUPP	1
398 #define ACAB2_LANES_TWO		1
400 #define ACAB2_OPT_ISO_YES	1
402 #define ACAB2_GEN_2_PLUS	1
416  * <11>    :: SSTX1 Directionality support (0b == fixed, 1b == cfgable)
431 #define PD_VDO_AMA_VCONN_REQ(vdo)	(((vdo) >> 4) & 1)
432 #define PD_VDO_AMA_VBUS_REQ(vdo)	(((vdo) >> 3) & 1)
435 #define AMA_USBSS_U31_GEN1	1
447  * <14>    :: Charge through current support (0b == 3A, 1b == 5A)
450  * <6:1>   :: Ground impedance
451  * <0>     :: Charge through support (0b == no, 1b == yes)
455 #define VPD_MAX_VBUS_30V	1
459 #define VPDCT_CURR_5A		1
461 #define VPDCT_SUPP		1
466 	 | ((gi) & 0x3f) << 1 | (ct))