Lines Matching full:9
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
100 #define M4U_PORT_L9_IMG_IMGI_T1_A MTK_M4U_ID(9, 0)
101 #define M4U_PORT_L9_IMG_IMGBI_T1_A MTK_M4U_ID(9, 1)
102 #define M4U_PORT_L9_IMG_IMGCI_T1_A MTK_M4U_ID(9, 2)
103 #define M4U_PORT_L9_IMG_SMTI_T1_A MTK_M4U_ID(9, 3)
104 #define M4U_PORT_L9_IMG_TNCSTI_T1_A MTK_M4U_ID(9, 4)
105 #define M4U_PORT_L9_IMG_TNCSTI_T4_A MTK_M4U_ID(9, 5)
106 #define M4U_PORT_L9_IMG_YUVO_T1_A MTK_M4U_ID(9, 6)
107 #define M4U_PORT_L9_IMG_TIMGO_T1_A MTK_M4U_ID(9, 7)
108 #define M4U_PORT_L9_IMG_YUVO_T2_A MTK_M4U_ID(9, 8)
109 #define M4U_PORT_L9_IMG_IMGI_T1_B MTK_M4U_ID(9, 9)
110 #define M4U_PORT_L9_IMG_IMGBI_T1_B MTK_M4U_ID(9, 10)
111 #define M4U_PORT_L9_IMG_IMGCI_T1_B MTK_M4U_ID(9, 11)
112 #define M4U_PORT_L9_IMG_YUVO_T5_A MTK_M4U_ID(9, 12)
113 #define M4U_PORT_L9_IMG_SMTI_T1_B MTK_M4U_ID(9, 13)
114 #define M4U_PORT_L9_IMG_TNCSO_T1_A MTK_M4U_ID(9, 14)
115 #define M4U_PORT_L9_IMG_SMTO_T1_A MTK_M4U_ID(9, 15)
116 #define M4U_PORT_L9_IMG_TNCSTO_T1_A MTK_M4U_ID(9, 16)
117 #define M4U_PORT_L9_IMG_YUVO_T2_B MTK_M4U_ID(9, 17)
118 #define M4U_PORT_L9_IMG_YUVO_T5_B MTK_M4U_ID(9, 18)
119 #define M4U_PORT_L9_IMG_SMTO_T1_B MTK_M4U_ID(9, 19)
131 #define M4U_PORT_L10_IMG_PIMGI_P1_A MTK_M4U_ID(10, 9)
157 #define M4U_PORT_L11_IMG_WPE_TNR_CQ1_A MTK_M4U_ID(11, 9)
169 #define M4U_PORT_L12_IMG_DVP_WDMA MTK_M4U_ID(12, 9)
181 #define M4U_PORT_L13_CAM_FAKE MTK_M4U_ID(13, 9)
193 #define M4U_PORT_L14_CAM_IPU2O MTK_M4U_ID(14, 9)
212 #define M4U_PORT_L16_CAM_RAWI_R4 MTK_M4U_ID(16, 9)
245 #define M4U_PORT_L19_JPGENC_Q_TABLE MTK_M4U_ID(19, 9)
274 #define M4U_PORT_L20_JPGENC_Q_TABLE MTK_M4U_ID(20, 9)
303 #define M4U_PORT_L21_VDEC_AVC_MV_EXT MTK_M4U_ID(21, 9)
315 #define M4U_PORT_L22_VDEC_AVC_MV_EXT MTK_M4U_ID(22, 9)
331 #define M4U_PORT_L24_VDEC_LAT1_PRED_RD_EXT MTK_M4U_ID(24, 9)
345 #define M4U_PORT_L25_CAM_MRAW2_IMGBO_M1 MTK_M4U_ID(25, 9)
359 #define M4U_PORT_L26_CAM_MRAW3_IMGBO_M1 MTK_M4U_ID(26, 9)
373 #define M4U_PORT_L27_CAM_RAWI_R4 MTK_M4U_ID(27, 9)