Lines Matching +full:- +full:8 +full:g

1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
13  * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16  * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
20  * modules    dma-address-region	larbs-ports
21  * disp         0 ~ 4G                  larb0/1/2/3
22  * vcodec      4G ~ 8G                  larb19/20/21/22/23/24
23  * cam/mdp     8G ~ 12G                 the other larbs.
24  * N/A         12G ~ 16G
29  * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30  * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
95 #define M4U_PORT_L8_IMG_WPE_RDMA0		MTK_M4U_ID(8, 0)
96 #define M4U_PORT_L8_IMG_WPE_RDMA1		MTK_M4U_ID(8, 1)
97 #define M4U_PORT_L8_IMG_WPE_WDMA0		MTK_M4U_ID(8, 2)
108 #define M4U_PORT_L9_IMG_YUVO_T2_A		MTK_M4U_ID(9, 8)
130 #define M4U_PORT_L10_IMG_SMTI_D6_A		MTK_M4U_ID(10, 8)
156 #define M4U_PORT_L11_IMG_WPE_TNR_CQ0_A		MTK_M4U_ID(11, 8)
168 #define M4U_PORT_L12_IMG_DVP_RDMA		MTK_M4U_ID(12, 8)
180 #define M4U_PORT_L13_CAM_PDAI_0			MTK_M4U_ID(13, 8)
192 #define M4U_PORT_L14_CAM_IPUO			MTK_M4U_ID(14, 8)
211 #define M4U_PORT_L16_CAM_UFDI_R3		MTK_M4U_ID(16, 8)
244 #define M4U_PORT_L19_JPGENC_C_RDMA		MTK_M4U_ID(19, 8)
273 #define M4U_PORT_L20_JPGENC_C_RDMA		MTK_M4U_ID(20, 8)
302 #define M4U_PORT_L21_VDEC_VLD2_EXT		MTK_M4U_ID(21, 8)
314 #define M4U_PORT_L22_VDEC_VLD2_EXT		MTK_M4U_ID(22, 8)
330 #define M4U_PORT_L24_VDEC_LAT1_AVC_MC_EXT	MTK_M4U_ID(24, 8)
344 #define M4U_PORT_L25_CAM_MRAW2_IMGO_M1		MTK_M4U_ID(25, 8)
358 #define M4U_PORT_L26_CAM_MRAW3_IMGO_M1		MTK_M4U_ID(26, 8)
372 #define M4U_PORT_L27_CAM_UFDI_R3		MTK_M4U_ID(27, 8)