Lines Matching refs:dpcd

47 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
49 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
53 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
56 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
134 bool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
135 bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
140 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
142 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
146 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
148 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
152 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
154 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
155 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
159 drm_dp_fast_training_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_fast_training_cap()
161 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_fast_training_cap()
162 (dpcd[DP_MAX_DOWNSPREAD] & DP_NO_AUX_HANDSHAKE_LINK_TRAINING); in drm_dp_fast_training_cap()
166 drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps3_supported()
168 return dpcd[DP_DPCD_REV] >= 0x12 && in drm_dp_tps3_supported()
169 dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED; in drm_dp_tps3_supported()
173 drm_dp_max_downspread(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_downspread()
175 return dpcd[DP_DPCD_REV] >= 0x11 || in drm_dp_max_downspread()
176 dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5; in drm_dp_max_downspread()
180 drm_dp_tps4_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps4_supported()
182 return dpcd[DP_DPCD_REV] >= 0x14 && in drm_dp_tps4_supported()
183 dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED; in drm_dp_tps4_supported()
187 drm_dp_training_pattern_mask(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_training_pattern_mask()
189 return (dpcd[DP_DPCD_REV] >= 0x14) ? DP_TRAINING_PATTERN_MASK_1_4 : in drm_dp_training_pattern_mask()
194 drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_is_branch()
196 return dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT; in drm_dp_is_branch()
251 drm_dp_channel_coding_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_channel_coding_supported()
253 return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_8B10B; in drm_dp_channel_coding_supported()
257 drm_dp_128b132b_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_128b132b_supported()
259 return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B; in drm_dp_128b132b_supported()
263 drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_alternate_scrambler_reset_cap()
265 return dpcd[DP_EDP_CONFIGURATION_CAP] & in drm_dp_alternate_scrambler_reset_cap()
271 drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_sink_can_do_video_without_timing_msa()
273 return dpcd[DP_DOWN_STREAM_PORT_COUNT] & in drm_dp_sink_can_do_video_without_timing_msa()
561 u8 dpcd[DP_RECEIVER_CAP_SIZE]);
574 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
576 bool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
578 bool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
581 int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
583 int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
586 int drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
589 int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
592 bool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
594 bool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
597 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
601 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
606 drm_dp_subconnector_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
610 const u8 *dpcd,
615 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
620 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
623 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
837 int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
859 bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],