Lines Matching +full:fpga +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0-only
3 * PIKA FPGA based Watchdog Timer
29 #define DRV_NAME "PIKA-WDT"
50 void __iomem *fpga; member
71 /* -- FPGA: Reset Control Register (32bit R/W) (Offset: 0x14) -- in pikawdt_reset()
76 * Bit 8-11, WTCHDG_TIMEOUT_SEC: Sets the watchdog timeout value in in pikawdt_reset()
80 unsigned reset = in_be32(pikawdt_private.fpga + 0x14); in pikawdt_reset()
81 /* enable with max timeout - 15 seconds */ in pikawdt_reset()
83 out_be32(pikawdt_private.fpga + 0x14, reset); in pikawdt_reset()
118 return -EBUSY; in pikawdt_open()
157 return -EFAULT; in pikawdt_write()
171 * Handle commands from user-space.
182 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; in pikawdt_ioctl()
196 return -EFAULT; in pikawdt_ioctl()
206 return -ENOTTY; in pikawdt_ioctl()
228 void __iomem *fpga; in pikawdt_init() local
232 np = of_find_compatible_node(NULL, NULL, "pika,fpga"); in pikawdt_init()
234 pr_err("Unable to find fpga\n"); in pikawdt_init()
235 return -ENOENT; in pikawdt_init()
238 pikawdt_private.fpga = of_iomap(np, 0); in pikawdt_init()
240 if (pikawdt_private.fpga == NULL) { in pikawdt_init()
241 pr_err("Unable to map fpga\n"); in pikawdt_init()
242 return -ENOMEM; in pikawdt_init()
245 ident.firmware_version = in_be32(pikawdt_private.fpga + 0x1c) & 0xffff; in pikawdt_init()
248 np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd"); in pikawdt_init()
250 pr_err("Unable to find fpga-sd\n"); in pikawdt_init()
251 ret = -ENOENT; in pikawdt_init()
255 fpga = of_iomap(np, 0); in pikawdt_init()
257 if (fpga == NULL) { in pikawdt_init()
258 pr_err("Unable to map fpga-sd\n"); in pikawdt_init()
259 ret = -ENOMEM; in pikawdt_init()
263 /* -- FPGA: POST Test Results Register 1 (32bit R/W) (Offset: 0x4040) -- in pikawdt_init()
267 post1 = in_be32(fpga + 0x40); in pikawdt_init()
271 iounmap(fpga); in pikawdt_init()
286 iounmap(pikawdt_private.fpga); in pikawdt_init()
294 iounmap(pikawdt_private.fpga); in pikawdt_exit()
301 MODULE_DESCRIPTION("PIKA FPGA based Watchdog Timer");