Lines Matching +full:wdt +full:- +full:enable +full:- +full:once

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Watchdog driver for Intel Keem Bay non-secure watchdog.
8 #include <linux/arm-smccc.h>
20 /* Non-secure watchdog register offsets */
47 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default = "
59 static inline u32 keembay_wdt_readl(struct keembay_wdt *wdt, u32 offset) in keembay_wdt_readl() argument
61 return readl(wdt->base + offset); in keembay_wdt_readl()
64 static inline void keembay_wdt_writel(struct keembay_wdt *wdt, u32 offset, u32 val) in keembay_wdt_writel() argument
66 writel(WDT_UNLOCK, wdt->base + TIM_SAFE); in keembay_wdt_writel()
67 writel(val, wdt->base + offset); in keembay_wdt_writel()
72 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_set_timeout_reg() local
74 keembay_wdt_writel(wdt, TIM_WATCHDOG, wdog->timeout * wdt->rate); in keembay_wdt_set_timeout_reg()
79 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_set_pretimeout_reg() local
82 if (wdog->pretimeout) in keembay_wdt_set_pretimeout_reg()
83 th_val = wdog->timeout - wdog->pretimeout; in keembay_wdt_set_pretimeout_reg()
85 keembay_wdt_writel(wdt, TIM_WATCHDOG_INT_THRES, th_val * wdt->rate); in keembay_wdt_set_pretimeout_reg()
90 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_start() local
92 keembay_wdt_writel(wdt, TIM_WDOG_EN, WDT_ENABLE); in keembay_wdt_start()
99 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_stop() local
101 keembay_wdt_writel(wdt, TIM_WDOG_EN, WDT_DISABLE); in keembay_wdt_stop()
115 wdog->timeout = t; in keembay_wdt_set_timeout()
124 if (t > wdog->timeout) in keembay_wdt_set_pretimeout()
125 return -EINVAL; in keembay_wdt_set_pretimeout()
127 wdog->pretimeout = t; in keembay_wdt_set_pretimeout()
135 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_get_timeleft() local
137 return keembay_wdt_readl(wdt, TIM_WATCHDOG) / wdt->rate; in keembay_wdt_get_timeleft()
146 struct keembay_wdt *wdt = dev_id; in keembay_wdt_to_isr() local
150 dev_crit(wdt->wdd.parent, "Intel Keem Bay non-secure wdt timeout.\n"); in keembay_wdt_to_isr()
158 struct keembay_wdt *wdt = dev_id; in keembay_wdt_th_isr() local
161 keembay_wdt_set_pretimeout(&wdt->wdd, 0x0); in keembay_wdt_th_isr()
164 dev_crit(wdt->wdd.parent, "Intel Keem Bay non-secure wdt pre-timeout.\n"); in keembay_wdt_th_isr()
165 watchdog_notify_pretimeout(&wdt->wdd); in keembay_wdt_th_isr()
190 struct device *dev = &pdev->dev; in keembay_wdt_probe()
191 struct keembay_wdt *wdt; in keembay_wdt_probe() local
194 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); in keembay_wdt_probe()
195 if (!wdt) in keembay_wdt_probe()
196 return -ENOMEM; in keembay_wdt_probe()
198 wdt->base = devm_platform_ioremap_resource(pdev, 0); in keembay_wdt_probe()
199 if (IS_ERR(wdt->base)) in keembay_wdt_probe()
200 return PTR_ERR(wdt->base); in keembay_wdt_probe()
202 /* we do not need to enable the clock as it is enabled by default */ in keembay_wdt_probe()
203 wdt->clk = devm_clk_get(dev, NULL); in keembay_wdt_probe()
204 if (IS_ERR(wdt->clk)) in keembay_wdt_probe()
205 return dev_err_probe(dev, PTR_ERR(wdt->clk), "Failed to get clock\n"); in keembay_wdt_probe()
207 wdt->rate = clk_get_rate(wdt->clk); in keembay_wdt_probe()
208 if (!wdt->rate) in keembay_wdt_probe()
209 return dev_err_probe(dev, -EINVAL, "Failed to get clock rate\n"); in keembay_wdt_probe()
211 wdt->th_irq = platform_get_irq_byname(pdev, "threshold"); in keembay_wdt_probe()
212 if (wdt->th_irq < 0) in keembay_wdt_probe()
213 return dev_err_probe(dev, wdt->th_irq, "Failed to get IRQ for threshold\n"); in keembay_wdt_probe()
215 ret = devm_request_irq(dev, wdt->th_irq, keembay_wdt_th_isr, 0, in keembay_wdt_probe()
216 "keembay-wdt", wdt); in keembay_wdt_probe()
220 wdt->to_irq = platform_get_irq_byname(pdev, "timeout"); in keembay_wdt_probe()
221 if (wdt->to_irq < 0) in keembay_wdt_probe()
222 return dev_err_probe(dev, wdt->to_irq, "Failed to get IRQ for timeout\n"); in keembay_wdt_probe()
224 ret = devm_request_irq(dev, wdt->to_irq, keembay_wdt_to_isr, 0, in keembay_wdt_probe()
225 "keembay-wdt", wdt); in keembay_wdt_probe()
229 wdt->wdd.parent = dev; in keembay_wdt_probe()
230 wdt->wdd.info = &keembay_wdt_info; in keembay_wdt_probe()
231 wdt->wdd.ops = &keembay_wdt_ops; in keembay_wdt_probe()
232 wdt->wdd.min_timeout = WDT_LOAD_MIN; in keembay_wdt_probe()
233 wdt->wdd.max_timeout = WDT_LOAD_MAX / wdt->rate; in keembay_wdt_probe()
234 wdt->wdd.timeout = WDT_TIMEOUT; in keembay_wdt_probe()
235 wdt->wdd.pretimeout = WDT_PRETIMEOUT; in keembay_wdt_probe()
237 watchdog_set_drvdata(&wdt->wdd, wdt); in keembay_wdt_probe()
238 watchdog_set_nowayout(&wdt->wdd, nowayout); in keembay_wdt_probe()
239 watchdog_init_timeout(&wdt->wdd, timeout, dev); in keembay_wdt_probe()
240 keembay_wdt_set_timeout(&wdt->wdd, wdt->wdd.timeout); in keembay_wdt_probe()
241 keembay_wdt_set_pretimeout(&wdt->wdd, wdt->wdd.pretimeout); in keembay_wdt_probe()
243 ret = devm_watchdog_register_device(dev, &wdt->wdd); in keembay_wdt_probe()
247 platform_set_drvdata(pdev, wdt); in keembay_wdt_probe()
249 wdt->wdd.timeout, nowayout ? ", nowayout" : ""); in keembay_wdt_probe()
256 struct keembay_wdt *wdt = dev_get_drvdata(dev); in keembay_wdt_suspend() local
258 if (watchdog_active(&wdt->wdd)) in keembay_wdt_suspend()
259 return keembay_wdt_stop(&wdt->wdd); in keembay_wdt_suspend()
266 struct keembay_wdt *wdt = dev_get_drvdata(dev); in keembay_wdt_resume() local
268 if (watchdog_active(&wdt->wdd)) in keembay_wdt_resume()
269 return keembay_wdt_start(&wdt->wdd); in keembay_wdt_resume()
278 { .compatible = "intel,keembay-wdt" },