Lines Matching +full:wdt +full:- +full:enable +full:- +full:once
1 // SPDX-License-Identifier: GPL-2.0
14 * ---- -----
15 * Registers: 32-bit 16-bit
17 * Need to enable clk: No Yes
34 #define DRIVER_NAME "imx2-wdt"
37 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
38 #define IMX2_WDT_WCR_WDW BIT(7) /* -> Watchdog disable for WAIT */
39 #define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
40 #define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
41 #define IMX2_WDT_WCR_WRE BIT(3) /* -> WDOG Reset Enable */
42 #define IMX2_WDT_WCR_WDE BIT(2) /* -> Watchdog Enable */
43 #define IMX2_WDT_WCR_WDZST BIT(0) /* -> Watchdog timer Suspend */
46 #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
47 #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
50 #define IMX2_WDT_WRSR_TOUT BIT(1) /* -> Reset due to Timeout */
53 #define IMX2_WDT_WICR_WIE BIT(15) /* -> Interrupt Enable */
54 #define IMX2_WDT_WICR_WTIS BIT(14) /* -> Interrupt Status */
55 #define IMX2_WDT_WICR_WICT 0xFF /* -> Interrupt Count Timeout */
62 #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
81 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
106 /* Use internal reset or external - not both */ in imx2_wdt_restart()
107 if (wdev->ext_reset) in imx2_wdt_restart()
110 wcr_enable |= IMX2_WDT_WCR_WDA; /* do not assert ext-reset */ in imx2_wdt_restart()
113 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable); in imx2_wdt_restart()
121 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable); in imx2_wdt_restart()
122 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable); in imx2_wdt_restart()
135 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val); in imx2_wdt_setup()
137 /* Suspend timer in low power mode, write once-only */ in imx2_wdt_setup()
139 /* Suspend timer in low power WAIT mode, write once-only */ in imx2_wdt_setup()
140 if (wdev->sleep_wait) in imx2_wdt_setup()
142 /* Strip the old watchdog Time-Out value */ in imx2_wdt_setup()
144 /* Generate internal chip-level reset if WDOG times out */ in imx2_wdt_setup()
145 if (!wdev->ext_reset) in imx2_wdt_setup()
147 /* Or if external-reset assert WDOG_B reset only on time-out */ in imx2_wdt_setup()
152 /* Set the watchdog's Time-Out value */ in imx2_wdt_setup()
153 val |= WDOG_SEC_TO_COUNT(wdog->timeout); in imx2_wdt_setup()
155 regmap_write(wdev->regmap, IMX2_WDT_WCR, val); in imx2_wdt_setup()
157 /* enable the watchdog */ in imx2_wdt_setup()
159 regmap_write(wdev->regmap, IMX2_WDT_WCR, val); in imx2_wdt_setup()
166 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val); in imx2_wdt_is_running()
175 if (!wdev->clk_is_on) in imx2_wdt_ping()
178 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1); in imx2_wdt_ping()
179 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2); in imx2_wdt_ping()
188 regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT, in __imx2_wdt_set_timeout()
199 wdog->timeout = new_timeout; in imx2_wdt_set_timeout()
209 return -EINVAL; in imx2_wdt_set_pretimeout()
211 wdog->pretimeout = new_pretimeout; in imx2_wdt_set_pretimeout()
213 regmap_update_bits(wdev->regmap, IMX2_WDT_WICR, in imx2_wdt_set_pretimeout()
224 regmap_write_bits(wdev->regmap, IMX2_WDT_WICR, in imx2_wdt_isr()
237 imx2_wdt_set_timeout(wdog, wdog->timeout); in imx2_wdt_start()
241 set_bit(WDOG_HW_RUNNING, &wdog->status); in imx2_wdt_start()
269 struct device *dev = &pdev->dev; in imx2_wdt_probe()
278 return -ENOMEM; in imx2_wdt_probe()
284 wdev->regmap = devm_regmap_init_mmio_clk(dev, NULL, base, in imx2_wdt_probe()
286 if (IS_ERR(wdev->regmap)) { in imx2_wdt_probe()
288 return PTR_ERR(wdev->regmap); in imx2_wdt_probe()
291 wdev->clk = devm_clk_get(dev, NULL); in imx2_wdt_probe()
292 if (IS_ERR(wdev->clk)) { in imx2_wdt_probe()
294 return PTR_ERR(wdev->clk); in imx2_wdt_probe()
297 wdog = &wdev->wdog; in imx2_wdt_probe()
298 wdog->info = &imx2_wdt_info; in imx2_wdt_probe()
299 wdog->ops = &imx2_wdt_ops; in imx2_wdt_probe()
300 wdog->min_timeout = 1; in imx2_wdt_probe()
301 wdog->timeout = IMX2_WDT_DEFAULT_TIME; in imx2_wdt_probe()
302 wdog->max_hw_heartbeat_ms = IMX2_WDT_MAX_TIME * 1000; in imx2_wdt_probe()
303 wdog->parent = dev; in imx2_wdt_probe()
305 wdev->data = of_device_get_match_data(dev); in imx2_wdt_probe()
311 wdog->info = &imx2_wdt_pretimeout_info; in imx2_wdt_probe()
313 ret = clk_prepare_enable(wdev->clk); in imx2_wdt_probe()
317 ret = devm_add_action_or_reset(dev, imx2_wdt_action, wdev->clk); in imx2_wdt_probe()
321 wdev->clk_is_on = true; in imx2_wdt_probe()
323 regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val); in imx2_wdt_probe()
324 wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0; in imx2_wdt_probe()
326 wdev->ext_reset = of_property_read_bool(dev->of_node, in imx2_wdt_probe()
327 "fsl,ext-reset-output"); in imx2_wdt_probe()
329 if (of_property_read_bool(dev->of_node, "fsl,suspend-in-wait")) { in imx2_wdt_probe()
330 if (!wdev->data->wdw_supported) { in imx2_wdt_probe()
331 dev_err(dev, "suspend-in-wait not supported\n"); in imx2_wdt_probe()
332 return -EINVAL; in imx2_wdt_probe()
334 wdev->sleep_wait = true; in imx2_wdt_probe()
339 * during suspend. Interaction with "fsl,suspend-in-wait" is unknown! in imx2_wdt_probe()
341 wdev->no_ping = !of_device_is_compatible(dev->of_node, "fsl,imx7d-wdt"); in imx2_wdt_probe()
347 if (wdev->no_ping) in imx2_wdt_probe()
351 imx2_wdt_set_timeout(wdog, wdog->timeout); in imx2_wdt_probe()
352 set_bit(WDOG_HW_RUNNING, &wdog->status); in imx2_wdt_probe()
360 regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0); in imx2_wdt_probe()
377 dev_crit(&pdev->dev, "Device shutdown.\n"); in imx2_wdt_shutdown()
381 /* Disable watchdog if it is active or non-active but still running */
390 * Don't update wdog->timeout, we'll restore the current value in imx2_wdt_suspend()
397 if (wdev->no_ping) { in imx2_wdt_suspend()
398 clk_disable_unprepare(wdev->clk); in imx2_wdt_suspend()
400 wdev->clk_is_on = false; in imx2_wdt_suspend()
406 /* Enable watchdog and configure it if necessary */
413 if (wdev->no_ping) { in imx2_wdt_resume()
414 ret = clk_prepare_enable(wdev->clk); in imx2_wdt_resume()
419 wdev->clk_is_on = true; in imx2_wdt_resume()
431 imx2_wdt_set_timeout(wdog, wdog->timeout); in imx2_wdt_resume()
450 { .compatible = "fsl,imx21-wdt", .data = &imx_wdt_legacy },
451 { .compatible = "fsl,imx25-wdt", .data = &imx_wdt },
452 { .compatible = "fsl,imx27-wdt", .data = &imx_wdt_legacy },
453 { .compatible = "fsl,imx31-wdt", .data = &imx_wdt_legacy },
454 { .compatible = "fsl,imx35-wdt", .data = &imx_wdt },
455 { .compatible = "fsl,imx50-wdt", .data = &imx_wdt },
456 { .compatible = "fsl,imx51-wdt", .data = &imx_wdt },
457 { .compatible = "fsl,imx53-wdt", .data = &imx_wdt },
458 { .compatible = "fsl,imx6q-wdt", .data = &imx_wdt },
459 { .compatible = "fsl,imx6sl-wdt", .data = &imx_wdt },
460 { .compatible = "fsl,imx6sll-wdt", .data = &imx_wdt },
461 { .compatible = "fsl,imx6sx-wdt", .data = &imx_wdt },
462 { .compatible = "fsl,imx6ul-wdt", .data = &imx_wdt },
463 { .compatible = "fsl,imx7d-wdt", .data = &imx_wdt },
464 { .compatible = "fsl,imx8mm-wdt", .data = &imx_wdt },
465 { .compatible = "fsl,imx8mn-wdt", .data = &imx_wdt },
466 { .compatible = "fsl,imx8mp-wdt", .data = &imx_wdt },
467 { .compatible = "fsl,imx8mq-wdt", .data = &imx_wdt },
468 { .compatible = "fsl,ls1012a-wdt", .data = &imx_wdt_legacy },
469 { .compatible = "fsl,ls1043a-wdt", .data = &imx_wdt_legacy },
470 { .compatible = "fsl,vf610-wdt", .data = &imx_wdt },