1 // SPDX-License-Identifier: GPL-2.0+
3  * Watchdog driver for Atmel AT91SAM9x processors.
5  * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
10  * The Watchdog Timer Mode Register can be only written to once. If the
28 #include <linux/watchdog.h>
30 #include <linux/timer.h>
38 #define DRV_NAME "AT91SAM9 Watchdog"
41 	readl_relaxed((wdt)->base + (field))
43 	writel_relaxed((val), (wdt)->base + (field))
45 /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
46  * use this to convert a watchdog
52 #define secs_to_ticks(s)		((s) ? (((s) << 8) - 1) : 0)
56 /* Watchdog max counter value in ticks */
59 /* Watchdog max delta/value in secs */
65 /* Timer heartbeat (500ms) */
72 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
77 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
84 	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
85 	struct timer_list timer;	/* The timer that pings the watchdog */  member
110  * Reload the watchdog timer.  (ie, pat the watchdog)
118  * Timer tick
122 	struct at91wdt *wdt = from_timer(wdt, t, timer);  in at91_ping()
123 	if (time_before(jiffies, wdt->next_heartbeat) ||  in at91_ping()
124 	    !watchdog_active(&wdt->wdd)) {  in at91_ping()
126 		mod_timer(&wdt->timer, jiffies + wdt->heartbeat);  in at91_ping()
136 	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;  in at91_wdt_start()
142 	/* The watchdog timer hardware can not be stopped... */  in at91_wdt_stop()
148 	wdd->timeout = new_timeout;  in at91_wdt_set_timeout()
158 	u32 mask = wdt->mr_mask;  in at91_wdt_init()
161 	struct device *dev = &pdev->dev;  in at91_wdt_init()
164 	if ((tmp & mask) != (wdt->mr & mask)) {  in at91_wdt_init()
166 			wdt_write(wdt, AT91_WDT_MR, wdt->mr);  in at91_wdt_init()
172 		if (wdt->mr & AT91_WDT_WDDIS)  in at91_wdt_init()
174 		dev_err(dev, "watchdog is disabled\n");  in at91_wdt_init()
175 		return -EINVAL;  in at91_wdt_init()
182 		min_heartbeat = ticks_to_hz_roundup(value - delta);  in at91_wdt_init()
188 		return -EINVAL;  in at91_wdt_init()
192 	 * Try to reset the watchdog counter 4 or 2 times more often than  in at91_wdt_init()
193 	 * actually requested, to avoid spurious watchdog reset.  in at91_wdt_init()
198 		wdt->heartbeat = max_heartbeat / 4;  in at91_wdt_init()
200 		wdt->heartbeat = max_heartbeat / 2;  in at91_wdt_init()
202 		wdt->heartbeat = min_heartbeat;  in at91_wdt_init()
208 	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {  in at91_wdt_init()
209 		err = devm_request_irq(dev, wdt->irq, wdt_interrupt,  in at91_wdt_init()
211 				       pdev->name, wdt);  in at91_wdt_init()
216 	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))  in at91_wdt_init()
218 			 "watchdog already configured differently (mr = %x expecting %x)\n",  in at91_wdt_init()
219 			 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);  in at91_wdt_init()
221 	timer_setup(&wdt->timer, at91_ping, 0);  in at91_wdt_init()
224 	 * Use min_heartbeat the first time to avoid spurious watchdog reset:  in at91_wdt_init()
225 	 * we don't know for how long the watchdog counter is running, and  in at91_wdt_init()
226 	 *  - resetting it right now might trigger a watchdog fault reset  in at91_wdt_init()
227 	 *  - waiting for heartbeat time might lead to a watchdog timeout  in at91_wdt_init()
230 	mod_timer(&wdt->timer, jiffies + min_heartbeat);  in at91_wdt_init()
233 	if (watchdog_init_timeout(&wdt->wdd, 0, dev))  in at91_wdt_init()
234 		watchdog_init_timeout(&wdt->wdd, heartbeat, dev);  in at91_wdt_init()
235 	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);  in at91_wdt_init()
236 	err = watchdog_register_device(&wdt->wdd);  in at91_wdt_init()
240 	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;  in at91_wdt_init()
245 	del_timer(&wdt->timer);  in at91_wdt_init()
272 	wdt->irq = irq_of_parse_and_map(np, 0);  in of_at91wdt_init()
273 	if (!wdt->irq)  in of_at91wdt_init()
274 		dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");  in of_at91wdt_init()
276 	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,  in of_at91wdt_init()
281 		if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",  in of_at91wdt_init()
284 				min = max - 1;  in of_at91wdt_init()
291 	wdt->mr_mask = 0x3FFFFFFF;  in of_at91wdt_init()
292 	wdt->mr = 0;  in of_at91wdt_init()
293 	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&  in of_at91wdt_init()
295 		wdt->mr |= AT91_WDT_WDFIEN;  in of_at91wdt_init()
296 		wdt->mr_mask &= ~AT91_WDT_WDRPROC;  in of_at91wdt_init()
298 		wdt->mr |= AT91_WDT_WDRSTEN;  in of_at91wdt_init()
301 	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&  in of_at91wdt_init()
303 		wdt->mr |= AT91_WDT_WDRPROC;  in of_at91wdt_init()
306 		wdt->mr |= AT91_WDT_WDDIS;  in of_at91wdt_init()
307 		wdt->mr_mask &= AT91_WDT_WDDIS;  in of_at91wdt_init()
310 	if (of_property_read_bool(np, "atmel,idle-halt"))  in of_at91wdt_init()
311 		wdt->mr |= AT91_WDT_WDIDLEHLT;  in of_at91wdt_init()
313 	if (of_property_read_bool(np, "atmel,dbg-halt"))  in of_at91wdt_init()
314 		wdt->mr |= AT91_WDT_WDDBGHLT;  in of_at91wdt_init()
316 	wdt->mr |= max | ((max - min) << 16);  in of_at91wdt_init()
332 	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);  in at91wdt_probe()
334 		return -ENOMEM;  in at91wdt_probe()
336 	wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |  in at91wdt_probe()
338 	wdt->mr_mask = 0x3FFFFFFF;  in at91wdt_probe()
339 	wdt->nowayout = nowayout;  in at91wdt_probe()
340 	wdt->wdd.parent = &pdev->dev;  in at91wdt_probe()
341 	wdt->wdd.info = &at91_wdt_info;  in at91wdt_probe()
342 	wdt->wdd.ops = &at91_wdt_ops;  in at91wdt_probe()
343 	wdt->wdd.timeout = WDT_HEARTBEAT;  in at91wdt_probe()
344 	wdt->wdd.min_timeout = 1;  in at91wdt_probe()
345 	wdt->wdd.max_timeout = 0xFFFF;  in at91wdt_probe()
347 	wdt->base = devm_platform_ioremap_resource(pdev, 0);  in at91wdt_probe()
348 	if (IS_ERR(wdt->base))  in at91wdt_probe()
349 		return PTR_ERR(wdt->base);  in at91wdt_probe()
351 	wdt->sclk = devm_clk_get_enabled(&pdev->dev, NULL);  in at91wdt_probe()
352 	if (IS_ERR(wdt->sclk)) {  in at91wdt_probe()
353 		dev_err(&pdev->dev, "Could not enable slow clock\n");  in at91wdt_probe()
354 		return PTR_ERR(wdt->sclk);  in at91wdt_probe()
357 	if (pdev->dev.of_node) {  in at91wdt_probe()
358 		err = of_at91wdt_init(pdev->dev.of_node, wdt);  in at91wdt_probe()
370 		wdt->wdd.timeout, wdt->nowayout);  in at91wdt_probe()
378 	watchdog_unregister_device(&wdt->wdd);  in at91wdt_remove()
381 	del_timer(&wdt->timer);  in at91wdt_remove()
386 	{ .compatible = "atmel,at91sam9260-wdt" },
403 MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
404 MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");