Lines Matching +full:wdt +full:- +full:timeout
1 // SPDX-License-Identifier: GPL-2.0+
35 * Counters ID 2 and 3 are enabled by default even before U-Boot loads,
66 static unsigned int timeout; variable
67 module_param(timeout, int, 0);
68 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
76 struct watchdog_device wdt; member
79 u64 timeout; /* in clock ticks */ member
89 * when low is read, high is latched into flip-flops so that it can be in get_counter_value()
92 val = readl(dev->reg + CNTR_COUNT_LOW(id)); in get_counter_value()
93 val |= ((u64)readl(dev->reg + CNTR_COUNT_HIGH(id))) << 32; in get_counter_value()
100 writel(val & 0xffffffff, dev->reg + CNTR_COUNT_LOW(id)); in set_counter_value()
101 writel(val >> 32, dev->reg + CNTR_COUNT_HIGH(id)); in set_counter_value()
108 reg = readl(dev->reg + CNTR_CTRL(id)); in counter_enable()
110 writel(reg, dev->reg + CNTR_CTRL(id)); in counter_enable()
117 reg = readl(dev->reg + CNTR_CTRL(id)); in counter_disable()
119 writel(reg, dev->reg + CNTR_CTRL(id)); in counter_disable()
127 reg = readl(dev->reg + CNTR_CTRL(id)); in init_counter()
141 writel(reg, dev->reg + CNTR_CTRL(id)); in init_counter()
144 static int armada_37xx_wdt_ping(struct watchdog_device *wdt) in armada_37xx_wdt_ping() argument
146 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_ping()
155 static unsigned int armada_37xx_wdt_get_timeleft(struct watchdog_device *wdt) in armada_37xx_wdt_get_timeleft() argument
157 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_get_timeleft()
161 do_div(res, dev->clk_rate); in armada_37xx_wdt_get_timeleft()
166 static int armada_37xx_wdt_set_timeout(struct watchdog_device *wdt, in armada_37xx_wdt_set_timeout() argument
167 unsigned int timeout) in armada_37xx_wdt_set_timeout() argument
169 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_set_timeout()
171 wdt->timeout = timeout; in armada_37xx_wdt_set_timeout()
174 * Compute the timeout in clock rate. We use smallest possible in armada_37xx_wdt_set_timeout()
178 dev->timeout = (u64)dev->clk_rate * timeout; in armada_37xx_wdt_set_timeout()
179 do_div(dev->timeout, CNTR_CTRL_PRESCALE_MIN); in armada_37xx_wdt_set_timeout()
181 set_counter_value(dev, CNTR_ID_WDOG, dev->timeout); in armada_37xx_wdt_set_timeout()
190 regmap_read(dev->cpu_misc, WDT_TIMER_SELECT, ®); in armada_37xx_wdt_is_running()
194 reg = readl(dev->reg + CNTR_CTRL(CNTR_ID_WDOG)); in armada_37xx_wdt_is_running()
198 static int armada_37xx_wdt_start(struct watchdog_device *wdt) in armada_37xx_wdt_start() argument
200 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_start()
203 regmap_write(dev->cpu_misc, WDT_TIMER_SELECT, WDT_TIMER_SELECT_VAL); in armada_37xx_wdt_start()
212 set_counter_value(dev, CNTR_ID_WDOG, dev->timeout); in armada_37xx_wdt_start()
223 static int armada_37xx_wdt_stop(struct watchdog_device *wdt) in armada_37xx_wdt_stop() argument
225 struct armada_37xx_watchdog *dev = watchdog_get_drvdata(wdt); in armada_37xx_wdt_stop()
229 regmap_write(dev->cpu_misc, WDT_TIMER_SELECT, 0); in armada_37xx_wdt_stop()
254 dev = devm_kzalloc(&pdev->dev, sizeof(struct armada_37xx_watchdog), in armada_37xx_wdt_probe()
257 return -ENOMEM; in armada_37xx_wdt_probe()
259 dev->wdt.info = &armada_37xx_wdt_info; in armada_37xx_wdt_probe()
260 dev->wdt.ops = &armada_37xx_wdt_ops; in armada_37xx_wdt_probe()
262 regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in armada_37xx_wdt_probe()
263 "marvell,system-controller"); in armada_37xx_wdt_probe()
266 dev->cpu_misc = regmap; in armada_37xx_wdt_probe()
268 dev->reg = devm_platform_ioremap_resource(pdev, 0); in armada_37xx_wdt_probe()
269 if (IS_ERR(dev->reg)) in armada_37xx_wdt_probe()
270 return PTR_ERR(dev->reg); in armada_37xx_wdt_probe()
273 dev->clk = devm_clk_get_enabled(&pdev->dev, NULL); in armada_37xx_wdt_probe()
274 if (IS_ERR(dev->clk)) in armada_37xx_wdt_probe()
275 return PTR_ERR(dev->clk); in armada_37xx_wdt_probe()
277 dev->clk_rate = clk_get_rate(dev->clk); in armada_37xx_wdt_probe()
278 if (!dev->clk_rate) in armada_37xx_wdt_probe()
279 return -EINVAL; in armada_37xx_wdt_probe()
282 * Since the timeout in seconds is given as 32 bit unsigned int, and in armada_37xx_wdt_probe()
284 * rate the counter can hold timeout of UINT_MAX seconds. in armada_37xx_wdt_probe()
286 dev->wdt.min_timeout = 1; in armada_37xx_wdt_probe()
287 dev->wdt.max_timeout = UINT_MAX; in armada_37xx_wdt_probe()
288 dev->wdt.parent = &pdev->dev; in armada_37xx_wdt_probe()
291 dev->wdt.timeout = WATCHDOG_TIMEOUT; in armada_37xx_wdt_probe()
292 watchdog_init_timeout(&dev->wdt, timeout, &pdev->dev); in armada_37xx_wdt_probe()
294 platform_set_drvdata(pdev, &dev->wdt); in armada_37xx_wdt_probe()
295 watchdog_set_drvdata(&dev->wdt, dev); in armada_37xx_wdt_probe()
297 armada_37xx_wdt_set_timeout(&dev->wdt, dev->wdt.timeout); in armada_37xx_wdt_probe()
300 set_bit(WDOG_HW_RUNNING, &dev->wdt.status); in armada_37xx_wdt_probe()
302 watchdog_set_nowayout(&dev->wdt, nowayout); in armada_37xx_wdt_probe()
303 watchdog_stop_on_reboot(&dev->wdt); in armada_37xx_wdt_probe()
304 ret = devm_watchdog_register_device(&pdev->dev, &dev->wdt); in armada_37xx_wdt_probe()
308 dev_info(&pdev->dev, "Initial timeout %d sec%s\n", in armada_37xx_wdt_probe()
309 dev->wdt.timeout, nowayout ? ", nowayout" : ""); in armada_37xx_wdt_probe()
316 struct watchdog_device *wdt = dev_get_drvdata(dev); in armada_37xx_wdt_suspend() local
318 return armada_37xx_wdt_stop(wdt); in armada_37xx_wdt_suspend()
323 struct watchdog_device *wdt = dev_get_drvdata(dev); in armada_37xx_wdt_resume() local
325 if (watchdog_active(wdt)) in armada_37xx_wdt_resume()
326 return armada_37xx_wdt_start(wdt); in armada_37xx_wdt_resume()
338 { .compatible = "marvell,armada-3700-wdt", },