1 // SPDX-License-Identifier: GPL-2.0-only
46 MODULE_PARM_DESC(w1_id, "1-wire id for the slave detection in HDQ mode");
56 	/* mode: 0-HDQ 1-W1 */
57 	int                     mode;  member
64 	return __raw_readl(hdq_data->hdq_base + offset);  in hdq_reg_in()
69 	__raw_writel(val, hdq_data->hdq_base + offset);  in hdq_reg_out()
75 	u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask)  in hdq_reg_merge()
77 	__raw_writel(new_val, hdq_data->hdq_base + offset);  in hdq_reg_merge()
83  * Wait for one or more bits in flag change.
84  * HDQ_FLAG_SET: wait until any bit in the flag is set.
85  * HDQ_FLAG_CLEAR: wait until all bits in the flag are cleared.
86  * return 0 on success and -ETIMEDOUT in the case of timeout.
89 		u8 flag, u8 flag_set, u8 *status)  in hdq_wait_for_flag()  argument
95 		/* wait for the flag clear */  in hdq_wait_for_flag()
96 		while (((*status = hdq_reg_in(hdq_data, offset)) & flag)  in hdq_wait_for_flag()
100 		if (*status & flag)  in hdq_wait_for_flag()
101 			ret = -ETIMEDOUT;  in hdq_wait_for_flag()
103 		/* wait for the flag set */  in hdq_wait_for_flag()
104 		while (!((*status = hdq_reg_in(hdq_data, offset)) & flag)  in hdq_wait_for_flag()
108 		if (!(*status & flag))  in hdq_wait_for_flag()
109 			ret = -ETIMEDOUT;  in hdq_wait_for_flag()
111 		return -EINVAL;  in hdq_wait_for_flag()
122 	spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags);  in hdq_reset_irqstatus()
123 	status = hdq_data->hdq_irqstatus;  in hdq_reset_irqstatus()
124 	/* this is a read-modify-write */  in hdq_reset_irqstatus()
125 	hdq_data->hdq_irqstatus &= ~bits;  in hdq_reset_irqstatus()
126 	spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags);  in hdq_reset_irqstatus()
137 	ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);  in hdq_write_byte()
139 		ret = -EINTR;  in hdq_write_byte()
143 	if (hdq_data->hdq_irqstatus)  in hdq_write_byte()
144 		dev_err(hdq_data->dev, "TX irqstatus not cleared (%02x)\n",  in hdq_write_byte()
145 			hdq_data->hdq_irqstatus);  in hdq_write_byte()
156 		(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_TXCOMPLETE),  in hdq_write_byte()
160 		dev_dbg(hdq_data->dev, "TX wait elapsed\n");  in hdq_write_byte()
161 		ret = -ETIMEDOUT;  in hdq_write_byte()
167 		dev_dbg(hdq_data->dev, "timeout waiting for"  in hdq_write_byte()
169 		ret = -ETIMEDOUT;  in hdq_write_byte()
178 		dev_dbg(hdq_data->dev, "timeout waiting GO bit"  in hdq_write_byte()
183 	mutex_unlock(&hdq_data->hdq_mutex);  in hdq_write_byte()
194 	spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags);  in hdq_isr()
195 	hdq_data->hdq_irqstatus |= hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS);  in hdq_isr()
196 	spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags);  in hdq_isr()
197 	dev_dbg(hdq_data->dev, "hdq_isr: %x\n", hdq_data->hdq_irqstatus);  in hdq_isr()
199 	if (hdq_data->hdq_irqstatus &  in hdq_isr()
209 /* W1 search callback function  in HDQ mode */
222 	 * HDQ might not obey truly the 1-wire spec.  in omap_w1_search_bus()
237 	ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);  in omap_hdq_break()
239 		dev_dbg(hdq_data->dev, "Could not acquire mutex\n");  in omap_hdq_break()
240 		ret = -EINTR;  in omap_hdq_break()
244 	if (hdq_data->hdq_irqstatus)  in omap_hdq_break()
245 		dev_err(hdq_data->dev, "break irqstatus not cleared (%02x)\n",  in omap_hdq_break()
246 			hdq_data->hdq_irqstatus);  in omap_hdq_break()
256 		(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_TIMEOUT),  in omap_hdq_break()
260 		dev_dbg(hdq_data->dev, "break wait elapsed\n");  in omap_hdq_break()
261 		ret = -EINTR;  in omap_hdq_break()
267 		dev_dbg(hdq_data->dev, "timeout waiting for TIMEOUT, %x\n",  in omap_hdq_break()
269 		ret = -ETIMEDOUT;  in omap_hdq_break()
279 		dev_dbg(hdq_data->dev, "Presence bit not set\n");  in omap_hdq_break()
280 		ret = -ETIMEDOUT;  in omap_hdq_break()
286 	 * zero wait time expected for interrupt mode.  in omap_hdq_break()
293 		dev_dbg(hdq_data->dev, "timeout waiting INIT&GO bits"  in omap_hdq_break()
297 	mutex_unlock(&hdq_data->hdq_mutex);  in omap_hdq_break()
307 	ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);  in hdq_read_byte()
309 		ret = -EINTR;  in hdq_read_byte()
313 	if (pm_runtime_suspended(hdq_data->dev)) {  in hdq_read_byte()
314 		ret = -EINVAL;  in hdq_read_byte()
318 	if (!(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_RXCOMPLETE)) {  in hdq_read_byte()
326 				   (hdq_data->hdq_irqstatus  in hdq_read_byte()
338 			dev_dbg(hdq_data->dev, "timeout waiting for"  in hdq_read_byte()
340 			ret = -ETIMEDOUT;  in hdq_read_byte()
349 	mutex_unlock(&hdq_data->hdq_mutex);  in hdq_read_byte()
356  * W1 triplet callback function - used for searching ROM addresses.
357  * Registered only when controller is in 1-wire mode.
369 	err = pm_runtime_get_sync(hdq_data->dev);  in omap_w1_triplet()
371 		pm_runtime_put_noidle(hdq_data->dev);  in omap_w1_triplet()
376 	err = mutex_lock_interruptible(&hdq_data->hdq_mutex);  in omap_w1_triplet()
378 		dev_dbg(hdq_data->dev, "Could not acquire mutex\n");  in omap_w1_triplet()
386 				 (hdq_data->hdq_irqstatus  in omap_w1_triplet()
393 		dev_dbg(hdq_data->dev, "RX wait elapsed\n");  in omap_w1_triplet()
402 				 (hdq_data->hdq_irqstatus  in omap_w1_triplet()
409 		dev_dbg(hdq_data->dev, "RX wait elapsed\n");  in omap_w1_triplet()
431 				 (hdq_data->hdq_irqstatus  in omap_w1_triplet()
438 		dev_dbg(hdq_data->dev, "TX wait elapsed\n");  in omap_w1_triplet()
446 	mutex_unlock(&hdq_data->hdq_mutex);  in omap_w1_triplet()
448 	pm_runtime_mark_last_busy(hdq_data->dev);  in omap_w1_triplet()
449 	pm_runtime_put_autosuspend(hdq_data->dev);  in omap_w1_triplet()
460 	err = pm_runtime_get_sync(hdq_data->dev);  in omap_w1_reset_bus()
462 		pm_runtime_put_noidle(hdq_data->dev);  in omap_w1_reset_bus()
469 	pm_runtime_mark_last_busy(hdq_data->dev);  in omap_w1_reset_bus()
470 	pm_runtime_put_autosuspend(hdq_data->dev);  in omap_w1_reset_bus()
482 	ret = pm_runtime_get_sync(hdq_data->dev);  in omap_w1_read_byte()
484 		pm_runtime_put_noidle(hdq_data->dev);  in omap_w1_read_byte()
486 		return -1;  in omap_w1_read_byte()
491 		val = -1;  in omap_w1_read_byte()
493 	pm_runtime_mark_last_busy(hdq_data->dev);  in omap_w1_read_byte()
494 	pm_runtime_put_autosuspend(hdq_data->dev);  in omap_w1_read_byte()
506 	ret = pm_runtime_get_sync(hdq_data->dev);  in omap_w1_write_byte()
508 		pm_runtime_put_noidle(hdq_data->dev);  in omap_w1_write_byte()
523 		dev_dbg(hdq_data->dev, "TX failure:Ctrl status %x\n", status);  in omap_w1_write_byte()
528 	pm_runtime_mark_last_busy(hdq_data->dev);  in omap_w1_write_byte()
529 	pm_runtime_put_autosuspend(hdq_data->dev);  in omap_w1_write_byte()
542 	hdq_reg_out(hdq_data, 0, hdq_data->mode);  in omap_hdq_runtime_suspend()
552 	/* select HDQ/1W mode & enable clocks */  in omap_hdq_runtime_resume()
556 		    hdq_data->mode);  in omap_hdq_runtime_resume()
569 	struct device *dev = &pdev->dev;  in omap_hdq_probe()
573 	const char *mode;  in omap_hdq_probe()  local
577 		return -ENOMEM;  in omap_hdq_probe()
579 	hdq_data->dev = dev;  in omap_hdq_probe()
582 	hdq_data->hdq_base = devm_platform_ioremap_resource(pdev, 0);  in omap_hdq_probe()
583 	if (IS_ERR(hdq_data->hdq_base))  in omap_hdq_probe()
584 		return PTR_ERR(hdq_data->hdq_base);  in omap_hdq_probe()
586 	mutex_init(&hdq_data->hdq_mutex);  in omap_hdq_probe()
588 	ret = of_property_read_string(pdev->dev.of_node, "ti,mode", &mode);  in omap_hdq_probe()
589 	if (ret < 0 || !strcmp(mode, "hdq")) {  in omap_hdq_probe()
590 		hdq_data->mode = 0;  in omap_hdq_probe()
593 		hdq_data->mode = 1;  in omap_hdq_probe()
597 	pm_runtime_enable(&pdev->dev);  in omap_hdq_probe()
598 	pm_runtime_use_autosuspend(&pdev->dev);  in omap_hdq_probe()
599 	pm_runtime_set_autosuspend_delay(&pdev->dev, 300);  in omap_hdq_probe()
600 	ret = pm_runtime_get_sync(&pdev->dev);  in omap_hdq_probe()
602 		pm_runtime_put_noidle(&pdev->dev);  in omap_hdq_probe()
603 		dev_dbg(&pdev->dev, "pm_runtime_get_sync failed\n");  in omap_hdq_probe()
608 	dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n",  in omap_hdq_probe()
611 	spin_lock_init(&hdq_data->hdq_spinlock);  in omap_hdq_probe()
615 		dev_dbg(&pdev->dev, "Failed to get IRQ: %d\n", irq);  in omap_hdq_probe()
622 		dev_dbg(&pdev->dev, "could not request irq\n");  in omap_hdq_probe()
628 	pm_runtime_mark_last_busy(&pdev->dev);  in omap_hdq_probe()
629 	pm_runtime_put_autosuspend(&pdev->dev);  in omap_hdq_probe()
635 		dev_dbg(&pdev->dev, "Failure in registering w1 master\n");  in omap_hdq_probe()
642 	pm_runtime_put_sync(&pdev->dev);  in omap_hdq_probe()
644 	pm_runtime_dont_use_autosuspend(&pdev->dev);  in omap_hdq_probe()
645 	pm_runtime_disable(&pdev->dev);  in omap_hdq_probe()
654 	active = pm_runtime_get_sync(&pdev->dev);  in omap_hdq_remove()
656 		pm_runtime_put_noidle(&pdev->dev);  in omap_hdq_remove()
660 	pm_runtime_dont_use_autosuspend(&pdev->dev);  in omap_hdq_remove()
662 		pm_runtime_put_sync(&pdev->dev);  in omap_hdq_remove()
663 	pm_runtime_disable(&pdev->dev);  in omap_hdq_remove()
667 	{ .compatible = "ti,omap3-1w" },
668 	{ .compatible = "ti,am4372-hdq" },
685 MODULE_DESCRIPTION("HDQ-1W driver Library");