113 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_touch_bit()
129 	/* Write Go signal and clear control reset signal in control register */  in amd_axi_w1_touch_bit()
132 	/* Wait for done signal to be 1 */  in amd_axi_w1_touch_bit()
143 	/* Clear Go signal in register 1 */  in amd_axi_w1_touch_bit()
161 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_read_byte()
172 	/* Write Go signal and clear control reset signal in control register */  in amd_axi_w1_read_byte()
175 	/* Wait for done signal to be 1 */  in amd_axi_w1_read_byte()
185 	/* Clear Go signal in control register */  in amd_axi_w1_read_byte()
202 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_write_byte()
213 	/* Write Go signal and clear control reset signal in register 1 */  in amd_axi_w1_write_byte()
216 	/* Wait for done signal to be 1 */  in amd_axi_w1_write_byte()
224 	/* Clear Go signal in control register */  in amd_axi_w1_write_byte()
243 	/* Wait for READY signal to be 1 to ensure 1-wire IP is ready */  in amd_axi_w1_reset_bus()
253 	/* Write Go signal and clear control reset signal in register 1 */  in amd_axi_w1_reset_bus()
256 	/* Wait for done signal to be 1 */  in amd_axi_w1_reset_bus()
266 	/* Clear Go signal in control register */  in amd_axi_w1_reset_bus()