Lines Matching +full:bit0 +full:- +full:7
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
4 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
8 #include <linux/via-core.h>
16 {41, 100, 7, 0},
29 {31, 84, 7, 1},
35 {90, 90, 7, 2},
40 {99, 99, 7, 3}
70 {174, 174, 7, 2},
96 {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
114 [7] vertical retrace start (bit 9) */
115 {VIACR, CR08, 0xFF, 0x00}, /* [0-4] preset row scan
116 [5-6] byte panning */
117 {VIACR, CR09, 0xDF, 0x40}, /* [0-4] max scan line
120 [7] scan doubling */
121 {VIACR, CR0A, 0xFF, 0x1E}, /* [0-4] cursor start
123 {VIACR, CR0B, 0xFF, 0x00}, /* [0-4] cursor end
124 [5-6] cursor skew */
125 {VIACR, CR0E, 0xFF, 0x00}, /* [0-7] cursor location (high) */
126 {VIACR, CR0F, 0xFF, 0x00}, /* [0-7] cursor location (low) */
127 {VIACR, CR11, 0xF0, 0x80}, /* [0-3] vertical retrace end
129 [7] CRTC register protect enable */
130 {VIACR, CR14, 0xFF, 0x00}, /* [0-4] underline location
133 {VIACR, CR17, 0xFF, 0x63}, /* [0-1] mapping of display address 13-14
138 [7] sync enable */
139 {VIACR, CR18, 0xFF, 0xFF}, /* [0-7] line compare */
144 {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } },
147 {{CR68, 4, 7}, {CR94, 7, 7}, {CR95, 7, 7} } }
152 {IGA1_FIFO_THRESHOLD_REG_NUM, {{SR16, 0, 5}, {SR16, 7, 7} } },
159 {IGA1_FIFO_HIGH_THRESHOLD_REG_NUM, {{SR18, 0, 5}, {SR18, 7, 7} } },
174 {IGA1_FETCH_COUNT_REG_NUM, {{SR1C, 0, 7}, {SR1D, 0, 1} } },
176 {IGA2_FETCH_COUNT_REG_NUM, {{CR65, 0, 7}, {CR67, 2, 3} } }
472 viafb_write_reg_mask(CR47, VIACR, 0, BIT0); in viafb_unlock_crt()
490 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) in get_dvi_devices()
496 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) in get_dvi_devices()
502 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) in get_dvi_devices()
558 viaparinfo->tmds_setting_info->iga_path = IGA1; in viafb_set_iga_path()
560 viaparinfo->tmds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
566 (viaparinfo->chip_info->gfx_chip_name == in viafb_set_iga_path()
568 viaparinfo-> in viafb_set_iga_path()
569 lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
571 viaparinfo-> in viafb_set_iga_path()
572 tmds_setting_info->iga_path = IGA1; in viafb_set_iga_path()
574 viaparinfo-> in viafb_set_iga_path()
575 lvds_setting_info->iga_path = IGA1; in viafb_set_iga_path()
577 viaparinfo->lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
582 viaparinfo->lvds_setting_info2->iga_path = IGA1; in viafb_set_iga_path()
584 viaparinfo->lvds_setting_info2->iga_path = IGA2; in viafb_set_iga_path()
591 viaparinfo->lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
594 viaparinfo->tmds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
596 viaparinfo->tmds_setting_info->iga_path = IGA1; in viafb_set_iga_path()
597 viaparinfo->lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
599 viaparinfo->lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
600 viaparinfo->lvds_setting_info2->iga_path = IGA2; in viafb_set_iga_path()
604 viaparinfo->lvds_setting_info->iga_path = IGA2; in viafb_set_iga_path()
606 viaparinfo->tmds_setting_info->iga_path = IGA1; in viafb_set_iga_path()
610 viaparinfo->shared->iga1_devices = 0; in viafb_set_iga_path()
611 viaparinfo->shared->iga2_devices = 0; in viafb_set_iga_path()
614 viaparinfo->shared->iga1_devices |= VIA_CRT; in viafb_set_iga_path()
616 viaparinfo->shared->iga2_devices |= VIA_CRT; in viafb_set_iga_path()
620 if (viaparinfo->tmds_setting_info->iga_path == IGA1) in viafb_set_iga_path()
621 viaparinfo->shared->iga1_devices |= get_dvi_devices( in viafb_set_iga_path()
622 viaparinfo->chip_info-> in viafb_set_iga_path()
625 viaparinfo->shared->iga2_devices |= get_dvi_devices( in viafb_set_iga_path()
626 viaparinfo->chip_info-> in viafb_set_iga_path()
631 if (viaparinfo->lvds_setting_info->iga_path == IGA1) in viafb_set_iga_path()
632 viaparinfo->shared->iga1_devices |= get_lcd_devices( in viafb_set_iga_path()
633 viaparinfo->chip_info-> in viafb_set_iga_path()
636 viaparinfo->shared->iga2_devices |= get_lcd_devices( in viafb_set_iga_path()
637 viaparinfo->chip_info-> in viafb_set_iga_path()
642 if (viaparinfo->lvds_setting_info2->iga_path == IGA1) in viafb_set_iga_path()
643 viaparinfo->shared->iga1_devices |= get_lcd_devices( in viafb_set_iga_path()
644 viaparinfo->chip_info-> in viafb_set_iga_path()
647 viaparinfo->shared->iga2_devices |= get_lcd_devices( in viafb_set_iga_path()
648 viaparinfo->chip_info-> in viafb_set_iga_path()
654 viaparinfo->shared->iga2_devices = VIA_DVP1 | VIA_LVDS2; in viafb_set_iga_path()
718 set_source_common(0x6C, 7, iga); in set_ldvp0_source()
723 set_source_common(0x93, 7, iga); in set_ldvp1_source()
949 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); in load_fix_bit_crtc_reg()
950 /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */ in load_fix_bit_crtc_reg()
955 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) in load_fix_bit_crtc_reg()
956 || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890)) in load_fix_bit_crtc_reg()
958 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) in load_fix_bit_crtc_reg()
959 && (viaparinfo->chip_info->gfx_chip_revision == CLE266_REVISION_AX)) in load_fix_bit_crtc_reg()
986 reg_mask = reg_mask | (BIT0 << j); in viafb_load_reg()
987 get_bit = (timing_value & (BIT0 << bit_num)); in viafb_load_reg()
1048 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { in viafb_load_FIFO_reg()
1063 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) { in viafb_load_FIFO_reg()
1080 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) { in viafb_load_FIFO_reg()
1095 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { in viafb_load_FIFO_reg()
1104 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) { in viafb_load_FIFO_reg()
1113 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) { in viafb_load_FIFO_reg()
1122 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) { in viafb_load_FIFO_reg()
1131 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) { in viafb_load_FIFO_reg()
1140 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX855) { in viafb_load_FIFO_reg()
1149 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX900) { in viafb_load_FIFO_reg()
1199 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { in viafb_load_FIFO_reg()
1214 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) { in viafb_load_FIFO_reg()
1229 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) { in viafb_load_FIFO_reg()
1244 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { in viafb_load_FIFO_reg()
1253 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) { in viafb_load_FIFO_reg()
1262 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) { in viafb_load_FIFO_reg()
1271 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) { in viafb_load_FIFO_reg()
1280 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) { in viafb_load_FIFO_reg()
1289 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX855) { in viafb_load_FIFO_reg()
1298 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX900) { in viafb_load_FIFO_reg()
1307 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { in viafb_load_FIFO_reg()
1311 - 1; in viafb_load_FIFO_reg()
1384 f = abs(get_pll_output_frequency(f0, cur) - clk); in get_pll_config()
1387 down.multiplier--; in get_pll_config()
1388 if (abs(get_pll_output_frequency(f0, up) - clk) < f) in get_pll_config()
1390 else if (abs(get_pll_output_frequency(f0, down) - clk) < f) in get_pll_config()
1398 f = abs(get_pll_output_frequency(f0, cur) - clk); in get_pll_config()
1399 if (f < abs(get_pll_output_frequency(f0, best) - clk)) in get_pll_config()
1410 switch (viaparinfo->chip_info->gfx_chip_name) { in get_best_pll_config()
1459 u16 dx = (var->xres - cxres) / 2, dy = (var->yres - cyres) / 2; in var_to_timing()
1462 timing.hor_sync_start = timing.hor_addr + var->right_margin + dx; in var_to_timing()
1463 timing.hor_sync_end = timing.hor_sync_start + var->hsync_len; in var_to_timing()
1464 timing.hor_total = timing.hor_sync_end + var->left_margin + dx; in var_to_timing()
1466 timing.hor_blank_end = timing.hor_total - dx; in var_to_timing()
1468 timing.ver_sync_start = timing.ver_addr + var->lower_margin + dy; in var_to_timing()
1469 timing.ver_sync_end = timing.ver_sync_start + var->vsync_len; in var_to_timing()
1470 timing.ver_total = timing.ver_sync_end + var->upper_margin + dy; in var_to_timing()
1472 timing.ver_blank_end = timing.ver_total - dy; in var_to_timing()
1480 cxres ? cxres : var->xres, cyres ? cyres : var->yres); in viafb_fill_crtc_timing()
1487 viafb_load_fetch_count_reg(var->xres, var->bits_per_pixel / 8, iga); in viafb_fill_crtc_timing()
1488 if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266 in viafb_fill_crtc_timing()
1489 && viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400) in viafb_fill_crtc_timing()
1490 viafb_load_FIFO_reg(iga, var->xres, var->yres); in viafb_fill_crtc_timing()
1492 viafb_set_vclock(PICOS2KHZ(var->pixclock) * 1000, iga); in viafb_fill_crtc_timing()
1505 viaparinfo->lvds_setting_info->display_method = viafb_lcd_dsp_method; in viafb_init_chip_info()
1506 viaparinfo->lvds_setting_info->lcd_mode = viafb_lcd_mode; in viafb_init_chip_info()
1507 viaparinfo->lvds_setting_info2->display_method = in viafb_init_chip_info()
1508 viaparinfo->lvds_setting_info->display_method; in viafb_init_chip_info()
1509 viaparinfo->lvds_setting_info2->lcd_mode = in viafb_init_chip_info()
1510 viaparinfo->lvds_setting_info->lcd_mode; in viafb_init_chip_info()
1516 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
1517 viaparinfo->tmds_setting_info->v_active = vres; in viafb_update_device_setting()
1520 if (viaparinfo->tmds_setting_info->iga_path == IGA2) { in viafb_update_device_setting()
1521 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
1522 viaparinfo->tmds_setting_info->v_active = vres; in viafb_update_device_setting()
1532 viaparinfo->chip_info->gfx_chip_name = chip_type; in init_gfx_chip_info()
1535 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { in init_gfx_chip_info()
1540 viaparinfo->chip_info->gfx_chip_revision = in init_gfx_chip_info()
1543 viaparinfo->chip_info->gfx_chip_revision = in init_gfx_chip_info()
1549 if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { in init_gfx_chip_info()
1553 viaparinfo->chip_info->gfx_chip_revision = in init_gfx_chip_info()
1556 viaparinfo->chip_info->gfx_chip_revision = in init_gfx_chip_info()
1559 viaparinfo->chip_info->gfx_chip_revision = in init_gfx_chip_info()
1565 switch (viaparinfo->chip_info->gfx_chip_name) { in init_gfx_chip_info()
1569 viaparinfo->chip_info->twod_engine = VIA_2D_ENG_M1; in init_gfx_chip_info()
1573 viaparinfo->chip_info->twod_engine = VIA_2D_ENG_H5; in init_gfx_chip_info()
1576 viaparinfo->chip_info->twod_engine = VIA_2D_ENG_H2; in init_gfx_chip_info()
1585 if (INTERFACE_NONE == viaparinfo->chip_info->tmds_chip_info. in init_tmds_chip_info()
1587 switch (viaparinfo->chip_info->gfx_chip_name) { in init_tmds_chip_info()
1595 viaparinfo->chip_info->tmds_chip_info. in init_tmds_chip_info()
1598 viaparinfo->chip_info->tmds_chip_info. in init_tmds_chip_info()
1608 viaparinfo->chip_info->tmds_chip_info.output_interface = in init_tmds_chip_info()
1614 viaparinfo->chip_info->tmds_chip_info in init_tmds_chip_info()
1621 viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); in init_tmds_chip_info()
1622 viafb_init_dvi_size(&viaparinfo->shared->chip_info.tmds_chip_info, in init_tmds_chip_info()
1623 &viaparinfo->shared->tmds_setting_info); in init_tmds_chip_info()
1630 viafb_init_lvds_output_interface(&viaparinfo->chip_info->lvds_chip_info, in init_lvds_chip_info()
1631 viaparinfo->lvds_setting_info); in init_lvds_chip_info()
1632 if (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) { in init_lvds_chip_info()
1633 viafb_init_lvds_output_interface(&viaparinfo->chip_info-> in init_lvds_chip_info()
1634 lvds_chip_info2, viaparinfo->lvds_setting_info2); in init_lvds_chip_info()
1638 if ((UNICHROME_CX700 == viaparinfo->chip_info->gfx_chip_name) in init_lvds_chip_info()
1640 if ((INTEGRATED_LVDS == viaparinfo->chip_info->lvds_chip_info. in init_lvds_chip_info()
1642 viaparinfo->chip_info-> in init_lvds_chip_info()
1644 viaparinfo->chip_info->lvds_chip_info.output_interface = in init_lvds_chip_info()
1646 viaparinfo->chip_info->lvds_chip_info2. in init_lvds_chip_info()
1653 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); in init_lvds_chip_info()
1655 viaparinfo->chip_info->lvds_chip_info.output_interface); in init_lvds_chip_info()
1657 viaparinfo->chip_info->lvds_chip_info.output_interface); in init_lvds_chip_info()
1667 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()
1681 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_init_dac()
1688 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()
1710 viaparinfo->lvds_setting_info2->device_lcd_dualedge) { in set_display_channel()
1722 if (viaparinfo->lvds_setting_info->device_lcd_dualedge) { in set_display_channel()
1737 if (!(var->sync & FB_SYNC_HOR_HIGH_ACT)) in get_sync()
1739 if (!(var->sync & FB_SYNC_VERT_HIGH_ACT)) in get_sync()
1753 switch (viaparinfo->chip_info->gfx_chip_name) { in hw_init()
1798 via_write_reg(VIASR, i, VPIT.SR[i - 1]); in hw_init()
1823 u32 devices = viaparinfo->shared->iga1_devices in viafb_setmode()
1824 | viaparinfo->shared->iga2_devices; in viafb_setmode()
1836 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266 in viafb_setmode()
1837 || viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400) in viafb_setmode()
1838 && viafbinfo->var.xres == 1024 && viafbinfo->var.yres == 768) { in viafb_setmode()
1848 via_set_primary_pitch(viafbinfo->fix.line_length); in viafb_setmode()
1849 via_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length in viafb_setmode()
1850 : viafbinfo->fix.line_length); in viafb_setmode()
1851 via_set_primary_color_depth(viaparinfo->depth); in viafb_setmode()
1852 via_set_secondary_color_depth(viafb_dual_fb ? viaparinfo1->depth in viafb_setmode()
1853 : viaparinfo->depth); in viafb_setmode()
1854 via_set_source(viaparinfo->shared->iga1_devices, IGA1); in viafb_setmode()
1855 via_set_source(viaparinfo->shared->iga2_devices, IGA2); in viafb_setmode()
1856 if (viaparinfo->shared->iga2_devices) in viafb_setmode()
1866 var2 = viafbinfo1->var; in viafb_setmode()
1870 cxres = viafbinfo->var.xres; in viafb_setmode()
1871 cyres = viafbinfo->var.yres; in viafb_setmode()
1872 var2.bits_per_pixel = viafbinfo->var.bits_per_pixel; in viafb_setmode()
1877 if (viaparinfo->shared->iga2_devices & VIA_CRT in viafb_setmode()
1881 viafb_fill_crtc_timing(&viafbinfo->var, 0, 0, in viafb_setmode()
1882 (viaparinfo->shared->iga1_devices & VIA_CRT) in viafb_setmode()
1888 if (viafbinfo->var.xres % 8) { in viafb_setmode()
1891 viafb_read_reg(VIACR, CR02) - 1); in viafb_setmode()
1897 if (viaparinfo->shared->tmds_setting_info.iga_path == IGA2 in viafb_setmode()
1901 viafb_dvi_set_mode(&viafbinfo->var, 0, 0, in viafb_setmode()
1902 viaparinfo->tmds_setting_info->iga_path); in viafb_setmode()
1907 (viaparinfo->lvds_setting_info->iga_path == IGA2)) { in viafb_setmode()
1909 viaparinfo->lvds_setting_info, in viafb_setmode()
1910 &viaparinfo->chip_info->lvds_chip_info); in viafb_setmode()
1913 if (viaparinfo->lvds_setting_info->iga_path == IGA1) { in viafb_setmode()
1914 viaparinfo->lvds_setting_info->display_method = in viafb_setmode()
1917 viafb_lcd_set_mode(&viafbinfo->var, 0, 0, in viafb_setmode()
1918 viaparinfo->lvds_setting_info, in viafb_setmode()
1919 &viaparinfo->chip_info->lvds_chip_info); in viafb_setmode()
1924 (viaparinfo->lvds_setting_info2->iga_path == IGA2)) { in viafb_setmode()
1926 viaparinfo->lvds_setting_info2, in viafb_setmode()
1927 &viaparinfo->chip_info->lvds_chip_info2); in viafb_setmode()
1930 if (viaparinfo->lvds_setting_info2->iga_path == IGA1) { in viafb_setmode()
1931 viaparinfo->lvds_setting_info2->display_method = in viafb_setmode()
1934 viafb_lcd_set_mode(&viafbinfo->var, 0, 0, in viafb_setmode()
1935 viaparinfo->lvds_setting_info2, in viafb_setmode()
1936 &viaparinfo->chip_info->lvds_chip_info2); in viafb_setmode()
1940 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) in viafb_setmode()
1944 /* If set mode normally, save resolution information for hot-plug . */ in viafb_setmode()
1946 viafb_hotplug_Xres = viafbinfo->var.xres; in viafb_setmode()
1947 viafb_hotplug_Yres = viafbinfo->var.yres; in viafb_setmode()
1948 viafb_hotplug_bpp = viafbinfo->var.bits_per_pixel; in viafb_setmode()
1958 via_set_sync_polarity(devices, get_sync(&viafbinfo->var)); in viafb_setmode()
1960 via_set_sync_polarity(viaparinfo->shared->iga1_devices, in viafb_setmode()
1961 get_sync(&viafbinfo->var)); in viafb_setmode()
1962 via_set_sync_polarity(viaparinfo->shared->iga2_devices, in viafb_setmode()
1976 if (viaparinfo->shared->iga1_devices) { in viafb_setmode()
1984 if (viaparinfo->shared->iga2_devices) { in viafb_setmode()
2006 if (abs(best->refresh - long_refresh) > 3) { in viafb_get_refresh()
2013 return best->refresh; in viafb_get_refresh()
2054 p_gfx_dpa_setting->DVP0, 0x0F); in viafb_set_dpa_gfx()
2058 p_gfx_dpa_setting->DVP0ClockDri_S, BIT2); in viafb_set_dpa_gfx()
2060 p_gfx_dpa_setting->DVP0ClockDri_S1, in viafb_set_dpa_gfx()
2063 p_gfx_dpa_setting->DVP0DataDri_S, BIT1); in viafb_set_dpa_gfx()
2065 p_gfx_dpa_setting->DVP0DataDri_S1, BIT5); in viafb_set_dpa_gfx()
2073 p_gfx_dpa_setting->DVP1, 0x0F); in viafb_set_dpa_gfx()
2077 p_gfx_dpa_setting->DVP1Driving, 0x0F); in viafb_set_dpa_gfx()
2084 p_gfx_dpa_setting->DFPHigh, 0x0F); in viafb_set_dpa_gfx()
2091 p_gfx_dpa_setting->DFPLow, 0x0F); in viafb_set_dpa_gfx()
2098 p_gfx_dpa_setting->DFPHigh, 0x0F); in viafb_set_dpa_gfx()
2100 p_gfx_dpa_setting->DFPLow, 0x0F); in viafb_set_dpa_gfx()
2109 var->pixclock = mode->pixclock; in viafb_fill_var_timing_info()
2110 var->xres = mode->xres; in viafb_fill_var_timing_info()
2111 var->yres = mode->yres; in viafb_fill_var_timing_info()
2112 var->left_margin = mode->left_margin; in viafb_fill_var_timing_info()
2113 var->right_margin = mode->right_margin; in viafb_fill_var_timing_info()
2114 var->hsync_len = mode->hsync_len; in viafb_fill_var_timing_info()
2115 var->upper_margin = mode->upper_margin; in viafb_fill_var_timing_info()
2116 var->lower_margin = mode->lower_margin; in viafb_fill_var_timing_info()
2117 var->vsync_len = mode->vsync_len; in viafb_fill_var_timing_info()
2118 var->sync = mode->sync; in viafb_fill_var_timing_info()