19 	gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;  in viafb_set_bpp()
35 	return 0;  in viafb_set_bpp()
44 	u32 ge_cmd = 0, tmp, i;  in hw_bitblt_1()
54 			ge_cmd |= 0x00008000;  in hw_bitblt_1()
59 			ge_cmd |= 0x00004000;  in hw_bitblt_1()
67 		case 0x00: /* blackness */  in hw_bitblt_1()
68 		case 0x5A: /* pattern inversion */  in hw_bitblt_1()
69 		case 0xF0: /* pattern copy */  in hw_bitblt_1()
70 		case 0xFF: /* whiteness */  in hw_bitblt_1()
84 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)  in hw_bitblt_1()
85 			|| src_y & 0xFFFFF000) {  in hw_bitblt_1()
91 		writel(tmp, engine + 0x08);  in hw_bitblt_1()
94 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {  in hw_bitblt_1()
100 	writel(tmp, engine + 0x0C);  in hw_bitblt_1()
102 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {  in hw_bitblt_1()
108 	writel(tmp, engine + 0x10);  in hw_bitblt_1()
111 		writel(fg_color, engine + 0x18);  in hw_bitblt_1()
114 		writel(bg_color, engine + 0x1C);  in hw_bitblt_1()
117 		tmp = src_mem ? 0 : src_addr;  in hw_bitblt_1()
118 		if (tmp & 0xE0000007) {  in hw_bitblt_1()
124 		writel(tmp, engine + 0x30);  in hw_bitblt_1()
127 	if (dst_addr & 0xE0000007) {  in hw_bitblt_1()
133 	writel(tmp, engine + 0x34);  in hw_bitblt_1()
136 		tmp = 0;  in hw_bitblt_1()
139 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {  in hw_bitblt_1()
145 	writel(tmp, engine + 0x38);  in hw_bitblt_1()
148 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;  in hw_bitblt_1()
150 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */  in hw_bitblt_1()
152 			ge_cmd |= 0x00000040;  in hw_bitblt_1()
154 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;  in hw_bitblt_1()
156 			ge_cmd |= 0x00000001;  in hw_bitblt_1()
161 		return 0;  in hw_bitblt_1()
166 	for (i = 0; i < tmp; i++)  in hw_bitblt_1()
169 	return 0;  in hw_bitblt_1()
177 	u32 ge_cmd = 0, tmp, i;  in hw_bitblt_2()
187 			ge_cmd |= 0x00008000;  in hw_bitblt_2()
192 			ge_cmd |= 0x00004000;  in hw_bitblt_2()
200 		case 0x00: /* blackness */  in hw_bitblt_2()
201 		case 0x5A: /* pattern inversion */  in hw_bitblt_2()
202 		case 0xF0: /* pattern copy */  in hw_bitblt_2()
203 		case 0xFF: /* whiteness */  in hw_bitblt_2()
217 		tmp = 0;  in hw_bitblt_2()
220 	if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {  in hw_bitblt_2()
226 	writel(tmp, engine + 0x08);  in hw_bitblt_2()
228 	if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {  in hw_bitblt_2()
234 	writel(tmp, engine + 0x0C);  in hw_bitblt_2()
236 	if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {  in hw_bitblt_2()
242 	writel(tmp, engine + 0x10);  in hw_bitblt_2()
244 	if (dst_addr & 0xE0000007) {  in hw_bitblt_2()
250 	writel(tmp, engine + 0x14);  in hw_bitblt_2()
253 		if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)  in hw_bitblt_2()
254 			|| src_y & 0xFFFFF000) {  in hw_bitblt_2()
260 		writel(tmp, engine + 0x18);  in hw_bitblt_2()
262 		tmp = src_mem ? 0 : src_addr;  in hw_bitblt_2()
263 		if (tmp & 0xE0000007) {  in hw_bitblt_2()
269 		writel(tmp, engine + 0x1C);  in hw_bitblt_2()
273 		writel(fg_color, engine + 0x58);  in hw_bitblt_2()
275 		writel(fg_color, engine + 0x4C);  in hw_bitblt_2()
276 		writel(bg_color, engine + 0x50);  in hw_bitblt_2()
280 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;  in hw_bitblt_2()
282 		ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */  in hw_bitblt_2()
284 			ge_cmd |= 0x00000040;  in hw_bitblt_2()
286 			ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;  in hw_bitblt_2()
288 			ge_cmd |= 0x00000001;  in hw_bitblt_2()
293 		return 0;  in hw_bitblt_2()
298 	for (i = 0; i < tmp; i++)  in hw_bitblt_2()
301 	return 0;  in hw_bitblt_2()
364 	return 0;  in viafb_setup_engine()
377 		highest_reg = 0x5c;  in viafb_reset_engine()
380 		highest_reg = 0x40;  in viafb_reset_engine()
383 	for (i = 0; i <= highest_reg; i += 4)  in viafb_reset_engine()
384 		writel(0x0, engine + i);  in viafb_reset_engine()
393 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);  in viafb_reset_engine()
394 		writel(0x680A0000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
395 		writel(0x02000000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
399 		writel(0x00100000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
400 		writel(0x00000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
401 		writel(0x00333004, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
402 		writel(0x60000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
403 		writel(0x61000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
404 		writel(0x62000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
405 		writel(0x63000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
406 		writel(0x64000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
407 		writel(0x7D000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
409 		writel(0xFE020000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
410 		writel(0x00000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
418 	vq_start_low = 0x50000000 | (vq_start_addr & 0xFFFFFF);  in viafb_reset_engine()
419 	vq_end_low = 0x51000000 | (vq_end_addr & 0xFFFFFF);  in viafb_reset_engine()
420 	vq_high = 0x52000000 | ((vq_start_addr & 0xFF000000) >> 24) |  in viafb_reset_engine()
421 		((vq_end_addr & 0xFF000000) >> 16);  in viafb_reset_engine()
422 	vq_len = 0x53000000 | (VQ_SIZE >> 3);  in viafb_reset_engine()
430 		vq_start_low |= 0x20000000;  in viafb_reset_engine()
431 		vq_end_low |= 0x20000000;  in viafb_reset_engine()
432 		vq_high |= 0x20000000;  in viafb_reset_engine()
433 		vq_len |= 0x20000000;  in viafb_reset_engine()
435 		writel(0x00100000, engine + VIA_REG_CR_TRANSET);  in viafb_reset_engine()
440 		writel(0x74301001, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
441 		writel(0x00000000, engine + VIA_REG_CR_TRANSPACE);  in viafb_reset_engine()
444 		writel(0x00FE0000, engine + VIA_REG_TRANSET);  in viafb_reset_engine()
445 		writel(0x080003FE, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
446 		writel(0x0A00027C, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
447 		writel(0x0B000260, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
448 		writel(0x0C000274, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
449 		writel(0x0D000264, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
450 		writel(0x0E000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
451 		writel(0x0F000020, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
452 		writel(0x1000027E, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
453 		writel(0x110002FE, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
454 		writel(0x200F0060, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
456 		writel(0x00000006, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
457 		writel(0x40008C0F, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
458 		writel(0x44000000, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
459 		writel(0x45080C04, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
460 		writel(0x46800408, engine + VIA_REG_TRANSPACE);  in viafb_reset_engine()
471 	writel(0x0, engine + VIA_REG_CURSOR_POS);  in viafb_reset_engine()
472 	writel(0x0, engine + VIA_REG_CURSOR_ORG);  in viafb_reset_engine()
473 	writel(0x0, engine + VIA_REG_CURSOR_BG);  in viafb_reset_engine()
474 	writel(0x0, engine + VIA_REG_CURSOR_FG);  in viafb_reset_engine()
486 		temp |= 0x1;  in viafb_show_hw_cursor()
489 		temp &= 0xFFFFFFFE;  in viafb_show_hw_cursor()
494 		temp |= 0x80000000;  in viafb_show_hw_cursor()
498 		temp &= 0x7FFFFFFF;  in viafb_show_hw_cursor()
506 	int loop = 0;  in viafb_wait_engine_idle()