617     nv3_sim_state sim_data;  in nv3UpdateArbitrationSettings()  local
623     sim_data.pix_bpp        = (char)pixelDepth;  in nv3UpdateArbitrationSettings()
624     sim_data.enable_video   = 0;  in nv3UpdateArbitrationSettings()
625     sim_data.enable_mp      = 0;  in nv3UpdateArbitrationSettings()
626     sim_data.video_scale    = 1;  in nv3UpdateArbitrationSettings()
627     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv3UpdateArbitrationSettings()
629     sim_data.memory_width   = 128;  in nv3UpdateArbitrationSettings()
631     sim_data.mem_latency    = 9;  in nv3UpdateArbitrationSettings()
632     sim_data.mem_aligned    = 1;  in nv3UpdateArbitrationSettings()
633     sim_data.mem_page_miss  = 11;  in nv3UpdateArbitrationSettings()
634     sim_data.gr_during_vid  = 0;  in nv3UpdateArbitrationSettings()
635     sim_data.pclk_khz       = VClk;  in nv3UpdateArbitrationSettings()
636     sim_data.mclk_khz       = MClk;  in nv3UpdateArbitrationSettings()
637     nv3CalcArbitration(&fifo_data, &sim_data);  in nv3UpdateArbitrationSettings()
801     nv4_sim_state sim_data;  in nv4UpdateArbitrationSettings()  local
811     sim_data.pix_bpp        = (char)pixelDepth;  in nv4UpdateArbitrationSettings()
812     sim_data.enable_video   = 0;  in nv4UpdateArbitrationSettings()
813     sim_data.enable_mp      = 0;  in nv4UpdateArbitrationSettings()
814     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv4UpdateArbitrationSettings()
816     sim_data.mem_latency    = (char)cfg1 & 0x0F;  in nv4UpdateArbitrationSettings()
817     sim_data.mem_aligned    = 1;  in nv4UpdateArbitrationSettings()
818     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));  in nv4UpdateArbitrationSettings()
819     sim_data.gr_during_vid  = 0;  in nv4UpdateArbitrationSettings()
820     sim_data.pclk_khz       = VClk;  in nv4UpdateArbitrationSettings()
821     sim_data.mclk_khz       = MClk;  in nv4UpdateArbitrationSettings()
822     sim_data.nvclk_khz      = NVClk;  in nv4UpdateArbitrationSettings()
823     nv4CalcArbitration(&fifo_data, &sim_data);  in nv4UpdateArbitrationSettings()
1050     nv10_sim_state sim_data;  in nv10UpdateArbitrationSettings()  local
1060     sim_data.pix_bpp        = (char)pixelDepth;  in nv10UpdateArbitrationSettings()
1061     sim_data.enable_video   = 0;  in nv10UpdateArbitrationSettings()
1062     sim_data.enable_mp      = 0;  in nv10UpdateArbitrationSettings()
1063     sim_data.memory_type    = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ?  in nv10UpdateArbitrationSettings()
1065     sim_data.memory_width   = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ?  in nv10UpdateArbitrationSettings()
1067     sim_data.mem_latency    = (char)cfg1 & 0x0F;  in nv10UpdateArbitrationSettings()
1068     sim_data.mem_aligned    = 1;  in nv10UpdateArbitrationSettings()
1069     sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));  in nv10UpdateArbitrationSettings()
1070     sim_data.gr_during_vid  = 0;  in nv10UpdateArbitrationSettings()
1071     sim_data.pclk_khz       = VClk;  in nv10UpdateArbitrationSettings()
1072     sim_data.mclk_khz       = MClk;  in nv10UpdateArbitrationSettings()
1073     sim_data.nvclk_khz      = NVClk;  in nv10UpdateArbitrationSettings()
1074     nv10CalcArbitration(&fifo_data, &sim_data);  in nv10UpdateArbitrationSettings()
1096     nv10_sim_state sim_data;  in nForceUpdateArbitrationSettings()  local
1113     sim_data.pix_bpp        = (char)pixelDepth;  in nForceUpdateArbitrationSettings()
1114     sim_data.enable_video   = 0;  in nForceUpdateArbitrationSettings()
1115     sim_data.enable_mp      = 0;  in nForceUpdateArbitrationSettings()
1118     pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);  in nForceUpdateArbitrationSettings()
1120     sim_data.memory_type    = (sim_data.memory_type >> 12) & 1;  in nForceUpdateArbitrationSettings()
1122     sim_data.memory_width   = 64;  in nForceUpdateArbitrationSettings()
1123     sim_data.mem_latency    = 3;  in nForceUpdateArbitrationSettings()
1124     sim_data.mem_aligned    = 1;  in nForceUpdateArbitrationSettings()
1125     sim_data.mem_page_miss  = 10;  in nForceUpdateArbitrationSettings()
1126     sim_data.gr_during_vid  = 0;  in nForceUpdateArbitrationSettings()
1127     sim_data.pclk_khz       = VClk;  in nForceUpdateArbitrationSettings()
1128     sim_data.mclk_khz       = MClk;  in nForceUpdateArbitrationSettings()
1129     sim_data.nvclk_khz      = NVClk;  in nForceUpdateArbitrationSettings()
1130     nv10CalcArbitration(&fifo_data, &sim_data);  in nForceUpdateArbitrationSettings()